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ARM: Keystone: Convert device tree file to use IRQ defines 

Use the GIC and standard IRQ binding defines in all IRQ specifiers.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This commit is contained in:
Santosh Shilimkar 2013-08-05 13:13:07 -04:00
parent 226d1c5b1d
commit eb788f43a6
1 changed files with 17 additions and 10 deletions
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27
arch/arm/boot/dts/keystone.dts
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@ -7,6 +7,8 @@
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
@ -67,18 +69,23 @@ gic: interrupt-controller {
timer {
compatible = "arm,armv7-timer";
interrupts = <1 13 0xf08>,
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0x308>;
interrupts =
<GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
pmu {
compatible = "arm,cortex-a15-pmu";
interrupts = <0 20 0xf01>,
<0 21 0xf01>,
<0 22 0xf01>,
<0 23 0xf01>;
interrupts = <GIC_SPI 20 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 21 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 22 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
};
soc {
@ -100,7 +107,7 @@ uart0: serial@02530c00 {
reg-io-width = <4>;
reg = <0x02530c00 0x100>;
clock-frequency = <133120000>;
interrupts = <0 277 0xf01>;
interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
};
uart1: serial@02531000 {
@ -110,7 +117,7 @@ uart1: serial@02531000 {
reg-io-width = <4>;
reg = <0x02531000 0x100>;
clock-frequency = <133120000>;
interrupts = <0 280 0xf01>;
interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
};
};