arm64: dts: qcom: Collapse usb support into one node
We currently have three device nodes for the same USB hardware block, as evident by the reuse of the same reg address multiple times. Now that the chipidea driver fully supports OTG with the MSM wrapper we can collapse all these nodes into one USB device node, reflecting the true nature of the hardware. Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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@ -215,22 +215,16 @@ sdhci@07864000 {
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usb@78d9000 {
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extcon = <&usb_id>, <&usb_id>;
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status = "okay";
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};
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ehci@78d9000 {
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status = "okay";
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};
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phy@78d9000 {
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v1p8-supply = <&pm8916_l7>;
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v3p3-supply = <&pm8916_l13>;
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vddcx-supply = <&pm8916_s1>;
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extcon = <&usb_id>, <&usb_id>;
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dr_mode = "otg";
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status = "okay";
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switch-gpio = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_sw_sel_pm>;
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adp-disable;
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hnp-disable;
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srp-disable;
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ulpi {
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phy {
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v1p8-supply = <&pm8916_l7>;
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v3p3-supply = <&pm8916_l13>;
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extcon = <&usb_id>;
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};
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};
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};
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lpass@07708000 {
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@ -348,6 +342,14 @@ usb_id: usb-id {
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pinctrl-0 = <&usb_id_default>;
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};
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usb-switch {
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compatible = "toshiba,tc7usb40mu";
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switch-gpios = <&pm8916_gpios 4 GPIO_ACTIVE_HIGH>;
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extcon = <&usb_id>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_sw_sel_pm>;
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};
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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@ -546,44 +546,40 @@ sdhc_2: sdhci@07864000 {
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status = "disabled";
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};
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usb_dev: usb@78d9000 {
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otg: usb@78d9000 {
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compatible = "qcom,ci-hdrc";
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reg = <0x78d9000 0x400>;
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dr_mode = "peripheral";
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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usb-phy = <&usb_otg>;
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status = "disabled";
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};
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usb_host: ehci@78d9000 {
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compatible = "qcom,ehci-host";
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reg = <0x78d9000 0x400>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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usb-phy = <&usb_otg>;
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status = "disabled";
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};
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usb_otg: phy@78d9000 {
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compatible = "qcom,usb-otg-snps";
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reg = <0x78d9000 0x400>;
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reg = <0x78d9000 0x200>,
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<0x78d9200 0x200>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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qcom,vdd-levels = <500000 1000000 1320000>;
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qcom,phy-init-sequence = <0x44 0x6B 0x24 0x13>;
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dr_mode = "peripheral";
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qcom,otg-control = <2>; // PMIC
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qcom,manual-pullup;
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clocks = <&gcc GCC_USB_HS_AHB_CLK>,
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<&gcc GCC_USB_HS_SYSTEM_CLK>,
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<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
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clock-names = "iface", "core", "sleep";
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resets = <&gcc GCC_USB2A_PHY_BCR>,
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<&gcc GCC_USB_HS_BCR>;
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reset-names = "phy", "link";
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<&gcc GCC_USB_HS_SYSTEM_CLK>;
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clock-names = "iface", "core";
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assigned-clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>;
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assigned-clock-rates = <80000000>;
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resets = <&gcc GCC_USB_HS_BCR>;
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reset-names = "core";
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phy_type = "ulpi";
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dr_mode = "otg";
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ahb-burst-config = <0>;
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phy-names = "usb-phy";
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phys = <&usb_hs_phy>;
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status = "disabled";
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#reset-cells = <1>;
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ulpi {
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usb_hs_phy: phy {
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compatible = "qcom,usb-hs-phy-msm8916",
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"qcom,usb-hs-phy";
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#phy-cells = <0>;
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clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
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clock-names = "ref", "sleep";
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resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>;
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reset-names = "phy", "por";
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qcom,init-seq = /bits/ 8 <0x0 0x44
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0x1 0x6b 0x2 0x24 0x3 0x13>;
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};
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};
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};
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intc: interrupt-controller@b000000 {
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