s390/cpum_cf: add support for the MT-diagnostic counter set (z13)
Complete the IBM z13 support and support counters from the MT-diagnostic counter set. Note that this counter set is available only if SMT is enabled. Signed-off-by: Hendrik Brueckner <brueckner@linux.vnet.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Hendrik Brueckner
Martin Schwidefsky
parent
db17160dce
commit
ee699f329a
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@ -20,9 +20,11 @@
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#define CPU_MF_INT_SF_PRA (1 << 29) /* program request alert */
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#define CPU_MF_INT_SF_SACA (1 << 23) /* sampler auth. change alert */
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#define CPU_MF_INT_SF_LSDA (1 << 22) /* loss of sample data alert */
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#define CPU_MF_INT_CF_MTDA (1 << 15) /* loss of MT ctr. data alert */
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#define CPU_MF_INT_CF_CACA (1 << 7) /* counter auth. change alert */
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#define CPU_MF_INT_CF_LCDA (1 << 6) /* loss of counter data alert */
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#define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_CACA|CPU_MF_INT_CF_LCDA)
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#define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_MTDA|CPU_MF_INT_CF_CACA| \
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CPU_MF_INT_CF_LCDA)
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#define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \
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CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \
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CPU_MF_INT_SF_LSDA)
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@ -22,19 +22,12 @@
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#include <asm/irq.h>
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#include <asm/cpu_mf.h>
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/* CPU-measurement counter facility supports these CPU counter sets:
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* For CPU counter sets:
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* Basic counter set: 0-31
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* Problem-state counter set: 32-63
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* Crypto-activity counter set: 64-127
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* Extented counter set: 128-159
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*/
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enum cpumf_ctr_set {
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/* CPU counter sets */
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CPUMF_CTR_SET_BASIC = 0,
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CPUMF_CTR_SET_USER = 1,
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CPUMF_CTR_SET_CRYPTO = 2,
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CPUMF_CTR_SET_EXT = 3,
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CPUMF_CTR_SET_BASIC = 0, /* Basic Counter Set */
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CPUMF_CTR_SET_USER = 1, /* Problem-State Counter Set */
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CPUMF_CTR_SET_CRYPTO = 2, /* Crypto-Activity Counter Set */
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CPUMF_CTR_SET_EXT = 3, /* Extended Counter Set */
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CPUMF_CTR_SET_MT_DIAG = 4, /* MT-diagnostic Counter Set */
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/* Maximum number of counter sets */
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CPUMF_CTR_SET_MAX,
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@ -47,6 +40,7 @@ static const u64 cpumf_state_ctl[CPUMF_CTR_SET_MAX] = {
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[CPUMF_CTR_SET_USER] = 0x04,
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[CPUMF_CTR_SET_CRYPTO] = 0x08,
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[CPUMF_CTR_SET_EXT] = 0x01,
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[CPUMF_CTR_SET_MT_DIAG] = 0x20,
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};
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static void ctr_set_enable(u64 *state, int ctr_set)
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@ -76,19 +70,20 @@ struct cpu_hw_events {
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};
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static DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events) = {
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.ctr_set = {
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[CPUMF_CTR_SET_BASIC] = ATOMIC_INIT(0),
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[CPUMF_CTR_SET_USER] = ATOMIC_INIT(0),
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[CPUMF_CTR_SET_CRYPTO] = ATOMIC_INIT(0),
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[CPUMF_CTR_SET_EXT] = ATOMIC_INIT(0),
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[CPUMF_CTR_SET_BASIC] = ATOMIC_INIT(0),
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[CPUMF_CTR_SET_USER] = ATOMIC_INIT(0),
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[CPUMF_CTR_SET_CRYPTO] = ATOMIC_INIT(0),
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[CPUMF_CTR_SET_EXT] = ATOMIC_INIT(0),
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[CPUMF_CTR_SET_MT_DIAG] = ATOMIC_INIT(0),
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},
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.state = 0,
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.flags = 0,
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.txn_flags = 0,
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};
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static int get_counter_set(u64 event)
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static enum cpumf_ctr_set get_counter_set(u64 event)
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{
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int set = -1;
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int set = CPUMF_CTR_SET_MAX;
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if (event < 32)
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set = CPUMF_CTR_SET_BASIC;
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@ -98,6 +93,8 @@ static int get_counter_set(u64 event)
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set = CPUMF_CTR_SET_CRYPTO;
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else if (event < 256)
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set = CPUMF_CTR_SET_EXT;
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else if (event >= 448 && event < 496)
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set = CPUMF_CTR_SET_MT_DIAG;
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return set;
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}
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@ -106,6 +103,7 @@ static int validate_ctr_version(const struct hw_perf_event *hwc)
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{
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struct cpu_hw_events *cpuhw;
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int err = 0;
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u16 mtdiag_ctl;
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cpuhw = &get_cpu_var(cpu_hw_events);
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@ -125,6 +123,27 @@ static int validate_ctr_version(const struct hw_perf_event *hwc)
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(cpuhw->info.csvn > 2 && hwc->config > 255))
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err = -EOPNOTSUPP;
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break;
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case CPUMF_CTR_SET_MT_DIAG:
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if (cpuhw->info.csvn <= 3)
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err = -EOPNOTSUPP;
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/*
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* MT-diagnostic counters are read-only. The counter set
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* is automatically enabled and activated on all CPUs with
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* multithreading (SMT). Deactivation of multithreading
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* also disables the counter set. State changes are ignored
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* by lcctl(). Because Linux controls SMT enablement through
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* a kernel parameter only, the counter set is either disabled
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* or enabled and active.
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*
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* Thus, the counters can only be used if SMT is on and the
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* counter set is enabled and active.
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*/
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mtdiag_ctl = cpumf_state_ctl[CPUMF_CTR_SET_MT_DIAG];
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if (!((cpuhw->info.auth_ctl & mtdiag_ctl) &&
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(cpuhw->info.enable_ctl & mtdiag_ctl) &&
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(cpuhw->info.act_ctl & mtdiag_ctl)))
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err = -EOPNOTSUPP;
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break;
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}
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put_cpu_var(cpu_hw_events);
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@ -230,6 +249,11 @@ static void cpumf_measurement_alert(struct ext_code ext_code,
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/* loss of counter data alert */
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if (alert & CPU_MF_INT_CF_LCDA)
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pr_err("CPU[%i] Counter data was lost\n", smp_processor_id());
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/* loss of MT counter data alert */
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if (alert & CPU_MF_INT_CF_MTDA)
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pr_warn("CPU[%i] MT counter data was lost\n",
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smp_processor_id());
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}
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#define PMC_INIT 0
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@ -310,6 +334,7 @@ static int __hw_perf_event_init(struct perf_event *event)
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{
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struct perf_event_attr *attr = &event->attr;
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struct hw_perf_event *hwc = &event->hw;
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enum cpumf_ctr_set set;
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int err;
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u64 ev;
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@ -353,13 +378,27 @@ static int __hw_perf_event_init(struct perf_event *event)
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if (ev > PERF_CPUM_CF_MAX_CTR)
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return -EINVAL;
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/* Use the hardware perf event structure to store the counter number
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* in 'config' member and the counter set to which the counter belongs
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* in the 'config_base'. The counter set (config_base) is then used
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* to enable/disable the counters.
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*/
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hwc->config = ev;
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hwc->config_base = get_counter_set(ev);
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/* Obtain the counter set to which the specified counter belongs */
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set = get_counter_set(ev);
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switch (set) {
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case CPUMF_CTR_SET_BASIC:
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case CPUMF_CTR_SET_USER:
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case CPUMF_CTR_SET_CRYPTO:
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case CPUMF_CTR_SET_EXT:
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case CPUMF_CTR_SET_MT_DIAG:
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/*
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* Use the hardware perf event structure to store the
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* counter number in the 'config' member and the counter
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* set number in the 'config_base'. The counter set number
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* is then later used to enable/disable the counter(s).
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*/
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hwc->config = ev;
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hwc->config_base = set;
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break;
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case CPUMF_CTR_SET_MAX:
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/* The counter could not be associated to a counter set */
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return -EINVAL;
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};
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/* Initialize for using the CPU-measurement counter facility */
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if (!atomic_inc_not_zero(&num_events)) {
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