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ARM: dts: Enable support for DWC3 controller for exynos5420 

Add device tree nodes for DWC3 controller present on
Exynos 5420 SoC, to enable support for USB 3.0.

Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Vivek Gautam 2014-05-16 06:38:01 +09:00 committed by Kukjin Kim
parent 3cb7d1cdbe
commit f070267b5f
1 changed files with 34 additions and 0 deletions
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34
arch/arm/boot/dts/exynos5420.dtsi
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@ -758,6 +758,23 @@ sss: sss@10830000 {
samsung,power-domain = <&g2d_pd>;
};
usbdrd3_0: usb@12000000 {
compatible = "samsung,exynos5250-dwusb3";
clocks = <&clock CLK_USBD300>;
clock-names = "usbdrd30";
#address-cells = <1>;
#size-cells = <1>;
ranges;
dwc3 {
compatible = "snps,dwc3";
reg = <0x12000000 0x10000>;
interrupts = <0 72 0>;
phys = <&usbdrd_phy0 0>, <&usbdrd_phy0 1>;
phy-names = "usb2-phy", "usb3-phy";
};
};
usbdrd_phy0: phy@12100000 {
compatible = "samsung,exynos5420-usbdrd-phy";
reg = <0x12100000 0x100>;
@ -767,6 +784,23 @@ usbdrd_phy0: phy@12100000 {
#phy-cells = <1>;
};
usbdrd3_1: usb@12400000 {
compatible = "samsung,exynos5250-dwusb3";
clocks = <&clock CLK_USBD301>;
clock-names = "usbdrd30";
#address-cells = <1>;
#size-cells = <1>;
ranges;
dwc3 {
compatible = "snps,dwc3";
reg = <0x12400000 0x10000>;
interrupts = <0 73 0>;
phys = <&usbdrd_phy1 0>, <&usbdrd_phy1 1>;
phy-names = "usb2-phy", "usb3-phy";
};
};
usbdrd_phy1: phy@12500000 {
compatible = "samsung,exynos5420-usbdrd-phy";
reg = <0x12500000 0x100>;