net: dsa: mv88e6352: Refactor shareable code
The mv88e6352 allows access to the port phys via an internal mdio bus which is accessed using registers in the GLOBAL 2 range. The mv88e6171 and probably other devices use the same mechanism. Move this code into the shared mv88e6xxx.c library. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -22,59 +22,6 @@
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#include <net/dsa.h>
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#include "mv88e6xxx.h"
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static int mv88e6352_wait(struct dsa_switch *ds, int reg, int offset, u16 mask)
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{
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unsigned long timeout = jiffies + HZ / 10;
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while (time_before(jiffies, timeout)) {
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int ret;
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ret = REG_READ(reg, offset);
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if (!(ret & mask))
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return 0;
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usleep_range(1000, 2000);
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}
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return -ETIMEDOUT;
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}
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static inline int mv88e6352_phy_wait(struct dsa_switch *ds)
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{
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return mv88e6352_wait(ds, REG_GLOBAL2, 0x18, 0x8000);
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}
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static inline int mv88e6352_eeprom_load_wait(struct dsa_switch *ds)
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{
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return mv88e6352_wait(ds, REG_GLOBAL2, 0x14, 0x0800);
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}
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static inline int mv88e6352_eeprom_busy_wait(struct dsa_switch *ds)
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{
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return mv88e6352_wait(ds, REG_GLOBAL2, 0x14, 0x8000);
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}
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static int __mv88e6352_phy_read(struct dsa_switch *ds, int addr, int regnum)
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{
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int ret;
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REG_WRITE(REG_GLOBAL2, 0x18, 0x9800 | (addr << 5) | regnum);
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ret = mv88e6352_phy_wait(ds);
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if (ret < 0)
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return ret;
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return REG_READ(REG_GLOBAL2, 0x19);
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}
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static int __mv88e6352_phy_write(struct dsa_switch *ds, int addr, int regnum,
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u16 val)
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{
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REG_WRITE(REG_GLOBAL2, 0x19, val);
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REG_WRITE(REG_GLOBAL2, 0x18, 0x9400 | (addr << 5) | regnum);
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return mv88e6352_phy_wait(ds);
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}
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static char *mv88e6352_probe(struct device *host_dev, int sw_addr)
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{
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struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev);
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@ -346,12 +293,12 @@ static int mv88e6352_phy_page_read(struct dsa_switch *ds,
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int ret;
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mutex_lock(&ps->phy_mutex);
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ret = __mv88e6352_phy_write(ds, port, 0x16, page);
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ret = mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);
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if (ret < 0)
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goto error;
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ret = __mv88e6352_phy_read(ds, port, reg);
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ret = mv88e6xxx_phy_read_indirect(ds, port, reg);
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error:
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__mv88e6352_phy_write(ds, port, 0x16, 0x0);
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mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);
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mutex_unlock(&ps->phy_mutex);
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return ret;
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}
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@ -363,13 +310,13 @@ static int mv88e6352_phy_page_write(struct dsa_switch *ds,
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int ret;
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mutex_lock(&ps->phy_mutex);
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ret = __mv88e6352_phy_write(ds, port, 0x16, page);
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ret = mv88e6xxx_phy_write_indirect(ds, port, 0x16, page);
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if (ret < 0)
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goto error;
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ret = __mv88e6352_phy_write(ds, port, reg, val);
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ret = mv88e6xxx_phy_write_indirect(ds, port, reg, val);
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error:
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__mv88e6352_phy_write(ds, port, 0x16, 0x0);
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mv88e6xxx_phy_write_indirect(ds, port, 0x16, 0x0);
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mutex_unlock(&ps->phy_mutex);
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return ret;
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}
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@ -482,7 +429,7 @@ mv88e6352_phy_read(struct dsa_switch *ds, int port, int regnum)
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return addr;
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mutex_lock(&ps->phy_mutex);
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ret = __mv88e6352_phy_read(ds, addr, regnum);
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ret = mv88e6xxx_phy_read_indirect(ds, addr, regnum);
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mutex_unlock(&ps->phy_mutex);
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return ret;
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@ -499,7 +446,7 @@ mv88e6352_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
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return addr;
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mutex_lock(&ps->phy_mutex);
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ret = __mv88e6352_phy_write(ds, addr, regnum, val);
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ret = mv88e6xxx_phy_write_indirect(ds, addr, regnum, val);
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mutex_unlock(&ps->phy_mutex);
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return ret;
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@ -553,7 +500,7 @@ static int mv88e6352_read_eeprom_word(struct dsa_switch *ds, int addr)
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if (ret < 0)
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goto error;
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ret = mv88e6352_eeprom_busy_wait(ds);
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ret = mv88e6xxx_eeprom_busy_wait(ds);
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if (ret < 0)
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goto error;
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@ -576,7 +523,7 @@ static int mv88e6352_get_eeprom(struct dsa_switch *ds,
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eeprom->magic = 0xc3ec4951;
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ret = mv88e6352_eeprom_load_wait(ds);
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ret = mv88e6xxx_eeprom_load_wait(ds);
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if (ret < 0)
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return ret;
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@ -657,7 +604,7 @@ static int mv88e6352_write_eeprom_word(struct dsa_switch *ds, int addr,
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if (ret < 0)
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goto error;
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ret = mv88e6352_eeprom_busy_wait(ds);
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ret = mv88e6xxx_eeprom_busy_wait(ds);
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error:
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mutex_unlock(&ps->eeprom_mutex);
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return ret;
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@ -681,7 +628,7 @@ static int mv88e6352_set_eeprom(struct dsa_switch *ds,
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len = eeprom->len;
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eeprom->len = 0;
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ret = mv88e6352_eeprom_load_wait(ds);
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ret = mv88e6xxx_eeprom_load_wait(ds);
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if (ret < 0)
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return ret;
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@ -596,6 +596,59 @@ int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp)
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}
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#endif /* CONFIG_NET_DSA_HWMON */
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static int mv88e6xxx_wait(struct dsa_switch *ds, int reg, int offset, u16 mask)
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{
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unsigned long timeout = jiffies + HZ / 10;
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while (time_before(jiffies, timeout)) {
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int ret;
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ret = REG_READ(reg, offset);
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if (!(ret & mask))
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return 0;
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usleep_range(1000, 2000);
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}
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return -ETIMEDOUT;
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}
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int mv88e6xxx_phy_wait(struct dsa_switch *ds)
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{
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return mv88e6xxx_wait(ds, REG_GLOBAL2, 0x18, 0x8000);
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}
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int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds)
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{
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return mv88e6xxx_wait(ds, REG_GLOBAL2, 0x14, 0x0800);
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}
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int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds)
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{
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return mv88e6xxx_wait(ds, REG_GLOBAL2, 0x14, 0x8000);
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}
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int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum)
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{
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int ret;
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REG_WRITE(REG_GLOBAL2, 0x18, 0x9800 | (addr << 5) | regnum);
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ret = mv88e6xxx_phy_wait(ds);
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if (ret < 0)
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return ret;
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return REG_READ(REG_GLOBAL2, 0x19);
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}
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int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,
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u16 val)
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{
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REG_WRITE(REG_GLOBAL2, 0x19, val);
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REG_WRITE(REG_GLOBAL2, 0x18, 0x9400 | (addr << 5) | regnum);
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return mv88e6xxx_phy_wait(ds);
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}
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static int __init mv88e6xxx_init(void)
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{
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#if IS_ENABLED(CONFIG_NET_DSA_MV88E6131)
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@ -82,6 +82,12 @@ int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port);
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void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
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struct ethtool_regs *regs, void *_p);
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int mv88e6xxx_get_temp(struct dsa_switch *ds, int *temp);
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int mv88e6xxx_phy_wait(struct dsa_switch *ds);
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int mv88e6xxx_eeprom_load_wait(struct dsa_switch *ds);
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int mv88e6xxx_eeprom_busy_wait(struct dsa_switch *ds);
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int mv88e6xxx_phy_read_indirect(struct dsa_switch *ds, int addr, int regnum);
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int mv88e6xxx_phy_write_indirect(struct dsa_switch *ds, int addr, int regnum,
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u16 val);
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extern struct dsa_switch_driver mv88e6131_switch_driver;
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extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
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