s390/uaccess: always load the kernel ASCE after task switch
This patch fixes a problem introduced with git commit beef560b4c
"s390/uaccess: simplify control register updates".
The switch_mm function is not called if the next process is a kernel
thread without an attached mm or is a nop if the mm does not change.
But CR1 still needs to be loaded with the kernel ASCE in case the
code returns to a uaccess function that uses the secondary space mode.
In addition move the set_fs call from finish_arch_switch to
finish_arch_post_lock_switch and then remove finish_arch_switch.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
parent
c1a42f49b2
commit
f8b1350560
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@ -33,10 +33,9 @@ static inline int init_new_context(struct task_struct *tsk,
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static inline void set_user_asce(struct mm_struct *mm)
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static inline void set_user_asce(struct mm_struct *mm)
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{
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{
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pgd_t *pgd = mm->pgd;
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S390_lowcore.user_asce = mm->context.asce_bits | __pa(mm->pgd);
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if (current->thread.mm_segment.ar4)
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S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd);
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__ctl_load(S390_lowcore.user_asce, 7, 7);
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set_fs(current->thread.mm_segment);
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set_cpu_flag(CIF_ASCE);
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set_cpu_flag(CIF_ASCE);
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}
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}
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@ -70,12 +69,11 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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/* Clear old ASCE by loading the kernel ASCE. */
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/* Clear old ASCE by loading the kernel ASCE. */
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__ctl_load(S390_lowcore.kernel_asce, 1, 1);
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__ctl_load(S390_lowcore.kernel_asce, 1, 1);
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__ctl_load(S390_lowcore.kernel_asce, 7, 7);
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__ctl_load(S390_lowcore.kernel_asce, 7, 7);
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/* Delay loading of the new ASCE to control registers CR1 & CR7 */
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set_cpu_flag(CIF_ASCE);
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atomic_inc(&next->context.attach_count);
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atomic_inc(&next->context.attach_count);
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atomic_dec(&prev->context.attach_count);
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atomic_dec(&prev->context.attach_count);
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if (MACHINE_HAS_TLB_LC)
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if (MACHINE_HAS_TLB_LC)
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cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
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cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
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S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
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}
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}
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#define finish_arch_post_lock_switch finish_arch_post_lock_switch
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#define finish_arch_post_lock_switch finish_arch_post_lock_switch
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@ -84,17 +82,18 @@ static inline void finish_arch_post_lock_switch(void)
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struct task_struct *tsk = current;
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struct task_struct *tsk = current;
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struct mm_struct *mm = tsk->mm;
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struct mm_struct *mm = tsk->mm;
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if (!mm)
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load_kernel_asce();
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return;
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if (mm) {
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preempt_disable();
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preempt_disable();
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while (atomic_read(&mm->context.attach_count) >> 16)
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while (atomic_read(&mm->context.attach_count) >> 16)
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cpu_relax();
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cpu_relax();
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
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cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
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set_user_asce(mm);
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if (mm->context.flush_mm)
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if (mm->context.flush_mm)
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__tlb_flush_mm(mm);
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__tlb_flush_mm(mm);
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preempt_enable();
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preempt_enable();
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}
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set_fs(current->thread.mm_segment);
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}
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}
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#define enter_lazy_tlb(mm,tsk) do { } while (0)
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#define enter_lazy_tlb(mm,tsk) do { } while (0)
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@ -134,8 +134,4 @@ static inline void restore_access_regs(unsigned int *acrs)
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prev = __switch_to(prev,next); \
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prev = __switch_to(prev,next); \
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} while (0)
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} while (0)
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#define finish_arch_switch(prev) do { \
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set_fs(current->thread.mm_segment); \
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} while (0)
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#endif /* __ASM_SWITCH_TO_H */
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#endif /* __ASM_SWITCH_TO_H */
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