usb: musb: Fix up DMA related macros
Pass struct musb to tusb_dma_omap() and is_cppi_enabled(), and add macros for the other DMA controllers. Populate the platform specific quirks with the DMA type and use it during runtime. Note that platform glue layers with no custom DMA code are tagged with MUSB_DMA_INVENTRA which may have a chance of working. Looks like the defconfigs for these use PIO_ONLY, so this should not break existing configs. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
parent
e499123ed7
commit
f8e9f34f80
|
@ -438,7 +438,7 @@ static void am35x_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
|
|||
}
|
||||
|
||||
static const struct musb_platform_ops am35x_ops = {
|
||||
.quirks = MUSB_INDEXED_EP,
|
||||
.quirks = MUSB_DMA_INVENTRA | MUSB_INDEXED_EP,
|
||||
.init = am35x_musb_init,
|
||||
.exit = am35x_musb_exit,
|
||||
|
||||
|
|
|
@ -465,6 +465,7 @@ static int bfin_musb_exit(struct musb *musb)
|
|||
}
|
||||
|
||||
static const struct musb_platform_ops bfin_ops = {
|
||||
.quirks = MUSB_DMA_INVENTRA,
|
||||
.init = bfin_musb_init,
|
||||
.exit = bfin_musb_exit,
|
||||
|
||||
|
|
|
@ -458,7 +458,7 @@ static int da8xx_musb_exit(struct musb *musb)
|
|||
}
|
||||
|
||||
static const struct musb_platform_ops da8xx_ops = {
|
||||
.quirks = MUSB_INDEXED_EP,
|
||||
.quirks = MUSB_DMA_CPPI | MUSB_INDEXED_EP,
|
||||
.init = da8xx_musb_init,
|
||||
.exit = da8xx_musb_exit,
|
||||
|
||||
|
|
|
@ -284,7 +284,7 @@ static irqreturn_t davinci_musb_interrupt(int irq, void *__hci)
|
|||
* mask, state, "vector", and EOI registers.
|
||||
*/
|
||||
cppi = container_of(musb->dma_controller, struct cppi, controller);
|
||||
if (is_cppi_enabled() && musb->dma_controller && !cppi->irq)
|
||||
if (is_cppi_enabled(musb) && musb->dma_controller && !cppi->irq)
|
||||
retval = cppi_interrupt(irq, __hci);
|
||||
|
||||
/* ack and handle non-CPPI interrupts */
|
||||
|
@ -491,6 +491,7 @@ static int davinci_musb_exit(struct musb *musb)
|
|||
}
|
||||
|
||||
static const struct musb_platform_ops davinci_ops = {
|
||||
.quirks = MUSB_DMA_CPPI,
|
||||
.init = davinci_musb_init,
|
||||
.exit = davinci_musb_exit,
|
||||
|
||||
|
|
|
@ -106,7 +106,7 @@ static int jz4740_musb_exit(struct musb *musb)
|
|||
}
|
||||
|
||||
static const struct musb_platform_ops jz4740_musb_ops = {
|
||||
.quirks = MUSB_INDEXED_EP,
|
||||
.quirks = MUSB_DMA_INVENTRA | MUSB_INDEXED_EP,
|
||||
.fifo_mode = 2,
|
||||
.init = jz4740_musb_init,
|
||||
.exit = jz4740_musb_exit,
|
||||
|
|
|
@ -1659,7 +1659,7 @@ void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit)
|
|||
|
||||
if (!epnum) {
|
||||
#ifndef CONFIG_USB_TUSB_OMAP_DMA
|
||||
if (!is_cppi_enabled()) {
|
||||
if (!is_cppi_enabled(musb)) {
|
||||
/* endpoint 0 */
|
||||
if (is_host_active(musb))
|
||||
musb_h_ep0_irq(musb);
|
||||
|
|
|
@ -68,16 +68,41 @@ struct musb_hw_ep;
|
|||
#define is_dma_capable() (1)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB_TI_CPPI_DMA) || defined(CONFIG_USB_TI_CPPI41_DMA)
|
||||
#define is_cppi_enabled() 1
|
||||
#ifdef CONFIG_USB_UX500_DMA
|
||||
#define musb_dma_ux500(musb) (musb->io.quirks & MUSB_DMA_UX500)
|
||||
#else
|
||||
#define is_cppi_enabled() 0
|
||||
#define musb_dma_ux500(musb) 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_TI_CPPI41_DMA
|
||||
#define musb_dma_cppi41(musb) (musb->io.quirks & MUSB_DMA_CPPI41)
|
||||
#else
|
||||
#define musb_dma_cppi41(musb) 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_TI_CPPI_DMA
|
||||
#define musb_dma_cppi(musb) (musb->io.quirks & MUSB_DMA_CPPI)
|
||||
#else
|
||||
#define musb_dma_cppi(musb) 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_TUSB_OMAP_DMA
|
||||
#define tusb_dma_omap() 1
|
||||
#define tusb_dma_omap(musb) (musb->io.quirks & MUSB_DMA_TUSB_OMAP)
|
||||
#else
|
||||
#define tusb_dma_omap() 0
|
||||
#define tusb_dma_omap(musb) 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_USB_INVENTRA_DMA
|
||||
#define musb_dma_inventra(musb) (musb->io.quirks & MUSB_DMA_INVENTRA)
|
||||
#else
|
||||
#define musb_dma_inventra(musb) 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_USB_TI_CPPI_DMA) || defined(CONFIG_USB_TI_CPPI41_DMA)
|
||||
#define is_cppi_enabled(musb) \
|
||||
(musb_dma_cppi(musb) || musb_dma_cppi41(musb))
|
||||
#else
|
||||
#define is_cppi_enabled(musb) 0
|
||||
#endif
|
||||
|
||||
/* Anomaly 05000456 - USB Receive Interrupt Is Not Generated in DMA Mode 1
|
||||
|
|
|
@ -634,7 +634,7 @@ static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
|
|||
}
|
||||
|
||||
static struct musb_platform_ops dsps_ops = {
|
||||
.quirks = MUSB_INDEXED_EP,
|
||||
.quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
|
||||
.init = dsps_musb_init,
|
||||
.exit = dsps_musb_exit,
|
||||
|
||||
|
|
|
@ -366,7 +366,7 @@ static void txstate(struct musb *musb, struct musb_request *req)
|
|||
}
|
||||
|
||||
#endif
|
||||
if (is_cppi_enabled()) {
|
||||
if (is_cppi_enabled(musb)) {
|
||||
/* program endpoint CSR first, then setup DMA */
|
||||
csr &= ~(MUSB_TXCSR_P_UNDERRUN | MUSB_TXCSR_TXPKTRDY);
|
||||
csr |= MUSB_TXCSR_DMAENAB | MUSB_TXCSR_DMAMODE |
|
||||
|
@ -402,7 +402,7 @@ static void txstate(struct musb *musb, struct musb_request *req)
|
|||
musb_writew(epio, MUSB_TXCSR, csr);
|
||||
/* invariant: prequest->buf is non-null */
|
||||
}
|
||||
} else if (tusb_dma_omap())
|
||||
} else if (tusb_dma_omap(musb))
|
||||
use_dma = use_dma && c->channel_program(
|
||||
musb_ep->dma, musb_ep->packet_sz,
|
||||
request->zero,
|
||||
|
@ -595,7 +595,7 @@ static void rxstate(struct musb *musb, struct musb_request *req)
|
|||
return;
|
||||
}
|
||||
|
||||
if (is_cppi_enabled() && is_buffer_mapped(req)) {
|
||||
if (is_cppi_enabled(musb) && is_buffer_mapped(req)) {
|
||||
struct dma_controller *c = musb->dma_controller;
|
||||
struct dma_channel *channel = musb_ep->dma;
|
||||
|
||||
|
@ -772,7 +772,7 @@ static void rxstate(struct musb *musb, struct musb_request *req)
|
|||
fifo_count = min_t(unsigned, len, fifo_count);
|
||||
|
||||
#ifdef CONFIG_USB_TUSB_OMAP_DMA
|
||||
if (tusb_dma_omap() && is_buffer_mapped(req)) {
|
||||
if (tusb_dma_omap(musb) && is_buffer_mapped(req)) {
|
||||
struct dma_controller *c = musb->dma_controller;
|
||||
struct dma_channel *channel = musb_ep->dma;
|
||||
u32 dma_addr = request->dma + request->actual;
|
||||
|
|
|
@ -181,7 +181,7 @@ static inline void musb_h_tx_dma_start(struct musb_hw_ep *ep)
|
|||
/* NOTE: no locks here; caller should lock and select EP */
|
||||
txcsr = musb_readw(ep->regs, MUSB_TXCSR);
|
||||
txcsr |= MUSB_TXCSR_DMAENAB | MUSB_TXCSR_H_WZC_BITS;
|
||||
if (is_cppi_enabled())
|
||||
if (is_cppi_enabled(ep->musb))
|
||||
txcsr |= MUSB_TXCSR_DMAMODE;
|
||||
musb_writew(ep->regs, MUSB_TXCSR, txcsr);
|
||||
}
|
||||
|
@ -294,7 +294,7 @@ musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh)
|
|||
|
||||
if (!hw_ep->tx_channel)
|
||||
musb_h_tx_start(hw_ep);
|
||||
else if (is_cppi_enabled() || tusb_dma_omap())
|
||||
else if (is_cppi_enabled(musb) || tusb_dma_omap(musb))
|
||||
musb_h_tx_dma_start(hw_ep);
|
||||
}
|
||||
}
|
||||
|
@ -656,7 +656,7 @@ static bool musb_tx_dma_program(struct dma_controller *dma,
|
|||
channel->desired_mode = mode;
|
||||
musb_writew(epio, MUSB_TXCSR, csr);
|
||||
#else
|
||||
if (!is_cppi_enabled() && !tusb_dma_omap())
|
||||
if (!is_cppi_enabled(hw_ep->musb) && !tusb_dma_omap(hw_ep->musb))
|
||||
return false;
|
||||
|
||||
channel->actual_len = 0;
|
||||
|
@ -901,7 +901,7 @@ static void musb_ep_program(struct musb *musb, u8 epnum,
|
|||
|
||||
/* kick things off */
|
||||
|
||||
if ((is_cppi_enabled() || tusb_dma_omap()) && dma_channel) {
|
||||
if ((is_cppi_enabled(musb) || tusb_dma_omap(musb)) && dma_channel) {
|
||||
/* Candidate for DMA */
|
||||
dma_channel->actual_len = 0L;
|
||||
qh->segsize = len;
|
||||
|
@ -1441,7 +1441,7 @@ void musb_host_tx(struct musb *musb, u8 epnum)
|
|||
} else if ((usb_pipeisoc(pipe) || transfer_pending) && dma) {
|
||||
if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb,
|
||||
offset, length)) {
|
||||
if (is_cppi_enabled() || tusb_dma_omap())
|
||||
if (is_cppi_enabled(musb) || tusb_dma_omap(musb))
|
||||
musb_h_tx_dma_start(hw_ep);
|
||||
return;
|
||||
}
|
||||
|
|
|
@ -493,6 +493,7 @@ static int omap2430_musb_exit(struct musb *musb)
|
|||
}
|
||||
|
||||
static const struct musb_platform_ops omap2430_ops = {
|
||||
.quirks = MUSB_DMA_INVENTRA,
|
||||
.init = omap2430_musb_init,
|
||||
.exit = omap2430_musb_exit,
|
||||
|
||||
|
|
|
@ -890,7 +890,7 @@ static irqreturn_t tusb_musb_interrupt(int irq, void *__hci)
|
|||
|
||||
dev_dbg(musb->controller, "DMA IRQ %08x\n", dma_src);
|
||||
real_dma_src = ~real_dma_src & dma_src;
|
||||
if (tusb_dma_omap() && real_dma_src) {
|
||||
if (tusb_dma_omap(musb) && real_dma_src) {
|
||||
int tx_source = (real_dma_src & 0xffff);
|
||||
int i;
|
||||
|
||||
|
@ -1181,7 +1181,7 @@ static int tusb_musb_exit(struct musb *musb)
|
|||
}
|
||||
|
||||
static const struct musb_platform_ops tusb_ops = {
|
||||
.quirks = MUSB_IN_TUSB,
|
||||
.quirks = MUSB_DMA_TUSB_OMAP | MUSB_IN_TUSB,
|
||||
.init = tusb_musb_init,
|
||||
.exit = tusb_musb_exit,
|
||||
|
||||
|
|
|
@ -12,12 +12,6 @@
|
|||
#ifndef __TUSB6010_H__
|
||||
#define __TUSB6010_H__
|
||||
|
||||
#ifdef CONFIG_USB_TUSB_OMAP_DMA
|
||||
#define tusb_dma_omap() 1
|
||||
#else
|
||||
#define tusb_dma_omap() 0
|
||||
#endif
|
||||
|
||||
/* VLYNQ control register. 32-bit at offset 0x000 */
|
||||
#define TUSB_VLYNQ_CTRL 0x004
|
||||
|
||||
|
|
|
@ -188,7 +188,7 @@ static int ux500_musb_exit(struct musb *musb)
|
|||
}
|
||||
|
||||
static const struct musb_platform_ops ux500_ops = {
|
||||
.quirks = MUSB_INDEXED_EP,
|
||||
.quirks = MUSB_DMA_UX500 | MUSB_INDEXED_EP,
|
||||
.init = ux500_musb_init,
|
||||
.exit = ux500_musb_exit,
|
||||
.fifo_mode = 5,
|
||||
|
|
Loading…
Reference in New Issue