ARM: OMAP4: PRM: Remove hardcoding of PRM_IO_PMCTRL_OFFSET register
PRM_IO_PMCTRL_OFFSET need not be same for all SOCs hence remove hardcoding and use the value provided by the omap_prcm_irq_setup structure. This is done to support IO wakeup on am437x series. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -472,6 +472,7 @@ struct omap_prcm_irq {
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* struct omap_prcm_irq_setup - PRCM interrupt controller details
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* @ack: PRM register offset for the first PRM_IRQSTATUS_MPU register
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* @mask: PRM register offset for the first PRM_IRQENABLE_MPU register
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* @pm_ctrl: PRM register offset for the PRM_IO_PMCTRL register
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* @nr_regs: number of PRM_IRQ{STATUS,ENABLE}_MPU* registers
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* @nr_irqs: number of entries in the @irqs array
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* @irqs: ptr to an array of PRCM interrupt bits (see @nr_irqs)
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@ -494,6 +495,7 @@ struct omap_prcm_irq {
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struct omap_prcm_irq_setup {
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u16 ack;
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u16 mask;
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u16 pm_ctrl;
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u8 nr_regs;
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u8 nr_irqs;
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const struct omap_prcm_irq *irqs;
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@ -45,6 +45,7 @@ static const struct omap_prcm_irq omap4_prcm_irqs[] = {
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static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
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.ack = OMAP4_PRM_IRQSTATUS_MPU_OFFSET,
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.mask = OMAP4_PRM_IRQENABLE_MPU_OFFSET,
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.pm_ctrl = OMAP4_PRM_IO_PMCTRL_OFFSET,
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.nr_regs = 2,
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.irqs = omap4_prcm_irqs,
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.nr_irqs = ARRAY_SIZE(omap4_prcm_irqs),
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@ -306,10 +307,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
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omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK,
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OMAP4430_WUCLK_CTRL_MASK,
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inst,
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OMAP4_PRM_IO_PMCTRL_OFFSET);
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omap4_prcm_irq_setup.pm_ctrl);
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omap_test_timeout(
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(((omap4_prm_read_inst_reg(inst,
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OMAP4_PRM_IO_PMCTRL_OFFSET) &
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omap4_prcm_irq_setup.pm_ctrl) &
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OMAP4430_WUCLK_STATUS_MASK) >>
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OMAP4430_WUCLK_STATUS_SHIFT) == 1),
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MAX_IOPAD_LATCH_TIME, i);
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@ -319,10 +320,10 @@ static void omap44xx_prm_reconfigure_io_chain(void)
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/* Trigger WUCLKIN disable */
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omap4_prm_rmw_inst_reg_bits(OMAP4430_WUCLK_CTRL_MASK, 0x0,
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inst,
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OMAP4_PRM_IO_PMCTRL_OFFSET);
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omap4_prcm_irq_setup.pm_ctrl);
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omap_test_timeout(
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(((omap4_prm_read_inst_reg(inst,
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OMAP4_PRM_IO_PMCTRL_OFFSET) &
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omap4_prcm_irq_setup.pm_ctrl) &
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OMAP4430_WUCLK_STATUS_MASK) >>
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OMAP4430_WUCLK_STATUS_SHIFT) == 0),
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MAX_IOPAD_LATCH_TIME, i);
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@ -350,7 +351,7 @@ static void __init omap44xx_prm_enable_io_wakeup(void)
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omap4_prm_rmw_inst_reg_bits(OMAP4430_GLOBAL_WUEN_MASK,
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OMAP4430_GLOBAL_WUEN_MASK,
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inst,
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OMAP4_PRM_IO_PMCTRL_OFFSET);
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omap4_prcm_irq_setup.pm_ctrl);
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}
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/**
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