ath9k: Add channel context structure
The channel context structure is defined to enable multi-channel concurrency support. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
parent
6437f51ec3
commit
fbbcd14690
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@ -5,7 +5,8 @@ ath9k-y += beacon.o \
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recv.o \
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recv.o \
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xmit.o \
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xmit.o \
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link.o \
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link.o \
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antenna.o
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antenna.o \
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channel.o
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ath9k-$(CONFIG_ATH9K_BTCOEX_SUPPORT) += mci.o
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ath9k-$(CONFIG_ATH9K_BTCOEX_SUPPORT) += mci.o
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ath9k-$(CONFIG_ATH9K_PCI) += pci.o
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ath9k-$(CONFIG_ATH9K_PCI) += pci.o
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@ -325,6 +325,16 @@ struct ath_rx {
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u32 ampdu_ref;
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u32 ampdu_ref;
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};
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};
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struct ath_chanctx {
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struct cfg80211_chan_def chandef;
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struct list_head vifs;
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bool offchannel;
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};
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void ath_chanctx_init(struct ath_softc *sc);
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int ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
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struct cfg80211_chan_def *chandef);
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int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan);
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int ath_startrecv(struct ath_softc *sc);
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int ath_startrecv(struct ath_softc *sc);
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bool ath_stoprecv(struct ath_softc *sc);
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bool ath_stoprecv(struct ath_softc *sc);
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u32 ath_calcrxfilter(struct ath_softc *sc);
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u32 ath_calcrxfilter(struct ath_softc *sc);
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@ -370,12 +380,15 @@ void ath9k_release_buffered_frames(struct ieee80211_hw *hw,
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/********/
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/********/
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struct ath_vif {
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struct ath_vif {
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struct list_head list;
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struct ieee80211_vif *vif;
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struct ieee80211_vif *vif;
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struct ath_node mcast_node;
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struct ath_node mcast_node;
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int av_bslot;
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int av_bslot;
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bool primary_sta_vif;
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bool primary_sta_vif;
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__le64 tsf_adjust; /* TSF adjustment for staggered beacons */
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__le64 tsf_adjust; /* TSF adjustment for staggered beacons */
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struct ath_buf *av_bcbuf;
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struct ath_buf *av_bcbuf;
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struct ath_chanctx *chanctx;
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/* P2P Client */
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/* P2P Client */
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struct ieee80211_noa_data noa;
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struct ieee80211_noa_data noa;
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@ -702,6 +715,8 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
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#define PS_BEACON_SYNC BIT(4)
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#define PS_BEACON_SYNC BIT(4)
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#define PS_WAIT_FOR_ANI BIT(5)
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#define PS_WAIT_FOR_ANI BIT(5)
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#define ATH9K_NUM_CHANCTX 2 /* supports 2 operating channels */
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struct ath_softc {
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struct ath_softc {
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struct ieee80211_hw *hw;
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struct ieee80211_hw *hw;
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struct device *dev;
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struct device *dev;
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@ -743,6 +758,9 @@ struct ath_softc {
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struct ath_tx tx;
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struct ath_tx tx;
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struct ath_beacon beacon;
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struct ath_beacon beacon;
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struct ath_chanctx chanctx[ATH9K_NUM_CHANCTX];
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struct ath_chanctx *cur_chan;
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#ifdef CONFIG_MAC80211_LEDS
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#ifdef CONFIG_MAC80211_LEDS
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bool led_registered;
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bool led_registered;
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char led_name[32];
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char led_name[32];
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@ -0,0 +1,133 @@
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/*
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* Copyright (c) 2014 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "ath9k.h"
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/* Set/change channels. If the channel is really being changed, it's done
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* by reseting the chip. To accomplish this we must first cleanup any pending
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* DMA, then restart stuff.
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*/
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static int ath_set_channel(struct ath_softc *sc)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ieee80211_hw *hw = sc->hw;
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struct ath9k_channel *hchan;
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struct cfg80211_chan_def *chandef = &sc->cur_chan->chandef;
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struct ieee80211_channel *chan = chandef->chan;
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int pos = chan->hw_value;
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int old_pos = -1;
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int r;
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if (test_bit(ATH_OP_INVALID, &common->op_flags))
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return -EIO;
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if (ah->curchan)
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old_pos = ah->curchan - &ah->channels[0];
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ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
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chan->center_freq, chandef->width);
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/* update survey stats for the old channel before switching */
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spin_lock_bh(&common->cc_lock);
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ath_update_survey_stats(sc);
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spin_unlock_bh(&common->cc_lock);
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ath9k_cmn_get_channel(hw, ah, chandef);
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/* If the operating channel changes, change the survey in-use flags
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* along with it.
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* Reset the survey data for the new channel, unless we're switching
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* back to the operating channel from an off-channel operation.
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*/
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if (!sc->cur_chan->offchannel && sc->cur_survey != &sc->survey[pos]) {
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if (sc->cur_survey)
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sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
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sc->cur_survey = &sc->survey[pos];
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memset(sc->cur_survey, 0, sizeof(struct survey_info));
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sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
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} else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
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memset(&sc->survey[pos], 0, sizeof(struct survey_info));
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}
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hchan = &sc->sc_ah->channels[pos];
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r = ath_reset_internal(sc, hchan);
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if (r)
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return r;
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/* The most recent snapshot of channel->noisefloor for the old
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* channel is only available after the hardware reset. Copy it to
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* the survey stats now.
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*/
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if (old_pos >= 0)
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ath_update_survey_nf(sc, old_pos);
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/* Enable radar pulse detection if on a DFS channel. Spectral
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* scanning and radar detection can not be used concurrently.
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*/
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if (hw->conf.radar_enabled) {
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u32 rxfilter;
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/* set HW specific DFS configuration */
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ath9k_hw_set_radar_params(ah);
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rxfilter = ath9k_hw_getrxfilter(ah);
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rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
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ATH9K_RX_FILTER_PHYERR;
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ath9k_hw_setrxfilter(ah, rxfilter);
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ath_dbg(common, DFS, "DFS enabled at freq %d\n",
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chan->center_freq);
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} else {
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/* perform spectral scan if requested. */
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if (test_bit(ATH_OP_SCANNING, &common->op_flags) &&
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sc->spectral_mode == SPECTRAL_CHANSCAN)
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ath9k_spectral_scan_trigger(hw);
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}
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return 0;
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}
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void ath_chanctx_init(struct ath_softc *sc)
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{
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struct ath_chanctx *ctx;
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struct ath_common *common = ath9k_hw_common(sc->sc_ah);
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struct ieee80211_supported_band *sband;
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struct ieee80211_channel *chan;
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int i;
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sband = &common->sbands[IEEE80211_BAND_2GHZ];
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if (!sband->n_channels)
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sband = &common->sbands[IEEE80211_BAND_5GHZ];
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chan = &sband->channels[0];
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for (i = 0; i < ATH9K_NUM_CHANCTX; i++) {
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ctx = &sc->chanctx[i];
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cfg80211_chandef_create(&ctx->chandef, chan, NL80211_CHAN_HT20);
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INIT_LIST_HEAD(&ctx->vifs);
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}
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sc->cur_chan = &sc->chanctx[0];
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}
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int ath_chanctx_set_channel(struct ath_softc *sc, struct ath_chanctx *ctx,
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struct cfg80211_chan_def *chandef)
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{
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memcpy(&ctx->chandef, chandef, sizeof(ctx->chandef));
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if (ctx != sc->cur_chan)
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return 0;
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return ath_set_channel(sc);
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}
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@ -599,6 +599,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
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ath9k_cmn_init_crypto(sc->sc_ah);
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ath9k_cmn_init_crypto(sc->sc_ah);
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ath9k_init_misc(sc);
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ath9k_init_misc(sc);
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ath_fill_led_pin(sc);
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ath_fill_led_pin(sc);
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ath_chanctx_init(sc);
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if (common->bus_ops->aspm_init)
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if (common->bus_ops->aspm_init)
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common->bus_ops->aspm_init(common);
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common->bus_ops->aspm_init(common);
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@ -416,7 +416,7 @@ void ath_start_ani(struct ath_softc *sc)
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if (common->disable_ani ||
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if (common->disable_ani ||
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!test_bit(ATH_OP_ANI_RUN, &common->op_flags) ||
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!test_bit(ATH_OP_ANI_RUN, &common->op_flags) ||
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(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
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sc->cur_chan->offchannel)
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return;
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return;
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common->ani.longcal_timer = timestamp;
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common->ani.longcal_timer = timestamp;
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@ -233,7 +233,7 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start)
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ath9k_hw_set_interrupts(ah);
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ath9k_hw_set_interrupts(ah);
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ath9k_hw_enable_interrupts(ah);
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ath9k_hw_enable_interrupts(ah);
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if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) && start) {
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if (!sc->cur_chan->offchannel && start) {
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if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
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if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
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goto work;
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goto work;
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@ -266,7 +266,7 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start)
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return true;
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return true;
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}
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}
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static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
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int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
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{
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ath_common *common = ath9k_hw_common(ah);
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@ -279,7 +279,7 @@ static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
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tasklet_disable(&sc->intr_tq);
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tasklet_disable(&sc->intr_tq);
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spin_lock_bh(&sc->sc_pcu_lock);
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spin_lock_bh(&sc->sc_pcu_lock);
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if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
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if (!sc->cur_chan->offchannel) {
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fastcc = false;
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fastcc = false;
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caldata = &sc->caldata;
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caldata = &sc->caldata;
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}
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}
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@ -307,7 +307,7 @@ static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
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}
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}
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if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
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if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
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(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL))
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sc->cur_chan->offchannel)
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ath9k_mci_set_txpower(sc, true, false);
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ath9k_mci_set_txpower(sc, true, false);
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if (!ath_complete_reset(sc, true))
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if (!ath_complete_reset(sc, true))
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@ -320,98 +320,6 @@ static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
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return r;
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return r;
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}
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}
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/*
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* Set/change channels. If the channel is really being changed, it's done
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* by reseting the chip. To accomplish this we must first cleanup any pending
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* DMA, then restart stuff.
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*/
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static int ath_set_channel(struct ath_softc *sc, struct cfg80211_chan_def *chandef)
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{
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struct ath_hw *ah = sc->sc_ah;
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struct ath_common *common = ath9k_hw_common(ah);
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struct ieee80211_hw *hw = sc->hw;
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struct ath9k_channel *hchan;
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struct ieee80211_channel *chan = chandef->chan;
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bool offchannel;
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int pos = chan->hw_value;
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int old_pos = -1;
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int r;
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if (test_bit(ATH_OP_INVALID, &common->op_flags))
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return -EIO;
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offchannel = !!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL);
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if (ah->curchan)
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old_pos = ah->curchan - &ah->channels[0];
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ath_dbg(common, CONFIG, "Set channel: %d MHz width: %d\n",
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chan->center_freq, chandef->width);
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/* update survey stats for the old channel before switching */
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spin_lock_bh(&common->cc_lock);
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ath_update_survey_stats(sc);
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spin_unlock_bh(&common->cc_lock);
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ath9k_cmn_get_channel(hw, ah, chandef);
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/*
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* If the operating channel changes, change the survey in-use flags
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* along with it.
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* Reset the survey data for the new channel, unless we're switching
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* back to the operating channel from an off-channel operation.
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*/
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if (!offchannel && sc->cur_survey != &sc->survey[pos]) {
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if (sc->cur_survey)
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sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
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sc->cur_survey = &sc->survey[pos];
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memset(sc->cur_survey, 0, sizeof(struct survey_info));
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sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
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} else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
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memset(&sc->survey[pos], 0, sizeof(struct survey_info));
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}
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hchan = &sc->sc_ah->channels[pos];
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r = ath_reset_internal(sc, hchan);
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if (r)
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return r;
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/*
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* The most recent snapshot of channel->noisefloor for the old
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* channel is only available after the hardware reset. Copy it to
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* the survey stats now.
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*/
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if (old_pos >= 0)
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ath_update_survey_nf(sc, old_pos);
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/*
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* Enable radar pulse detection if on a DFS channel. Spectral
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* scanning and radar detection can not be used concurrently.
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*/
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if (hw->conf.radar_enabled) {
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u32 rxfilter;
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/* set HW specific DFS configuration */
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ath9k_hw_set_radar_params(ah);
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||||||
rxfilter = ath9k_hw_getrxfilter(ah);
|
|
||||||
rxfilter |= ATH9K_RX_FILTER_PHYRADAR |
|
|
||||||
ATH9K_RX_FILTER_PHYERR;
|
|
||||||
ath9k_hw_setrxfilter(ah, rxfilter);
|
|
||||||
ath_dbg(common, DFS, "DFS enabled at freq %d\n",
|
|
||||||
chan->center_freq);
|
|
||||||
} else {
|
|
||||||
/* perform spectral scan if requested. */
|
|
||||||
if (test_bit(ATH_OP_SCANNING, &common->op_flags) &&
|
|
||||||
sc->spectral_mode == SPECTRAL_CHANSCAN)
|
|
||||||
ath9k_spectral_scan_trigger(hw);
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
|
static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
|
||||||
struct ieee80211_vif *vif)
|
struct ieee80211_vif *vif)
|
||||||
{
|
{
|
||||||
|
@ -713,6 +621,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
||||||
struct ath_hw *ah = sc->sc_ah;
|
struct ath_hw *ah = sc->sc_ah;
|
||||||
struct ath_common *common = ath9k_hw_common(ah);
|
struct ath_common *common = ath9k_hw_common(ah);
|
||||||
struct ieee80211_channel *curchan = hw->conf.chandef.chan;
|
struct ieee80211_channel *curchan = hw->conf.chandef.chan;
|
||||||
|
struct ath_chanctx *ctx = sc->cur_chan;
|
||||||
struct ath9k_channel *init_channel;
|
struct ath9k_channel *init_channel;
|
||||||
int r;
|
int r;
|
||||||
|
|
||||||
|
@ -723,7 +632,8 @@ static int ath9k_start(struct ieee80211_hw *hw)
|
||||||
ath9k_ps_wakeup(sc);
|
ath9k_ps_wakeup(sc);
|
||||||
mutex_lock(&sc->mutex);
|
mutex_lock(&sc->mutex);
|
||||||
|
|
||||||
init_channel = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
|
memcpy(&ctx->chandef, &hw->conf.chandef, sizeof(ctx->chandef));
|
||||||
|
init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
|
||||||
|
|
||||||
/* Reset SERDES registers */
|
/* Reset SERDES registers */
|
||||||
ath9k_hw_configpcipowersave(ah, false);
|
ath9k_hw_configpcipowersave(ah, false);
|
||||||
|
@ -934,7 +844,8 @@ static void ath9k_stop(struct ieee80211_hw *hw)
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!ah->curchan)
|
if (!ah->curchan)
|
||||||
ah->curchan = ath9k_cmn_get_channel(hw, ah, &hw->conf.chandef);
|
ah->curchan = ath9k_cmn_get_channel(hw, ah,
|
||||||
|
&sc->cur_chan->chandef);
|
||||||
|
|
||||||
ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
|
ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
|
||||||
ath9k_hw_phy_disable(ah);
|
ath9k_hw_phy_disable(ah);
|
||||||
|
@ -1345,6 +1256,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
||||||
struct ath_hw *ah = sc->sc_ah;
|
struct ath_hw *ah = sc->sc_ah;
|
||||||
struct ath_common *common = ath9k_hw_common(ah);
|
struct ath_common *common = ath9k_hw_common(ah);
|
||||||
struct ieee80211_conf *conf = &hw->conf;
|
struct ieee80211_conf *conf = &hw->conf;
|
||||||
|
struct ath_chanctx *ctx = sc->cur_chan;
|
||||||
bool reset_channel = false;
|
bool reset_channel = false;
|
||||||
|
|
||||||
ath9k_ps_wakeup(sc);
|
ath9k_ps_wakeup(sc);
|
||||||
|
@ -1392,7 +1304,8 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
|
if ((changed & IEEE80211_CONF_CHANGE_CHANNEL) || reset_channel) {
|
||||||
if (ath_set_channel(sc, &hw->conf.chandef) < 0) {
|
ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
|
||||||
|
if (ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef) < 0) {
|
||||||
ath_err(common, "Unable to set channel\n");
|
ath_err(common, "Unable to set channel\n");
|
||||||
mutex_unlock(&sc->mutex);
|
mutex_unlock(&sc->mutex);
|
||||||
ath9k_ps_restore(sc);
|
ath9k_ps_restore(sc);
|
||||||
|
|
|
@ -259,7 +259,7 @@ static void ath_edma_start_recv(struct ath_softc *sc)
|
||||||
ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP);
|
ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP);
|
||||||
ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP);
|
ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP);
|
||||||
ath_opmode_init(sc);
|
ath_opmode_init(sc);
|
||||||
ath9k_hw_startpcureceive(sc->sc_ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
|
ath9k_hw_startpcureceive(sc->sc_ah, sc->cur_chan->offchannel);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ath_edma_stop_recv(struct ath_softc *sc)
|
static void ath_edma_stop_recv(struct ath_softc *sc)
|
||||||
|
@ -457,7 +457,7 @@ int ath_startrecv(struct ath_softc *sc)
|
||||||
|
|
||||||
start_recv:
|
start_recv:
|
||||||
ath_opmode_init(sc);
|
ath_opmode_init(sc);
|
||||||
ath9k_hw_startpcureceive(ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
|
ath9k_hw_startpcureceive(ah, sc->cur_chan->offchannel);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue