PCI: endpoint: Handle 64-bit BARs properly

If a 64-bit BAR was set-up, we need to skip a BAR,
since a 64-bit BAR consists of a BAR pair.

We need to check what BAR width the epc->ops->set_bar() specific
implementation actually did set-up, since some drivers, like the
Cadence EP controller, sometimes sets up a 64-bit BAR, even though
a 32-bit BAR was requested.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
Niklas Cassel 2018-03-28 13:50:13 +02:00 committed by Lorenzo Pieralisi
parent a2ea8ac4ec
commit fca8305875
1 changed files with 7 additions and 0 deletions

View File

@ -380,6 +380,13 @@ static int pci_epf_test_set_bar(struct pci_epf *epf)
if (bar == test_reg_bar) if (bar == test_reg_bar)
return ret; return ret;
} }
/*
* pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64
* if the specific implementation required a 64-bit BAR,
* even if we only requested a 32-bit BAR.
*/
if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
bar++;
} }
return 0; return 0;