gpio: merrifield: Protect irq_ack() and gpio_set() by lock
There is a potential race when two threads do the writes to the same register in parallel. Prevent out of order in such case by protecting I/O access by spin lock. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -105,7 +105,11 @@ static int mrfld_gpio_get(struct gpio_chip *chip, unsigned int offset)
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static void mrfld_gpio_set(struct gpio_chip *chip, unsigned int offset,
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int value)
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{
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struct mrfld_gpio *priv = gpiochip_get_data(chip);
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void __iomem *gpsr, *gpcr;
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unsigned long flags;
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raw_spin_lock_irqsave(&priv->lock, flags);
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if (value) {
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gpsr = gpio_reg(chip, offset, GPSR);
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@ -114,6 +118,8 @@ static void mrfld_gpio_set(struct gpio_chip *chip, unsigned int offset,
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gpcr = gpio_reg(chip, offset, GPCR);
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writel(BIT(offset % 32), gpcr);
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}
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raw_spin_unlock_irqrestore(&priv->lock, flags);
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}
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static int mrfld_gpio_direction_input(struct gpio_chip *chip,
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@ -160,8 +166,13 @@ static void mrfld_irq_ack(struct irq_data *d)
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struct mrfld_gpio *priv = irq_data_get_irq_chip_data(d);
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u32 gpio = irqd_to_hwirq(d);
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void __iomem *gisr = gpio_reg(&priv->chip, gpio, GISR);
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unsigned long flags;
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raw_spin_lock_irqsave(&priv->lock, flags);
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writel(BIT(gpio % 32), gisr);
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raw_spin_unlock_irqrestore(&priv->lock, flags);
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}
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static void mrfld_irq_unmask_mask(struct irq_data *d, bool unmask)
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