ARM: dts: use macros in clock bindings for exynos5250
The patch replaces magic numbers with macros defined in DT header in exynos5250 clock bindings. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Andrzej Hajda
Kukjin Kim
parent
1c75a78a49
commit
fe273c3e6f
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@ -13,163 +13,12 @@ Required Properties:
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- #clock-cells: should be 1.
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The following is the list of clocks generated by the controller. Each clock is
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assigned an identifier and client nodes use this identifier to specify the
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clock which they consume.
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[Core Clocks]
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Clock ID
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----------------------------
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fin_pll 1
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[Clock Gate for Special Clocks]
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Clock ID
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----------------------------
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sclk_cam_bayer 128
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sclk_cam0 129
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sclk_cam1 130
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sclk_gscl_wa 131
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sclk_gscl_wb 132
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sclk_fimd1 133
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sclk_mipi1 134
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sclk_dp 135
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sclk_hdmi 136
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sclk_pixel 137
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sclk_audio0 138
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sclk_mmc0 139
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sclk_mmc1 140
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sclk_mmc2 141
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sclk_mmc3 142
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sclk_sata 143
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sclk_usb3 144
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sclk_jpeg 145
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sclk_uart0 146
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sclk_uart1 147
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sclk_uart2 148
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sclk_uart3 149
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sclk_pwm 150
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sclk_audio1 151
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sclk_audio2 152
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sclk_spdif 153
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sclk_spi0 154
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sclk_spi1 155
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sclk_spi2 156
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div_i2s1 157
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div_i2s2 158
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sclk_hdmiphy 159
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div_pcm0 160
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[Peripheral Clock Gates]
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Clock ID
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----------------------------
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gscl0 256
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gscl1 257
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gscl2 258
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gscl3 259
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gscl_wa 260
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gscl_wb 261
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smmu_gscl0 262
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smmu_gscl1 263
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smmu_gscl2 264
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smmu_gscl3 265
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mfc 266
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smmu_mfcl 267
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smmu_mfcr 268
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rotator 269
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jpeg 270
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mdma1 271
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smmu_rotator 272
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smmu_jpeg 273
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smmu_mdma1 274
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pdma0 275
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pdma1 276
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sata 277
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usbotg 278
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mipi_hsi 279
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sdmmc0 280
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sdmmc1 281
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sdmmc2 282
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sdmmc3 283
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sromc 284
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usb2 285
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usb3 286
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sata_phyctrl 287
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sata_phyi2c 288
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uart0 289
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uart1 290
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uart2 291
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uart3 292
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uart4 293
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i2c0 294
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i2c1 295
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i2c2 296
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i2c3 297
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i2c4 298
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i2c5 299
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i2c6 300
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i2c7 301
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i2c_hdmi 302
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adc 303
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spi0 304
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spi1 305
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spi2 306
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i2s1 307
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i2s2 308
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pcm1 309
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pcm2 310
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pwm 311
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spdif 312
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ac97 313
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hsi2c0 314
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hsi2c1 315
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hs12c2 316
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hs12c3 317
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chipid 318
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sysreg 319
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pmu 320
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cmu_top 321
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cmu_core 322
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cmu_mem 323
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tzpc0 324
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tzpc1 325
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tzpc2 326
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tzpc3 327
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tzpc4 328
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tzpc5 329
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tzpc6 330
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tzpc7 331
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tzpc8 332
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tzpc9 333
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hdmi_cec 334
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mct 335
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wdt 336
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rtc 337
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tmu 338
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fimd1 339
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mie1 340
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dsim0 341
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dp 342
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mixer 343
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hdmi 344
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g2d 345
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mdma0 346
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smmu_mdma0 347
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[Clock Muxes]
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Clock ID
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----------------------------
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mout_hdmi 1024
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Each clock is assigned an identifier and client nodes can use this identifier
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to specify the clock which they consume.
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All available clocks are defined as preprocessor macros in
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dt-bindings/clock/exynos5250.h header and can be used in device
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tree sources.
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Example 1: An example of a clock controller node is listed below.
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@ -187,6 +36,6 @@ Example 2: UART controller node that consumes the clock generated by the clock
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compatible = "samsung,exynos4210-uart";
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reg = <0x13820000 0x100>;
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interrupts = <0 54 0>;
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clocks = <&clock 314>, <&clock 153>;
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clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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clock-names = "uart", "clk_uart_baud0";
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};
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@ -17,6 +17,7 @@
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/clock/exynos5250.h>
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#include "exynos5.dtsi"
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#include "exynos5250-pinctrl.dtsi"
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@ -90,7 +91,8 @@ clock_audss: audss-clock-controller@3810000 {
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compatible = "samsung,exynos5250-audss-clock";
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reg = <0x03810000 0x0C>;
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#clock-cells = <1>;
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clocks = <&clock 1>, <&clock 7>, <&clock 138>, <&clock 160>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
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<&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>;
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clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
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};
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@ -115,7 +117,7 @@ mct@101C0000 {
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interrupt-parent = <&mct_map>;
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interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
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<4 0>, <5 0>;
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clocks = <&clock 1>, <&clock 335>;
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clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
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clock-names = "fin_pll", "mct";
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mct_map: mct-map {
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@ -176,7 +178,7 @@ watchdog@101D0000 {
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compatible = "samsung,exynos5250-wdt";
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reg = <0x101D0000 0x100>;
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interrupts = <0 42 0>;
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clocks = <&clock 336>;
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clocks = <&clock CLK_WDT>;
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clock-names = "watchdog";
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samsung,syscon-phandle = <&pmu_system_controller>;
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};
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@ -185,7 +187,7 @@ g2d@10850000 {
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compatible = "samsung,exynos5250-g2d";
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reg = <0x10850000 0x1000>;
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interrupts = <0 91 0>;
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clocks = <&clock 345>;
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clocks = <&clock CLK_G2D>;
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clock-names = "fimg2d";
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};
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@ -194,12 +196,12 @@ codec@11000000 {
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reg = <0x11000000 0x10000>;
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interrupts = <0 96 0>;
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samsung,power-domain = <&pd_mfc>;
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clocks = <&clock 266>;
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clocks = <&clock CLK_MFC>;
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clock-names = "mfc";
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};
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rtc@101E0000 {
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clocks = <&clock 337>;
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clocks = <&clock CLK_RTC>;
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clock-names = "rtc";
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status = "disabled";
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};
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@ -208,27 +210,27 @@ tmu@10060000 {
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compatible = "samsung,exynos5250-tmu";
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reg = <0x10060000 0x100>;
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interrupts = <0 65 0>;
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clocks = <&clock 338>;
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clocks = <&clock CLK_TMU>;
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clock-names = "tmu_apbif";
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};
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serial@12C00000 {
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clocks = <&clock 289>, <&clock 146>;
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clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C10000 {
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clocks = <&clock 290>, <&clock 147>;
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clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C20000 {
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clocks = <&clock 291>, <&clock 148>;
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clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
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clock-names = "uart", "clk_uart_baud0";
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};
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serial@12C30000 {
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clocks = <&clock 292>, <&clock 149>;
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clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
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clock-names = "uart", "clk_uart_baud0";
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};
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@ -236,7 +238,7 @@ sata@122F0000 {
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compatible = "samsung,exynos5-sata-ahci";
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reg = <0x122F0000 0x1ff>;
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interrupts = <0 115 0>;
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clocks = <&clock 277>, <&clock 143>;
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clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
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clock-names = "sata", "sclk_sata";
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};
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@ -251,7 +253,7 @@ i2c_0: i2c@12C60000 {
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interrupts = <0 56 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 294>;
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clocks = <&clock CLK_I2C0>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_bus>;
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@ -264,7 +266,7 @@ i2c_1: i2c@12C70000 {
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interrupts = <0 57 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 295>;
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clocks = <&clock CLK_I2C1>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_bus>;
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@ -277,7 +279,7 @@ i2c_2: i2c@12C80000 {
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interrupts = <0 58 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 296>;
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clocks = <&clock CLK_I2C2>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_bus>;
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@ -290,7 +292,7 @@ i2c_3: i2c@12C90000 {
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interrupts = <0 59 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 297>;
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clocks = <&clock CLK_I2C3>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_bus>;
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@ -303,7 +305,7 @@ i2c_4: i2c@12CA0000 {
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interrupts = <0 60 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 298>;
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clocks = <&clock CLK_I2C4>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_bus>;
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@ -316,7 +318,7 @@ i2c_5: i2c@12CB0000 {
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interrupts = <0 61 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 299>;
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clocks = <&clock CLK_I2C5>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5_bus>;
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@ -329,7 +331,7 @@ i2c_6: i2c@12CC0000 {
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interrupts = <0 62 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 300>;
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clocks = <&clock CLK_I2C6>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6_bus>;
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@ -342,7 +344,7 @@ i2c_7: i2c@12CD0000 {
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interrupts = <0 63 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 301>;
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clocks = <&clock CLK_I2C7>;
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clock-names = "i2c";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c7_bus>;
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@ -355,7 +357,7 @@ i2c_8: i2c@12CE0000 {
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interrupts = <0 64 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 302>;
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clocks = <&clock CLK_I2C_HDMI>;
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clock-names = "i2c";
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status = "disabled";
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};
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@ -365,7 +367,7 @@ i2c@121D0000 {
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reg = <0x121D0000 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 288>;
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clocks = <&clock CLK_SATA_PHYI2C>;
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clock-names = "i2c";
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status = "disabled";
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};
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@ -380,7 +382,7 @@ spi_0: spi@12d20000 {
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 304>, <&clock 154>;
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clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
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clock-names = "spi", "spi_busclk0";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_bus>;
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@ -396,7 +398,7 @@ spi_1: spi@12d30000 {
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 305>, <&clock 155>;
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clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
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clock-names = "spi", "spi_busclk0";
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_bus>;
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@ -412,7 +414,7 @@ spi_2: spi@12d40000 {
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dma-names = "tx", "rx";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 306>, <&clock 156>;
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clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
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clock-names = "spi", "spi_busclk0";
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pinctrl-names = "default";
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pinctrl-0 = <&spi2_bus>;
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@ -424,7 +426,7 @@ mmc_0: mmc@12200000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12200000 0x1000>;
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clocks = <&clock 280>, <&clock 139>;
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clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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status = "disabled";
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@ -436,7 +438,7 @@ mmc_1: mmc@12210000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12210000 0x1000>;
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clocks = <&clock 281>, <&clock 140>;
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clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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status = "disabled";
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@ -448,7 +450,7 @@ mmc_2: mmc@12220000 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x12220000 0x1000>;
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clocks = <&clock 282>, <&clock 141>;
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clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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status = "disabled";
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@ -460,7 +462,7 @@ mmc_3: mmc@12230000 {
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interrupts = <0 78 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock 283>, <&clock 142>;
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clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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status = "disabled";
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@ -490,7 +492,7 @@ i2s1: i2s@12D60000 {
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dmas = <&pdma1 12
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&pdma1 11>;
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dma-names = "tx", "rx";
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clocks = <&clock 307>, <&clock 157>;
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clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>;
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clock-names = "iis", "i2s_opclk0";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s1_bus>;
|
||||
|
|
@ -503,7 +505,7 @@ i2s2: i2s@12D70000 {
|
|||
dmas = <&pdma0 12
|
||||
&pdma0 11>;
|
||||
dma-names = "tx", "rx";
|
||||
clocks = <&clock 308>, <&clock 158>;
|
||||
clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>;
|
||||
clock-names = "iis", "i2s_opclk0";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s2_bus>;
|
||||
|
|
@ -511,7 +513,7 @@ i2s2: i2s@12D70000 {
|
|||
|
||||
usb@12000000 {
|
||||
compatible = "samsung,exynos5250-dwusb3";
|
||||
clocks = <&clock 286>;
|
||||
clocks = <&clock CLK_USB3>;
|
||||
clock-names = "usbdrd30";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -528,7 +530,7 @@ dwc3 {
|
|||
usb3_phy: usbphy@12100000 {
|
||||
compatible = "samsung,exynos5250-usb3phy";
|
||||
reg = <0x12100000 0x100>;
|
||||
clocks = <&clock 1>, <&clock 286>;
|
||||
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB3>;
|
||||
clock-names = "ext_xtal", "usbdrd30";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -544,7 +546,7 @@ usb@12110000 {
|
|||
reg = <0x12110000 0x100>;
|
||||
interrupts = <0 71 0>;
|
||||
|
||||
clocks = <&clock 285>;
|
||||
clocks = <&clock CLK_USB2>;
|
||||
clock-names = "usbhost";
|
||||
};
|
||||
|
||||
|
|
@ -553,14 +555,14 @@ usb@12120000 {
|
|||
reg = <0x12120000 0x100>;
|
||||
interrupts = <0 71 0>;
|
||||
|
||||
clocks = <&clock 285>;
|
||||
clocks = <&clock CLK_USB2>;
|
||||
clock-names = "usbhost";
|
||||
};
|
||||
|
||||
usb2_phy: usbphy@12130000 {
|
||||
compatible = "samsung,exynos5250-usb2phy";
|
||||
reg = <0x12130000 0x100>;
|
||||
clocks = <&clock 1>, <&clock 285>;
|
||||
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_USB2>;
|
||||
clock-names = "ext_xtal", "usbhost";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -577,7 +579,7 @@ pwm: pwm@12dd0000 {
|
|||
reg = <0x12dd0000 0x100>;
|
||||
samsung,pwm-outputs = <0>, <1>, <2>, <3>;
|
||||
#pwm-cells = <3>;
|
||||
clocks = <&clock 311>;
|
||||
clocks = <&clock CLK_PWM>;
|
||||
clock-names = "timers";
|
||||
};
|
||||
|
||||
|
|
@ -592,7 +594,7 @@ pdma0: pdma@121A0000 {
|
|||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x121A0000 0x1000>;
|
||||
interrupts = <0 34 0>;
|
||||
clocks = <&clock 275>;
|
||||
clocks = <&clock CLK_PDMA0>;
|
||||
clock-names = "apb_pclk";
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
|
|
@ -603,7 +605,7 @@ pdma1: pdma@121B0000 {
|
|||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x121B0000 0x1000>;
|
||||
interrupts = <0 35 0>;
|
||||
clocks = <&clock 276>;
|
||||
clocks = <&clock CLK_PDMA1>;
|
||||
clock-names = "apb_pclk";
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
|
|
@ -614,7 +616,7 @@ mdma0: mdma@10800000 {
|
|||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x10800000 0x1000>;
|
||||
interrupts = <0 33 0>;
|
||||
clocks = <&clock 346>;
|
||||
clocks = <&clock CLK_MDMA0>;
|
||||
clock-names = "apb_pclk";
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
|
|
@ -625,7 +627,7 @@ mdma1: mdma@11C10000 {
|
|||
compatible = "arm,pl330", "arm,primecell";
|
||||
reg = <0x11C10000 0x1000>;
|
||||
interrupts = <0 124 0>;
|
||||
clocks = <&clock 271>;
|
||||
clocks = <&clock CLK_MDMA1>;
|
||||
clock-names = "apb_pclk";
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <8>;
|
||||
|
|
@ -638,7 +640,7 @@ gsc_0: gsc@13e00000 {
|
|||
reg = <0x13e00000 0x1000>;
|
||||
interrupts = <0 85 0>;
|
||||
samsung,power-domain = <&pd_gsc>;
|
||||
clocks = <&clock 256>;
|
||||
clocks = <&clock CLK_GSCL0>;
|
||||
clock-names = "gscl";
|
||||
};
|
||||
|
||||
|
|
@ -647,7 +649,7 @@ gsc_1: gsc@13e10000 {
|
|||
reg = <0x13e10000 0x1000>;
|
||||
interrupts = <0 86 0>;
|
||||
samsung,power-domain = <&pd_gsc>;
|
||||
clocks = <&clock 257>;
|
||||
clocks = <&clock CLK_GSCL1>;
|
||||
clock-names = "gscl";
|
||||
};
|
||||
|
||||
|
|
@ -656,7 +658,7 @@ gsc_2: gsc@13e20000 {
|
|||
reg = <0x13e20000 0x1000>;
|
||||
interrupts = <0 87 0>;
|
||||
samsung,power-domain = <&pd_gsc>;
|
||||
clocks = <&clock 258>;
|
||||
clocks = <&clock CLK_GSCL2>;
|
||||
clock-names = "gscl";
|
||||
};
|
||||
|
||||
|
|
@ -665,7 +667,7 @@ gsc_3: gsc@13e30000 {
|
|||
reg = <0x13e30000 0x1000>;
|
||||
interrupts = <0 88 0>;
|
||||
samsung,power-domain = <&pd_gsc>;
|
||||
clocks = <&clock 259>;
|
||||
clocks = <&clock CLK_GSCL3>;
|
||||
clock-names = "gscl";
|
||||
};
|
||||
|
||||
|
|
@ -673,8 +675,9 @@ hdmi {
|
|||
compatible = "samsung,exynos4212-hdmi";
|
||||
reg = <0x14530000 0x70000>;
|
||||
interrupts = <0 95 0>;
|
||||
clocks = <&clock 344>, <&clock 136>, <&clock 137>,
|
||||
<&clock 159>, <&clock 1024>;
|
||||
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
|
||||
<&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
|
||||
<&clock CLK_MOUT_HDMI>;
|
||||
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
|
||||
"sclk_hdmiphy", "mout_hdmi";
|
||||
};
|
||||
|
|
@ -683,7 +686,7 @@ mixer {
|
|||
compatible = "samsung,exynos5250-mixer";
|
||||
reg = <0x14450000 0x10000>;
|
||||
interrupts = <0 94 0>;
|
||||
clocks = <&clock 343>, <&clock 136>;
|
||||
clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
|
||||
clock-names = "mixer", "sclk_hdmi";
|
||||
};
|
||||
|
||||
|
|
@ -694,14 +697,14 @@ dp_phy: video-phy@10040720 {
|
|||
};
|
||||
|
||||
dp-controller@145B0000 {
|
||||
clocks = <&clock 342>;
|
||||
clocks = <&clock CLK_DP>;
|
||||
clock-names = "dp";
|
||||
phys = <&dp_phy>;
|
||||
phy-names = "dp";
|
||||
};
|
||||
|
||||
fimd@14400000 {
|
||||
clocks = <&clock 133>, <&clock 339>;
|
||||
clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
|
||||
clock-names = "sclk_fimd", "fimd";
|
||||
};
|
||||
|
||||
|
|
@ -709,7 +712,7 @@ adc: adc@12D10000 {
|
|||
compatible = "samsung,exynos-adc-v1";
|
||||
reg = <0x12D10000 0x100>, <0x10040718 0x4>;
|
||||
interrupts = <0 106 0>;
|
||||
clocks = <&clock 303>;
|
||||
clocks = <&clock CLK_ADC>;
|
||||
clock-names = "adc";
|
||||
#io-channel-cells = <1>;
|
||||
io-channel-ranges;
|
||||
|
|
|
|||
Loading…
Reference in New Issue