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ARM: sun8i: Add the A33 AHB1 gates clock driver 

The A33 has a different gates array than the A23, add the node to the DT.

Reported-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Maxime Ripard 2015-08-18 19:32:56 +02:00
parent eb2217b4c2
commit fe8872c176
1 changed files with 27 additions and 0 deletions
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27
arch/arm/boot/dts/sun8i-a33.dtsi
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@ -72,6 +72,33 @@ pll11: pll11_clk {
clock-output-names = "pll11"; clock-output-names = "pll11";
}; };
ahb1_gates: clk@01c20060 {
#clock-cells = <1>;
compatible = "allwinner,sun8i-a33-ahb1-gates-clk";
reg = <0x01c20060 0x8>;
clocks = <&ahb1>;
clock-indices = <1>, <5>,
<6>, <8>, <9>,
<10>, <13>, <14>,
<19>, <20>,
<21>, <24>, <26>,
<29>, <32>, <36>,
<40>, <44>, <46>,
<52>, <53>,
<54>, <57>,
<58>;
clock-output-names = "ahb1_mipidsi", "ahb1_ss",
"ahb1_dma","ahb1_mmc0", "ahb1_mmc1",
"ahb1_mmc2", "ahb1_nand", "ahb1_sdram",
"ahb1_hstimer", "ahb1_spi0",
"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
"ahb1_ohci", "ahb1_ve", "ahb1_lcd",
"ahb1_csi", "ahb1_be", "ahb1_fe",
"ahb1_gpu", "ahb1_msgbox",
"ahb1_spinlock", "ahb1_drc",
"ahb1_sat";
};
mbus_clk: clk@01c2015c { mbus_clk: clk@01c2015c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "allwinner,sun8i-a23-mbus-clk"; compatible = "allwinner,sun8i-a23-mbus-clk";