drm/i915/gvt: clean up intel_gvt.h as interface for i915 core
i915 core should only call functions and structures exposed through intel_gvt.h. Remove internal gvt.h and i915_pvinfo.h. Change for internal intel_gvt structure as private handler which not requires to expose gvt internal structure for i915 core. v2: Fix per Chris's comment - carefully handle dev_priv->gvt assignment - add necessary bracket for macro helper - forward declartion struct intel_gvt - keep free operation within same file handling alloc v3: fix use after free and remove intel_gvt.initialized v4: change to_gvt() to an inline Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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1140f9ed05
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@ -35,6 +35,7 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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#define MB_TO_BYTES(mb) ((mb) << 20ULL)
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#define BYTES_TO_MB(b) ((b) >> 20ULL)
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@ -32,6 +32,7 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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enum {
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INTEL_GVT_PCI_BAR_GTTMMIO = 0,
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@ -36,6 +36,8 @@
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#include <linux/slab.h>
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#include "i915_drv.h"
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#include "gvt.h"
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#include "i915_pvinfo.h"
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#include "trace.h"
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#define INVALID_OP (~0U)
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@ -33,6 +33,7 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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static int get_edp_pipe(struct intel_vgpu *vgpu)
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{
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@ -33,6 +33,7 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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#define GMBUS1_TOTAL_BYTES_SHIFT 16
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#define GMBUS1_TOTAL_BYTES_MASK 0x1ff
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@ -33,6 +33,7 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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#define _EL_OFFSET_STATUS 0x234
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#define _EL_OFFSET_STATUS_BUF 0x370
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@ -32,6 +32,8 @@
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#include <linux/crc32.h>
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#include "i915_drv.h"
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#include "gvt.h"
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#include "i915_pvinfo.h"
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#define FIRMWARE_VERSION (0x0)
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@ -34,6 +34,8 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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#include "i915_pvinfo.h"
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#include "trace.h"
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static bool enable_out_of_sync = false;
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@ -35,6 +35,7 @@
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#include <linux/kthread.h>
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#include "i915_drv.h"
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#include "gvt.h"
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struct intel_gvt_host intel_gvt_host;
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@ -173,9 +174,9 @@ static int init_service_thread(struct intel_gvt *gvt)
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*/
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void intel_gvt_clean_device(struct drm_i915_private *dev_priv)
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{
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struct intel_gvt *gvt = &dev_priv->gvt;
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struct intel_gvt *gvt = to_gvt(dev_priv);
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if (WARN_ON(!gvt->initialized))
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if (WARN_ON(!gvt))
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return;
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clean_service_thread(gvt);
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@ -188,7 +189,8 @@ void intel_gvt_clean_device(struct drm_i915_private *dev_priv)
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intel_gvt_clean_mmio_info(gvt);
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intel_gvt_free_firmware(gvt);
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gvt->initialized = false;
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kfree(dev_priv->gvt);
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dev_priv->gvt = NULL;
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}
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/**
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@ -204,7 +206,7 @@ void intel_gvt_clean_device(struct drm_i915_private *dev_priv)
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*/
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int intel_gvt_init_device(struct drm_i915_private *dev_priv)
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{
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struct intel_gvt *gvt = &dev_priv->gvt;
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struct intel_gvt *gvt;
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int ret;
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/*
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@ -214,9 +216,13 @@ int intel_gvt_init_device(struct drm_i915_private *dev_priv)
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if (WARN_ON(!intel_gvt_host.initialized))
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return -EINVAL;
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if (WARN_ON(gvt->initialized))
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if (WARN_ON(dev_priv->gvt))
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return -EEXIST;
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gvt = kzalloc(sizeof(struct intel_gvt), GFP_KERNEL);
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if (!gvt)
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return -ENOMEM;
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gvt_dbg_core("init gvt device\n");
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mutex_init(&gvt->lock);
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@ -261,7 +267,7 @@ int intel_gvt_init_device(struct drm_i915_private *dev_priv)
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goto out_clean_cmd_parser;
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gvt_dbg_core("gvt device creation is done\n");
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gvt->initialized = true;
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dev_priv->gvt = gvt;
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return 0;
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out_clean_cmd_parser:
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@ -280,5 +286,6 @@ int intel_gvt_init_device(struct drm_i915_private *dev_priv)
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intel_gvt_free_firmware(gvt);
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out_clean_mmio_info:
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intel_gvt_clean_mmio_info(gvt);
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kfree(gvt);
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return ret;
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}
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@ -192,8 +192,6 @@ struct intel_gvt_opregion {
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struct intel_gvt {
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struct mutex lock;
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bool initialized;
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struct drm_i915_private *dev_priv;
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struct idr vgpu_idr; /* vGPU IDR pool */
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@ -213,6 +211,11 @@ struct intel_gvt {
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unsigned long service_request;
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};
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static inline struct intel_gvt *to_gvt(struct drm_i915_private *i915)
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{
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return i915->gvt;
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}
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enum {
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INTEL_GVT_REQUEST_EMULATE_VBLANK = 0,
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};
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@ -37,6 +37,8 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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#include "i915_pvinfo.h"
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/* XXX FIXME i915 has changed PP_XXX definition */
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#define PCH_PP_STATUS _MMIO(0xc7200)
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@ -30,6 +30,7 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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/* common offset among interrupt control registers */
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#define regbase_to_isr(base) (base)
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@ -34,6 +34,7 @@
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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/**
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* intel_vgpu_gpa_to_mmio_offset - translate a GPA to MMIO offset
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@ -23,6 +23,7 @@
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#include <linux/acpi.h>
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#include "i915_drv.h"
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#include "gvt.h"
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static int init_vgpu_opregion(struct intel_vgpu *vgpu, u32 gpa)
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{
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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struct render_mmio {
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int ring_id;
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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static bool vgpu_has_pending_workload(struct intel_vgpu *vgpu)
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{
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*
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*/
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#include "i915_drv.h"
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#include <linux/kthread.h>
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#include "i915_drv.h"
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#include "gvt.h"
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#define RING_CTX_OFF(x) \
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offsetof(struct execlist_ring_context, x)
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*/
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#include "i915_drv.h"
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#include "gvt.h"
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#include "i915_pvinfo.h"
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static void clean_vgpu_mmio(struct intel_vgpu *vgpu)
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{
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@ -1778,7 +1778,7 @@ struct drm_i915_private {
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struct i915_virtual_gpu vgpu;
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struct intel_gvt gvt;
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struct intel_gvt *gvt;
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struct intel_guc guc;
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static inline bool intel_gvt_active(struct drm_i915_private *dev_priv)
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{
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return dev_priv->gvt.initialized;
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return dev_priv->gvt;
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}
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static inline bool intel_vgpu_active(struct drm_i915_private *dev_priv)
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#ifndef _INTEL_GVT_H_
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#define _INTEL_GVT_H_
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#include "i915_pvinfo.h"
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#include "gvt/gvt.h"
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struct intel_gvt;
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#ifdef CONFIG_DRM_I915_GVT
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int intel_gvt_init(struct drm_i915_private *dev_priv);
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