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drm/amdgpu:kiq reg access need timeout(v2) 

this is to prevent fence forever waiting if FLR occured
during register accessing.

v2:
use define instead of hardcode for the timeout msec

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Monk Liu 2017-05-05 17:30:50 -04:00 committed by Alex Deucher
parent 2fdde9fa97
commit ff82577a10
1 changed files with 8 additions and 5 deletions
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13
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
View File

@ -22,6 +22,7 @@
*/ */
#include "amdgpu.h" #include "amdgpu.h"
#define MAX_KIQ_REG_WAIT 100000
int amdgpu_allocate_static_csa(struct amdgpu_device *adev) int amdgpu_allocate_static_csa(struct amdgpu_device *adev)
{ {
@ -128,10 +129,12 @@ uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg)
amdgpu_ring_commit(ring); amdgpu_ring_commit(ring);
mutex_unlock(&kiq->ring_mutex); mutex_unlock(&kiq->ring_mutex);
r = dma_fence_wait(f, false); r = dma_fence_wait_timeout(f, false, msecs_to_jiffies(MAX_KIQ_REG_WAIT));
if (r)
DRM_ERROR("wait for kiq fence error: %ld.\n", r);
dma_fence_put(f); dma_fence_put(f);
if (r < 1) {
DRM_ERROR("wait for kiq fence error: %ld.\n", r);
return ~0;
}
val = adev->wb.wb[adev->virt.reg_val_offs]; val = adev->wb.wb[adev->virt.reg_val_offs];
@ -154,8 +157,8 @@ void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
amdgpu_ring_commit(ring); amdgpu_ring_commit(ring);
mutex_unlock(&kiq->ring_mutex); mutex_unlock(&kiq->ring_mutex);
r = dma_fence_wait(f, false); r = dma_fence_wait_timeout(f, false, msecs_to_jiffies(MAX_KIQ_REG_WAIT));
if (r) if (r < 1)
DRM_ERROR("wait for kiq fence error: %ld.\n", r); DRM_ERROR("wait for kiq fence error: %ld.\n", r);
dma_fence_put(f); dma_fence_put(f);
} }