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13 Commits

Author SHA1 Message Date
Arnd Bergmann e52ec42853 ARM: bcm2835: device tree updates
This branch adds two devices to the BCM2835 SoC device tree: the SPI
 controller and the HW random number generator.
 
 The SPI controller isn't actually instantiated in the Raspberry Pi
 device tree, since there are no on-board SPI devices; it's up to the
 end-user to modify their own device-tree to describe whatever they
 have attached.
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Merge tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi into next/dt

From Stephen Warren <swarren@wwwdotorg.org>:

ARM: bcm2835: device tree updates

This branch adds two devices to the BCM2835 SoC device tree: the SPI
controller and the HW random number generator.

The SPI controller isn't actually instantiated in the Raspberry Pi
device tree, since there are no on-board SPI devices; it's up to the
end-user to modify their own device-tree to describe whatever they
have attached.

* tag 'bcm2835-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-rpi:
  ARM: bcm2835: add Broadcom BCM2835 RNG to the device tree
  ARM: bcm2835: add SPI device to DT

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2013-04-08 20:07:07 +02:00
Lubomir Rintel a1bf70828e ARM: bcm2835: add Broadcom BCM2835 RNG to the device tree
This adds a device tree binding for random number generator present on
Broadcom BCM2835 SoC, used in Raspberry Pi and Roku 2 devices.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-04-03 00:22:27 -06:00
Stephen Warren 6ce5f02ef7 ARM: bcm2835: add SPI device to DT
The BCM2835 has a single instance of the "SPI0"-type SPI master
controller. Instantiate it in the SoC .dtsi file, Don't enable it in
the Raspberry Pi board .dts file, since we have no idea what is actually
connected, and hence no idea what to set the bus clock rate to.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-03-11 21:38:58 -06:00
Stephen Warren 2837a1d416 ARM: bcm2835: fix I2C module clock rate
BCM2835-ARM-Peripherals.pdf states that the I2C module's input clock is
nominally 150MHz, and that value is currently reflected in bcm2835.dtsi.
However, practical measurements show that the rate is actually 250MHz,
and this agrees with various downstream kernels.

Switch the I2C clock's frequency to 250MHz so that the generated bus
clock rate is accurate.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-03-04 17:15:34 -08:00
Stephen Warren 9692c191ff ARM: bcm2835: fix clock node aliasing in device tree
Both clock nodes in the current device tree are named "clock" and hence
end up being the same node. Rename the nodes to different names to avoid
this. In fact, fixed-clock uses the node name as the clock name, so name
the nodes after the clock they represent. Move the clocks into a
"clocks" sub-node to group them and avoid any possible naming conflicts
with other nodes also named after the device type.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-01-14 21:47:09 -07:00
Stephen Warren 232fed4825 ARM: bcm2835: add I2C controllers to DT
The BCM2835 has 3 identical I2C controllers. Instantiate them all in the
SoC .dtsi file, and enable the relevant two in the Raspberry Pi board
.dts file.

Note that on the Raspberry Pi Model B revision 1, I2C0 is connected to
the general-purpose expansion header, and I2C1 is connected to the camera
connector. Revision 2 of the board swaps these assignments:-(

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-01-14 21:47:09 -07:00
Stephen Warren 5186bf287a ARM: bcm2835: add SDHCI node to DT
Add the SDHCI device node to the SoC DT file. Add a dummy fixed-clock
to satisfy the SDHCI driver's clock lookup; eventually this should be
replaced by a real clock implementation. Add board specific properties
to the Raspberry Pi board file.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2013-01-14 21:47:08 -07:00
Stephen Warren 805504abdc ARM: bcm2835: enable GPIO/pinctrl
Enable GPIO and pinctrl in Kconfig.

Add required <mach/gpio.h> for gpiolib.

Instantiate the BCM2835 GPIO module in bcm2835.dtsi.

Add a pinctrl definition to bcm2835-rpi-b.dts that sets up all of the
board's required pinmux configuration. GPIO aren't specified; that's
left to gpio_request().

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-10-25 20:42:51 -06:00
Stephen Warren d0f1c7ffaa ARM: bcm2835: implement machine restart hook
Implement the machine restart hook using the SoC's watchdog timer module.
To support this, define a DT binding for the watchdog module, and add it
to the device tree.

The downstream rpi-split branch contains a full watchdog timer driver
implementation, which also implements the restart hook. However, the
restart function is largely separate from the watchdog driver, so for
simplicity, the restart hook is implemented here directly in the main
machine source file.

Overall structure (separate setup/restart) functions derived from the
picoxcell ARM support.

Watchdog register IO sequence taken from code by Simon Arlott. Note that
the watchdog module is not documented in BCM2835-ARM-Peripherals.pdf.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2012-10-25 20:42:36 -06:00
Simon Arlott 407f9be454 ARM: bcm2835: instantiate console UART
This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Modified UART DT node to use a unit-address to create unique UART node
  names, rather than using non-type names "uart0" and "uart1".
  Note that UART 1 (the Broadcom "mini UART") is not yet present, but
  I'm naming the DT node in anticipation that it will be added.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19 19:08:59 -06:00
Simon Arlott ee4af56967 ARM: bcm2835: add system timer
The System Timer peripheral provides four 32-bit timer channels and a
single 64-bit free running counter. Each channel has an output compare
register, which is compared against the 32 least significant bits of the
free running counter values, and generates an interrupt.

Timer 3 is used as the Linux timer.

The BCM2835 also contains an SP804-based timer module. However, it
apparently has significant differences from the standard SP804 IP block,
and Broadcom's documentation recommends using the system timer instead.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved to drivers/clocksource/. This looks like the desired location for
  such code now.
* Added DT binding docs.
* Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more.
* Simplified bcm2835_time_init() to find one matching node and operate on
  it, rather than looping over all matching nodes. This seems more
  consistent with other clocksource code.
* Simplified bcm2835_time_init() using of_iomap().
* Renamed struct bcm2835_timer.index to match_mask to better represent its
  purpose.
* s/printk(PR_INFO/pr_info(/

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19 19:08:46 -06:00
Simon Arlott 89214f009c ARM: bcm2835: add interrupt controller driver
The BCM2835 contains a custom interrupt controller, which supports 72
interrupt sources using a 2-level register scheme. The interrupt
controller, or the HW block containing it, is referred to occasionally
as "armctrl" in the SoC documentation, hence the symbol naming in the
code.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:

* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved implementation to drivers/irchip/.
* Added devicetree documentation, and hence removed list of IRQs from
  bcm2835.dtsi.
* Changed shift in MAKE_HWIRQ() and HWIRQ_BANK() from 8 to 5 to reduce
  the size of the hwirq space, and pass the total size of the hwirq space
  to irq_domain_add_linear(), rather than just the number of valid hwirqs;
  the two are different due to the hwirq space being sparse.
* Added the interrupt controller DT node to the top-level of the DT,
  rather than nesting it inside a /axi node. Hence, changed the reg value
  since /axi had a ranges property. This seems simpler to me, but I'm not
  sure if everyone will like this change or not.
* Don't set struct irq_domain_ops.map = irq_domain_simple_map, hence
  removing the need to patch include/linux/irqdomain.h or
  kernel/irq/irqdomain.c.
* Simplified armctrl_of_init() using of_iomap().
* Removed unused IS_VALID_BANK()/IS_VALID_IRQ() macros.
* Renamed armctrl_handle_irq() to prevent possible symbol clashes.
* Made armctrl_of_init() static.
* Removed comment "Each bank is registered as a separate interrupt
  controller" since this is no longer true.
* Removed FSF address from license header.
* Added my name to copyright header.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19 19:08:37 -06:00
Simon Arlott ec9653b847 ARM: add infra-structure for BCM2835 and Raspberry Pi
The BCM2835 is an ARM SoC from Broadcom. This patch adds very basic
support for this SoC.

http://www.broadcom.com/products/BCM2835
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf

Note that the documentation in the latter .pdf assumes the MMU setup
that's used on the "VideoCore" companion processor, and does not document
physical peripheral addresses. Subtract 0x5e000000 to obtain the physical
addresses. This is accounted for by the ranges property in the /soc node
in the device tree.

The BCM2835 SoC is used in the Raspberry Pi. This patch also adds a
minimal device tree for this board; enough to see some very early kernel
boot messages through earlyprintk. However, this patch does not yet
provide a useful booting system.

http://www.raspberrypi.org/.

This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split from 3-4 months ago, and significantly stripped down and
modified since.

Signed-off-by: Chris Boot <bootc@bootc.net>
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Dom Cobley <dc4@broadcom.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2012-09-19 19:08:27 -06:00