Commit Graph

3 Commits

Author SHA1 Message Date
Shawn Guo b962e2cd35 pinctrl: zte: fix dereference of 'data' in zx_set_mux()
It fixes the following Smatch complaint:

drivers/pinctrl/zte/pinctrl-zx.c:76 zx_set_mux()
warn: variable dereferenced before check 'data' (see line 67)

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Fixes: cbff0c4d27 ("pinctrl: add ZTE ZX pinctrl driver support")
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-07-31 15:13:09 +02:00
Shawn Guo 80fbc2d9b3 pinctrl: zte: fix group_desc initialization
There are a couple of issues with group_desc initialization in function
zx_pinctrl_build_state().

 - num_pins is not initialized and remains zero.
 - pins shouldn't be initialized with a pointer to variable in the
   stack.

With them fixed, pin_request() in pinmux_enable_setting() can be invoked
correctly.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-29 10:16:16 +02:00
Shawn Guo cbff0c4d27 pinctrl: add ZTE ZX pinctrl driver support
The pin controller on ZTE ZX platforms is kinda of hybrid.  It consists
of a main controller and an auxiliary one.  For example, on ZX296718 SoC,
the main controller is TOP_PMM and the auxiliary one is AON_IOCFG.  Both
controllers work together to control pin multiplexing and configuration.

For most of pins, the pinmux function is controlled by main controller
only, and this type of pins are meant by term 'TOP pins'.  For other
pins, the pinmux is controlled by both main and auxiliary controllers,
as the available multiplexing functions for the pin spread in both
controllers.  This type of pins are called 'AON pins'.  Though pinmux
implementation is quite different, pinconf is same for both types of
pins.  Both are controlled by auxiliary controller, i.e. AON_IOCFG on
ZX296718.

The patch adds the ZTE ZX core pinctrl driver to support this hybrid
pin controller as well as ZX296718 SoC specific pin data.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2017-05-22 10:39:23 +02:00