linux_old1

Commit Graph

Author	SHA1	Message	Date
John Linn	d58577d8f3	powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440 The following changes add processing to initialize the Xilinx 16550 UART in the boot wrapper for Virtex targets without firmware. Normally the boot wrapper assumes that the serial port has already been initialized by firmware. The wrapper was also modified to add the 440 build. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>	2008-07-04 00:58:59 -06:00
Grant Likely	d2477b5cc8	[POWERPC] bootwrapper: Add a firmware-independent simpleboot target. This target produces a flat binary rather than an ELF file, fixes the entry point at the beginning of the image, and takes a complete device tree with no fixups needed. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>	2008-04-02 20:36:11 -05:00

Author

SHA1

Message

Date

John Linn

d58577d8f3

powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 440

The following changes add processing to initialize the Xilinx 16550 UART
in the boot wrapper for Virtex targets without firmware.  Normally the
boot wrapper assumes that the serial port has already been initialized by
firmware.

The wrapper was also modified to add the 440 build.

Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>

2008-07-04 00:58:59 -06:00

Grant Likely

d2477b5cc8

[POWERPC] bootwrapper: Add a firmware-independent simpleboot target.

This target produces a flat binary rather than an ELF file,
fixes the entry point at the beginning of the image, and takes
a complete device tree with no fixups needed.

Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

2008-04-02 20:36:11 -05:00

2 Commits