Commit Graph

14 Commits

Author SHA1 Message Date
Ralf Baechle ade63aada7 Merge branch '3.14-fixes' into mips-for-linux-next 2014-03-31 18:17:33 +02:00
Leonid Yegoshin aa1af47f5d MIPS: uapi: inst: Add instruction format for SPECIAL3 instructions
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-03-26 23:09:12 +01:00
Leonid Yegoshin a442c9e7b8 MIPS: uapi: inst: Add new EVA opcodes
Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-03-26 23:09:12 +01:00
Deng-Cheng Zhu 51061b8876 MIPS: math-emu: Fix prefx detection and COP1X function field definition
When running applications which contain the instruction "prefx" on FPU-less
CPUs, a message "Illegal instruction" will be seen. This instruction is
supposed to be ignored by the FPU emulator. However, its current detection
and function field encoding are incorrect. This patch fix the issue.

Signed-off-by: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com>
Reviewed-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Steven.Hill@imgtec.com
Patchwork: https://patchwork.linux-mips.org/patch/6608/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-03-11 23:10:55 +01:00
Steven J. Hill 9355e59c33 MIPS: microMIPS: mfhc1 & mthc1 support for the FPU emulator
This patch adds support for microMIPS encodings of the mfhc1 & mthc1
instructions introduced in release 2 of the mips32 & mips64
architectures, converting them to their mips32 equivalents for the FPU
emulator.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6110/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-01-13 23:40:55 +01:00
Leonid Yegoshin 1ac944007b MIPS: math-emu: Add mfhc1 & mthc1 support.
This patch adds support for the mfhc1 & mthc1 instructions to the FPU
emulator. These instructions were introduced in release 2 of the MIPS32
& MIPS64 architectures and allow access to the most significant 32 bits
of a 64-bit FP register.

[ralf@linux-mips.org: Fix ifdef hell added by original patch.]

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6112/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-01-13 23:40:55 +01:00
Tony Wu dfb033f09e MIPS: microMIPS: Fix POOL16C minor opcode enum
As pointed out by Maciej, POOL16C minor opcodes were mostly shifted
by one bit. Correct those opcodes, and also add jraddiusp to the enum.

Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: david.daney@cavium.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-21 18:07:03 +02:00
Steven J. Hill cd574704ec MIPS: MIPS16e: Add instruction formats.
Add structures for all the MIPS16e instructions. Also add the
enumerations for all the bit fields for opcodes, functions, etc.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-09 17:55:20 +02:00
Leonid Yegoshin 102cedc32a MIPS: microMIPS: Floating point support.
Add logic needed to do floating point emulation in microMIPS mode.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Steven J. Hill <Steven. Hill@imgtec.com>
2013-05-09 17:55:18 +02:00
Steven J. Hill 2aa9fd06e2 MIPS: microMIPS: Add instruction formats.
Add structures for all the microMIPS instructions. Also add the
enumerations for all the bit fields for opcodes, functions, etc.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: kevink@paralogos.com
Cc: ddaney.cavm@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/4921/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
(cherry picked from commit d7f19e43a4337d4d40ff5e241172912130d06a4c)
2013-05-01 16:32:44 -05:00
Ralf Baechle 7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Ralf Baechle 8fba1e588b MIPS: inst.h: Add MDMX and paired single instruction aka MIPS-3D formats.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:21 +01:00
Ralf Baechle 85dfaf0831 MIPS: inst.h: Eleminate per endianess structure definitions.
This makes space for further growth of the header without excessive bloat.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:20 +01:00
Ralf Baechle 90e8cacdbe MIPS: UAPI: Split inst.h into exported and kernel-only part.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:20 +01:00