Commit Graph

79992 Commits

Author SHA1 Message Date
James Hogan d790050448 metag: cleanup metag_ksyms.c includes
Minimise metag_ksyms.c includes to directly include the <asm/*.h> files
that declare a particular symbol, and not include any unnecessary ones.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:16 +00:00
James Hogan 44c2451080 metag: move mm/init.c exports out of metag_ksyms.c
It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in mm/init.c into mm/init.c.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:16 +00:00
James Hogan 9da3ee9aa8 metag: move usercopy.c exports out of metag_ksyms.c
It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in usercopy.c into usercopy.c

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:15 +00:00
James Hogan 7293dbed9d metag: move setup.c exports out of metag_ksyms.c
It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in setup.c into setup.c

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:15 +00:00
James Hogan aa29ec5f79 metag: move kick.c exports out of metag_ksyms.c
It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in kick.c into kick.c

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:15 +00:00
James Hogan 9fb4aa8723 metag: move traps.c exports out of metag_ksyms.c
It's less error prone to have function symbols exported immediately
after the function rather than in metag_ksyms.c. Move each EXPORT_SYMBOL
in metag_ksyms.c for symbols defined in traps.c into traps.c

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:14 +00:00
James Hogan fa771d029a metag: move irq enable out of irqflags.h on SMP
The SMP version of arch_local_irq_enable() uses preempt_disable(), but
<asm/irqflags.h> doesn't include <linux/preempt.h> causing the following
errors on SMP when pstore/ftrace is enabled (caught by buildbot smp
allyesconfig):

In file included from include/linux/irqflags.h:15,
                 from fs/pstore/ftrace.c:16:
arch/metag/include/asm/irqflags.h: In function 'arch_local_irq_enable':
arch/metag/include/asm/irqflags.h:84: error: implicit declaration of function 'preempt_disable'
arch/metag/include/asm/irqflags.h:86: error: implicit declaration of function 'preempt_enable_no_resched'

However <linux/preempt.h> cannot be easily included from
<asm/irqflags.h> as it can cause circular include dependencies in the
!SMP case, and potentially in the SMP case in the future. Therefore move
the SMP implementation of arch_local_irq_enable() into traps.c and use
an inline version of get_trigger_mask() which is also defined in traps.c
for SMP.

This adds an extra layer of function call / stack push when
preempt_disable needs to call other functions, however in the
non-preemptive SMP case it should be about as fast, as it was already
calling the get_trigger_mask() function which is now used inline.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:14 +00:00
James Hogan f75c28d896 metag: hugetlb: convert to vm_unmapped_area()
Convert hugetlb_get_unmapped_area_new_pmd() to use vm_unmapped_area()
rather than searching the virtual address space itself. This fixes the
following errors in linux-next due to the specified members being
removed after other architectures have already been converted:

arch/metag/mm/hugetlbpage.c: In function 'hugetlb_get_unmapped_area_new_pmd':
arch/metag/mm/hugetlbpage.c:199: error: 'struct mm_struct' has no member named 'cached_hole_size'
arch/metag/mm/hugetlbpage.c:200: error: 'struct mm_struct' has no member named 'free_area_cache'
arch/metag/mm/hugetlbpage.c:215: error: 'struct mm_struct' has no member named 'cached_hole_size'

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Michel Lespinasse <walken@google.com>
2013-03-02 20:11:13 +00:00
James Hogan c838e72a35 metag: export clear_page and copy_page
Various file systems use clear_page() and copy_page(), so when they're
built as modules we get build errors like the following:

ERROR: "clear_page" [fs/ntfs/ntfs.ko] undefined!
ERROR: "copy_page" [fs/nilfs2/nilfs2.ko] undefined!

Therefore export these functions to modules from metag_ksyms.c to fix
the errors. This was hit by a randconfig build.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:13 +00:00
James Hogan f626dc704e metag: export metag_code_cache_flush_all
Various file systems indirectly use metag_code_cache_flush_all(), so
when they're built as modules we get build errors like the following:

ERROR: "metag_code_cache_flush_all" [fs/xfs/xfs.ko] undefined!

Therefore export this function to modules to fix the errors. This was
hit by a randconfig build.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:11:12 +00:00
James Hogan 3d6b7bb0a2 metag: protect more non-MMU memory regions
Rename setup_txprivext() to setup_priv() and add initialisation of some
more per-thread privilege protection registers:

 - TxPRIVSYSR: 0x04400000-0x047fffff
               0x05000000-0x07ffffff
               0x84000000-0x87ffffff
 - TxPIOREG:   0x02000000-0x02ffffff
               0x04800000-0x048fffff
 - TxSYREG:    0x04000000-0x04000fff (except write fetch system event)

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:58 +00:00
James Hogan c787c2d62f metag: make TXPRIVEXT bits explicit
Define PRIV_BITS using explicit constants from <asm/metag_regs.h> rather
than with a hard coded value. This also adds a couple of missing
definitions for the TXPRIVEXT priv bits for protecting writes to TXTIMER
and the trace registers.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:58 +00:00
James Hogan 82f0167aa4 metag: kernel/setup.c: sort includes
Sort includes in kernel/setup.c.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:57 +00:00
James Hogan 883a635591 metag: add boot time LNKGET/LNKSET check
Add boot time check for whether LNKGET/LNKSET go through or around the
cache. Depending on the configuration an info message (no harm), warning
(technically wrong but no harm), or big WARN (expect failure in either
kernel or userland) may be emitted if the behaviour is not as expected:

Configuration                                Hardware   Response
------------------------------------------   --------   --------
AROUND_CACHE                                 through    pr_info
!AROUND_CACHE && ATOMICITY_LNKGET            around     WARN (kernel)
     "        && !ATOMICITY_LNKGET && SMP    around     WARN (user)
     "                   "         && !SMP   around     pr_warn

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:56 +00:00
James Hogan 0a38a8adc5 metag: add __init to metag_cache_probe()
metag_cache_probe() is only called from setup_arch(), so add the __init
attribute to it.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:56 +00:00
James Hogan ae85ac71b7 metag: Add JTAG Debug Adapter (DA) support
Add basic JTAG Debug Adapter (DA) support so that drivers which
communicate with the DA can detect whether one is actually present
(otherwise the target will halt indefinitely).

This allows the metag_da TTY driver and imgdafs filesystem driver to be
built, updates defconfigs, and sets up the metag_da console early if
it's configured in.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:56 +00:00
James Hogan 00512bdd45 metag: ftrace support
Add ftrace support for metag.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Reviewed-by: Steven Rostedt <rostedt@goodmis.org>
2013-03-02 20:09:55 +00:00
James Hogan 903b20ad68 metag: Perf
Add Perf support for metag.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
2013-03-02 20:09:54 +00:00
James Hogan 5633004cc2 metag: Build infrastructure
Add metag build infrastructure.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:54 +00:00
James Hogan 1e57372eac metag: Various other headers
Add the remaining metag header files:
 - byteorder.h, swab.h (byte order and swapping)
 - barrier.h, cpu.h. hwthread.h, processor.h (hardware thread related)
 - bug.h, elf.h, gpio.h, linkage.h, resource.h (other)

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:52 +00:00
James Hogan e8de3486a4 metag: Stack unwinding
Add stack unwinding support for metag.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:52 +00:00
James Hogan 086e9dc0e2 metag: Optimised library functions
Add optimised library functions for metag.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:52 +00:00
James Hogan f507758ccb metag: DMA
Add DMA mapping code.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:51 +00:00
James Hogan 42682c6c42 metag: SMP support
Add SMP support for metag. This allows Linux to take control of multiple
hardware threads on a single Meta core, treating them as separate Linux
CPUs.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:51 +00:00
James Hogan 6006c0d8ce metag: Atomics, locks and bitops
Add header files to implement Meta hardware thread locks (used by some
other atomic operations), atomics, spinlocks, and bitops.

There are 2 main types of atomic primitives for metag (in addition to
IRQs off on UP):
 - LOCK instructions provide locking between hardware threads.
 - LNKGET/LNKSET instructions provide load-linked/store-conditional
   operations allowing for lighter weight atomics on Meta2

LOCK instructions allow for hardware threads to acquire voluntary or
exclusive hardware thread locks:
 - LOCK0 releases exclusive and voluntary lock from the running hardware
   thread.
 - LOCK1 acquires the voluntary hardware lock, blocking until it becomes
   available.
 - LOCK2 implies LOCK1, and additionally acquires the exclusive hardware
   lock, blocking all other hardware threads from executing.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:50 +00:00
James Hogan 9b802d1f43 metag: Module support
Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:49 +00:00
James Hogan 44dea393cf metag: Scheduling/Process management
Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:49 +00:00
James Hogan 26025bbfbb metag: System Calls
Add metag system call and gateway page interfaces. The metag
architecture port uses the generic system call numbers from
asm-generic/unistd.h, as well as a user gateway page mapped at
0x6ffff000 which contains fast atomic primitives (depending on SMP) and
a fast method of accessing TLS data.

System calls use the SWITCH instruction with the immediate 0x440001 to
signal a system call.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:49 +00:00
James Hogan 5698c50d9d metag: Internal and external irqchips
Meta core internal interrupts (from HWSTATMETA and friends) are vectored
onto the TR1 core trigger for the current thread. This is demultiplexed
in irq-metag.c to individual Linux IRQs for each internal interrupt.

External SoC interrupts (from HWSTATEXT and friends) are vectored onto
the TR2 core trigger for the current thread. This is demultiplexed in
irq-metag-ext.c to individual Linux IRQs for each external SoC interrupt.
The external irqchip has devicetree bindings for configuring the number
of irq banks and the type of masking available.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Dom Cobley <popcornmix@gmail.com>
Cc: Simon Arlott <simon@fire.lp0.eu>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-doc@vger.kernel.org
2013-03-02 20:09:48 +00:00
James Hogan 63047ea360 metag: IRQ handling
Add core IRQ handling for metag. The code in irq.c exposes the TBX
signal numbers as Linux IRQs.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:48 +00:00
James Hogan ac919f0883 metag: Traps
Add trap code for metag. At the lowest level Meta traps (and return from
interrupt instruction - RTI) simply swap the PC and PCX registers and
optionally toggle the interrupt status bit (ISTAT). Low level TBX code
in tbipcx.S handles the core context save, determine the TBX signal
number based on the core trigger that fired (using the TXSTATI status
register), and call TBX signal handlers (mostly in traps.c) via a vector
table.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
2013-03-02 20:09:45 +00:00
James Hogan a2c5d4ed92 metag: Time keeping
Add time keeping code for metag. Meta hardware threads have 2 timers.
The background timer (TXTIMER) is used as a free-running time base, and
the interrupt timer (TXTIMERI) is used for the timer interrupt. Both
counters traditionally count at approximately 1MHz.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
2013-03-02 20:09:22 +00:00
James Hogan bc3966bf15 metag: ptrace
The ptrace interface for metag provides access to some core register
sets using the PTRACE_GETREGSET and PTRACE_SETREGSET operations. The
details of the internal context structures is abstracted into user API
structures to both ease use and allow flexibility to change the internal
context layouts. Copyin and copyout functions for these register sets
are exposed to allow signal handling code to use them to copy to and
from the signal context.

struct user_gp_regs (NT_PRSTATUS) provides access to the core general
purpose register context.

struct user_cb_regs (NT_METAG_CBUF) provides access to the TXCATCH*
registers which contains information abuot a memory fault, unaligned
access error or watchpoint. This can be modified to alter the way the
fault is replayed on resume ("catch replay"), or to prevent the replay
taking place.

struct user_rp_state (NT_METAG_RPIPE) provides access to the state of
the Meta read pipeline which can be used to hide memory latencies in
hand optimised data loops.

Extended DSP register state, DSP RAM, and hardware breakpoint registers
aren't yet exposed through ptrace.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Denys Vlasenko <vda.linux@googlemail.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Tony Lindgren <tony@atomide.com>
Cc: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
2013-03-02 20:09:22 +00:00
James Hogan 29dd78cf0b metag: Device tree
Add device tree files to arch/metag.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Vineet Gupta <vgupta@synopsys.com>
2013-03-02 20:09:22 +00:00
James Hogan 262d96b0de metag: Signal handling
Add signal handling code for metag.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
2013-03-02 20:09:21 +00:00
James Hogan c438b58e65 metag: TCM support
Add some TCM support

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:21 +00:00
James Hogan bbc17704d5 metag: Highmem support
Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:20 +00:00
James Hogan e624e95bd8 metag: Huge TLB
Add huge TLB support to the metag architecture.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:20 +00:00
James Hogan 373cd784d0 metag: Memory handling
Meta has instructions for accessing:
 - bytes        - GETB (1 byte)
 - words        - GETW (2 bytes)
 - doublewords  - GETD (4 bytes)
 - longwords    - GETL (8 bytes)

All accesses must be aligned. Unaligned accesses can be detected and
made to fault on Meta2, however it isn't possible to fix up unaligned
writes so we don't bother fixing up reads either.

This patch adds metag memory handling code including:
 - I/O memory (io.h, ioremap.c): Actually any virtual memory can be
   accessed with these helpers. A part of the non-MMUable address space
   is used for memory mapped I/O. The ioremap() function is implemented
   one to one for non-MMUable addresses.
 - User memory (uaccess.h, usercopy.c): User memory is directly
   accessible from privileged code.
 - Kernel memory (maccess.c): probe_kernel_write() needs to be
   overwridden to use the I/O functions when doing a simple aligned
   write to non-writecombined memory, otherwise the write may be split
   by the generic version.

Note that due to the fact that a portion of the virtual address space is
non-MMUable, and therefore always maps directly to the physical address
space, metag specific I/O functions are made available (metag_in32,
metag_out32 etc). These cast the address argument to a pointer so that
they can be used with raw physical addresses. These accessors are only
to be used for accessing fixed core Meta architecture registers in the
non-MMU region, and not for any SoC/peripheral registers.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:19 +00:00
James Hogan f5df8e268f metag: Memory management
Add memory management files for metag.

Meta's 32bit virtual address space is split into two halves:
 - local (0x08000000-0x7fffffff): traditionally local to a hardware
   thread and incoherent between hardware threads. Each hardware thread
   has it's own local MMU table. On Meta2 the local space can be
   globally coherent (GCOn) if the cache partitions coincide.
 - global (0x88000000-0xffff0000): coherent and traditionally global
   between hardware threads. On Meta2, each hardware thread has it's own
   global MMU table.

The low 128MiB of each half is non-MMUable and maps directly to the
physical address space:
 - 0x00010000-0x07ffffff: contains Meta core registers and maps SoC bus
 - 0x80000000-0x87ffffff: contains low latency global core memories

Linux usually further splits the local virtual address space like this:
 - 0x08000000-0x3fffffff: user mappings
 - 0x40000000-0x7fffffff: kernel mappings

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:19 +00:00
James Hogan 99ef7c2ac1 metag: Cache/TLB handling
Add cache and TLB handling code for metag, including the required
callbacks used by MM switches and DMA operations. Caches can be
partitioned between the hardware threads and the global space, however
this is usually configured by the bootloader so Linux doesn't make any
changes to this configuration. TLBs aren't configurable, so only need
consideration to flush them.

On Meta1 the L1 cache was VIVT which required a full flush on MM switch.
Meta2 has a VIPT L1 cache so it doesn't require the full flush on MM
switch. Meta2 can also have a writeback L2 with hardware prefetch which
requires some special handling. Support is optional, and the L2 can be
detected and initialised by Linux.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:19 +00:00
James Hogan 027f891f76 metag: TBX source
Add source files from the Thread Binary Interface (TBI) library which
provides useful low level operations and traps/context management.

Among other things it handles interrupt/exception/syscall entry (in
tbipcx.S).

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:18 +00:00
James Hogan 4ca151b208 metag: TBX header
Add the main header for the Thread Binary Interface (TBI) library which
provides useful low level operations and trap/context management.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:18 +00:00
James Hogan 85d9d7a920 metag: Boot
Add boot code for metag. Due to the multi-threaded nature of Meta it is
not uncommon for an RTOS or bare metal application to be started on
other hardware threads by the bootloader. Since there is a single MMU
switch which affects all threads, the MMU is traditionally configured by
the bootloader prior to starting Linux. The bootloader passes a
structure to Linux which among other things contains information about
memory regions which have been mapped. Linux then assumes control of the
local heap memory region.

A kernel arguments string pointer or a flattened device tree pointer can
be provided in the third argument.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:17 +00:00
James Hogan 87aa1328f2 metag: Header for core memory mapped registers
Add the header <asm/metag_mem.h> describing addresses, fields, and bits
of various core memory mapped registers in the low non-MMU region.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:17 +00:00
James Hogan af8a10493e metag: Headers for core arch constants
Add a couple of header files containing core architecture constants.

The first (<asm/metag_isa.h>) contains some constants relating to the
instruction set, such as values to give to the CACHEW and CACHER
instructions.

The second (<asm/metag_regs.h>) contains constants for the core register
units directly accessible to various instructions, and for the
registers, fields, and bits in those units. The main units described are
the control unit (CT.*), the trigger unit (TR.*), and the run-time trace
unit (TT.*).

Signed-off-by: James Hogan <james.hogan@imgtec.com>
2013-03-02 20:09:16 +00:00
James Hogan c19fa94a8f Add HAVE_64BIT_ALIGNED_ACCESS
On 64 bit architectures with no efficient unaligned access, padding and
explicit alignment must be added in various places to prevent unaligned
64bit accesses (such as taskstats and trace ring buffer).

However this also needs to apply to 32 bit architectures with 64 bit
accesses requiring alignment such as metag.

This is solved by adding a new Kconfig symbol HAVE_64BIT_ALIGNED_ACCESS
which defaults to 64BIT && !HAVE_EFFICIENT_UNALIGNED_ACCESS, and can be
explicitly selected by METAG and any other relevant architectures. This
can be used in various places to determine whether 64bit alignment is
required.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Eric Paris <eparis@redhat.com>
Cc: Will Drewry <wad@chromium.org>
2013-03-02 20:09:15 +00:00
Helge Deller cf8e18ea2f parisc: fix redefinition of SET_PERSONALITY
commit e72837e3e7 introduced
a default SET_PERSONALITY() in include/linux/elf.h.
This breaks with our own SET_PERSONALITY define for
32bit userspace on 64bit kernel.

Signed-off-by: Helge Deller <deller@gmx.de>
2013-03-02 20:15:28 +01:00
Rolf Eike Beer 1905b7716c parisc: do not install modules when installing kernel
PA-RISC is the only arch that installs the modules when installing the kernel.

Signed-off-by: Rolf Eike Beer <eike-kernel@sf-tec.de>
Signed-off-by: Helge Deller <deller@gmx.de>
2013-03-02 20:04:21 +01:00
Helge Deller 8527ed4a70 parisc: fix compile warnings triggered by atomic_sub(sizeof(),v)
This fixes compile warnings like this one:
net/ipv4/igmp.c: In function ‘ip_mc_leave_group’:
net/ipv4/igmp.c:1898:3: warning: overflow in implicit constant conversion [-Woverflow]

atomic_sub() is defined as __atomic_add_return(-(VAL),(v))))
and if VAL is of type unsigned int (as returned by sizeof()), negating
this value will overflow. Fix this by type-casting VAL to int type.

Signed-off-by: Helge Deller <deller@gmx.de>
2013-03-02 20:01:05 +01:00
Helge Deller d8d0524a39 parisc: avoid unitialized variable warning in pa_memcpy()
Avoid this warning, while still prevent gcc from optimizing away the exception code:
arch/parisc/lib/memcpy.c: In function ‘pa_memcpy’:
arch/parisc/lib/memcpy.c:256:2: warning: ‘dummy’ may be used uninitialized in this function [-Wuninitialized]

Signed-off-by: Helge Deller <deller@gmx.de>
2013-03-02 19:56:27 +01:00
Helge Deller 850df98434 parisc: remove unused variable 'compat_val'
clean up after commit 6e26aab98c
(switch to generic sigaltstack)

Signed-off-by: Helge Deller <deller@gmx.de>
2013-03-02 19:56:18 +01:00
Helge Deller 48139f8695 parisc: switch to compat_functions of io_setup, io_getevents and io_submit
Signed-off-by: Helge Deller <deller@gmx.de>
2013-03-02 19:56:08 +01:00
Helge Deller 4530c49e6d parisc: select ARCH_WANT_FRAME_POINTERS
Avoid the following warning when configuring the kernel for parisc:
warning: (LOCKDEP && FAULT_INJECTION_STACKTRACE_FILTER && LATENCYTOP && KMEMCHECK) selects FRAME_POINTER \
 which has unmet direct dependencies (DEBUG_KERNEL && (CRIS || M68K || FRV || UML || AVR32 || SUPERH ||  \
 BLACKFIN || MN10300) || ARCH_WANT_FRAME_POINTERS)

Signed-off-by: Helge Deller <deller@gmx.de>
2013-03-02 19:54:07 +01:00
Yinghai Lu 20e6926dcb x86, ACPI, mm: Revert movablemem_map support
Tim found:

  WARNING: at arch/x86/kernel/smpboot.c:324 topology_sane.isra.2+0x6f/0x80()
  Hardware name: S2600CP
  sched: CPU #1's llc-sibling CPU #0 is not on the same node! [node: 1 != 0]. Ignoring dependency.
  smpboot: Booting Node   1, Processors  #1
  Modules linked in:
  Pid: 0, comm: swapper/1 Not tainted 3.9.0-0-generic #1
  Call Trace:
    set_cpu_sibling_map+0x279/0x449
    start_secondary+0x11d/0x1e5

Don Morris reproduced on a HP z620 workstation, and bisected it to
commit e8d1955258 ("acpi, memory-hotplug: parse SRAT before memblock
is ready")

It turns out movable_map has some problems, and it breaks several things

1. numa_init is called several times, NOT just for srat. so those
	nodes_clear(numa_nodes_parsed)
	memset(&numa_meminfo, 0, sizeof(numa_meminfo))
   can not be just removed.  Need to consider sequence is: numaq, srat, amd, dummy.
   and make fall back path working.

2. simply split acpi_numa_init to early_parse_srat.
   a. that early_parse_srat is NOT called for ia64, so you break ia64.
   b.  for (i = 0; i < MAX_LOCAL_APIC; i++)
	     set_apicid_to_node(i, NUMA_NO_NODE)
     still left in numa_init. So it will just clear result from early_parse_srat.
     it should be moved before that....
   c.  it breaks ACPI_TABLE_OVERIDE...as the acpi table scan is moved
       early before override from INITRD is settled.

3. that patch TITLE is total misleading, there is NO x86 in the title,
   but it changes critical x86 code. It caused x86 guys did not
   pay attention to find the problem early. Those patches really should
   be routed via tip/x86/mm.

4. after that commit, following range can not use movable ram:
  a. real_mode code.... well..funny, legacy Node0 [0,1M) could be hot-removed?
  b. initrd... it will be freed after booting, so it could be on movable...
  c. crashkernel for kdump...: looks like we can not put kdump kernel above 4G
	anymore.
  d. init_mem_mapping: can not put page table high anymore.
  e. initmem_init: vmemmap can not be high local node anymore. That is
     not good.

If node is hotplugable, the mem related range like page table and
vmemmap could be on the that node without problem and should be on that
node.

We have workaround patch that could fix some problems, but some can not
be fixed.

So just remove that offending commit and related ones including:

 f7210e6c4a ("mm/memblock.c: use CONFIG_HAVE_MEMBLOCK_NODE_MAP to
    protect movablecore_map in memblock_overlaps_region().")

 01a178a94e ("acpi, memory-hotplug: support getting hotplug info from
    SRAT")

 27168d38fa ("acpi, memory-hotplug: extend movablemem_map ranges to
    the end of node")

 e8d1955258 ("acpi, memory-hotplug: parse SRAT before memblock is
    ready")

 fb06bc8e5f ("page_alloc: bootmem limit with movablecore_map")

 42f47e27e7 ("page_alloc: make movablemem_map have higher priority")

 6981ec3114 ("page_alloc: introduce zone_movable_limit[] to keep
    movable limit for nodes")

 34b71f1e04 ("page_alloc: add movable_memmap kernel parameter")

 4d59a75125 ("x86: get pg_data_t's memory from other node")

Later we should have patches that will make sure kernel put page table
and vmemmap on local node ram instead of push them down to node0.  Also
need to find way to put other kernel used ram to local node ram.

Reported-by: Tim Gardner <tim.gardner@canonical.com>
Reported-by: Don Morris <don.morris@hp.com>
Bisected-by: Don Morris <don.morris@hp.com>
Tested-by: Don Morris <don.morris@hp.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Thomas Renninger <trenn@suse.de>
Cc: Tejun Heo <tj@kernel.org>
Cc: Tang Chen <tangchen@cn.fujitsu.com>
Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-03-02 09:34:39 -08:00
Linus Torvalds 14cc0b55b7 Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal
Pull signal/compat fixes from Al Viro:
 "Fixes for several regressions introduced in the last signal.git pile,
  along with fixing bugs in truncate and ftruncate compat (on just about
  anything biarch at least one of those two had been done wrong)."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/signal:
  compat: restore timerfd settime and gettime compat syscalls
  [regression] braino in "sparc: convert to ksignal"
  fix compat truncate/ftruncate
  switch lseek to COMPAT_SYSCALL_DEFINE
  lseek() and truncate() on sparc really need sign extension
2013-03-02 08:34:06 -08:00
Linus Torvalds e23b62256a Initial ARC Linux port with some fixes on top for 3.9-rc1
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRMZYbAAoJEGnX8d3iisJeFj8P/R1hWohDDUc8pG3+ov9Y2Brt
 g7oIVw1udlKIk3HhVwsyT14/UHunfcTCONKKKGmmbfRrLJSMMsSlXvYoAQLozokf
 TuaO3Xt5IfERROqTrCDSwdNaAmwIZGsIuI9jWKo4qsXovAL0nc3sR527qMI1o7OE
 9X5eIqOJ/rPvOjXYrPqXmvO/DZKYG8PNTH4PYqePes31CsAmDXWBIlgYmgvF3th3
 ptwKPgRU/c2wKNpDDJXVQg/bcg9NI2cCnndNrjgXZgyUQrC37ZTdt/IOF5w6FgIW
 6i6UbDKXn8MgQAhrXx0Ns/+0kSJZ7eBWmj8hLyrxUzOYlF4rCs/il6ofDRaMO6fv
 9LmbNZXYnGICzm1YAxZRK7dm13IbDnltmMc81vISBpJSMTBgqzLWobHnq5/67Wh4
 2oUkoc2Tfaw70FnRCewX0x4Qop2YXmXl1KBwdecvzdcKi6Yg+rRH08ur/0yyCyx7
 +vAQpPVIuVqCc916qwmCPFaf1UMNnmMStxNH7D1AQHvi1G372NxfXizdYyKFRY9N
 f5Q+6DTo1xh2AxuGieSZxBoeK0Rlp4DWTOBD4MMz29y7BRX7LK1U2iS+nW0g8uir
 3RdYeAqyCxlJtjJNQX9U8ZT54jUPZgvJWU0udesRN1CBdOSQMjM9OyZsLLRtLeX1
 ww2tc7zqhBUyjBej6Itg
 =NKkW
 -----END PGP SIGNATURE-----

Merge tag 'arc-v3.9-rc1-late' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc

Pull new ARC architecture from Vineet Gupta:
 "Initial ARC Linux port with some fixes on top for 3.9-rc1:

  I would like to introduce the Linux port to ARC Processors (from
  Synopsys) for 3.9-rc1.  The patch-set has been discussed on the public
  lists since Nov and has received a fair bit of review, specially from
  Arnd, tglx, Al and other subsystem maintainers for DeviceTree, kgdb...

  The arch bits are in arch/arc, some asm-generic changes (acked by
  Arnd), a minor change to PARISC (acked by Helge).

  The series is a touch bigger for a new port for 2 main reasons:

   1. It enables a basic kernel in first sub-series and adds
      ptrace/kgdb/.. later

   2. Some of the fallout of review (DeviceTree support, multi-platform-
      image support) were added on top of orig series, primarily to
      record the revision history.

  This updated pull request additionally contains

   - fixes due to our GNU tools catching up with the new syscall/ptrace
     ABI

   - some (minor) cross-arch Kconfig updates."

* tag 'arc-v3.9-rc1-late' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (82 commits)
  ARC: split elf.h into uapi and export it for userspace
  ARC: Fixup the current ABI version
  ARC: gdbserver using regset interface possibly broken
  ARC: Kconfig cleanup tracking cross-arch Kconfig pruning in merge window
  ARC: make a copy of flat DT
  ARC: [plat-arcfpga] DT arc-uart bindings change: "baud" => "current-speed"
  ARC: Ensure CONFIG_VIRT_TO_BUS is not enabled
  ARC: Fix pt_orig_r8 access
  ARC: [3.9] Fallout of hlist iterator update
  ARC: 64bit RTSC timestamp hardware issue
  ARC: Don't fiddle with non-existent caches
  ARC: Add self to MAINTAINERS
  ARC: Provide a default serial.h for uart drivers needing BASE_BAUD
  ARC: [plat-arcfpga] defconfig for fully loaded ARC Linux
  ARC: [Review] Multi-platform image #8: platform registers SMP callbacks
  ARC: [Review] Multi-platform image #7: SMP common code to use callbacks
  ARC: [Review] Multi-platform image #6: cpu-to-dma-addr optional
  ARC: [Review] Multi-platform image #5: NR_IRQS defined by ARC core
  ARC: [Review] Multi-platform image #4: Isolate platform headers
  ARC: [Review] Multi-platform image #3: switch to board callback
  ...
2013-03-02 07:58:56 -08:00
Linus Torvalds aebb2afd54 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:

 o Add basic support for the Mediatek/Ralink Wireless SoC family.

 o The Qualcomm Atheros platform is extended by support for the new
   QCA955X SoC series as well as a bunch of patches that get the code
   ready for OF support.

 o Lantiq and BCM47XX platform have a few improvements and bug fixes.

 o MIPS has sent a few patches that get the kernel ready for the
   upcoming microMIPS support.

 o The rest of the series is made up of small bug fixes and cleanups
   that relate to various parts of the MIPS code.  The biggy in there is
   a whitespace cleanup.  After I was sent another set of whitespace
   cleanup patches I decided it was the time to clean the whitespace
   "issues" for once and and that touches many files below arch/mips/.

Fix up silly conflicts, mostly due to whitespace cleanups.

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (105 commits)
  MIPS: Quit exporting kernel internel break codes to uapi/asm/break.h
  MIPS: remove broken conditional inside vpe loader code
  MIPS: SMTC: fix implicit declaration of set_vi_handler
  MIPS: early_printk: drop __init annotations
  MIPS: Probe for and report hardware virtualization support.
  MIPS: ath79: add support for the Qualcomm Atheros AP136-010 board
  MIPS: ath79: add USB controller registration code for the QCA955X SoCs
  MIPS: ath79: add PCI controller registration code for the QCA955X SoCs
  MIPS: ath79: add WMAC registration code for the QCA955X SoCs
  MIPS: ath79: register UART for the QCA955X SoCs
  MIPS: ath79: add QCA955X specific glue to ath79_device_reset_{set, clear}
  MIPS: ath79: add GPIO setup code for the QCA955X SoCs
  MIPS: ath79: add IRQ handling code for the QCA955X SoCs
  MIPS: ath79: add clock setup code for the QCA955X SoCs
  MIPS: ath79: add SoC detection code for the QCA955X SoCs
  MIPS: ath79: add early printk support for the QCA955X SoCs
  MIPS: ath79: fix WMAC IRQ resource assignment
  mips: reserve elfcorehdr
  mips: Make sure kernel memory is in iomem
  MIPS: ath79: use dynamically allocated USB platform devices
  ...
2013-03-02 07:44:16 -08:00
Al Viro dfbb83d32c [regression] braino in "sparc: convert to ksignal"
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-03-02 02:55:16 -05:00
Russell King ded3ef0fa7 ARM: Fix broken commit 0cc41e4a21 corrupting kernel messages
Commit 0cc41e4a21 (arch: remove direct definitions of KERN_<LEVEL>
uses) is broken - not enough thought was put into changing:

	.asciz	"string"

to

	.asciz	"string1" "string2"

The problem is that each string gets _separately_ NUL terminated, so
the result is a string containing:

	"string1\0string2\0"

rather than:

	"string1string2\0"

With our new printk levels, this ends up as - eg, KERN_DEBUG "string":

	0x01 0x00 0x07 0x00 "string" 0x00

which produces lots of \x01 in the kernel log.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2013-03-01 21:09:59 +00:00
Konrad Rzeszutek Wilk 884ac2978a xen/pci: We don't do multiple MSI's.
There is no hypercall to setup multiple MSI per PCI device.
As such with these two new commits:
-  08261d87f7
   PCI/MSI: Enable multiple MSIs with pci_enable_msi_block_auto()
- 5ca72c4f7c
   AHCI: Support multiple MSIs

we would call the PHYSDEVOP_map_pirq 'nvec' times with the same
contents of the PCI device. Sander discovered that we would get
the same PIRQ value 'nvec' times and return said values to the
caller. That of course meant that the device was configured only
with one MSI and AHCI would fail with:

ahci 0000:00:11.0: version 3.0
xen: registering gsi 19 triggering 0 polarity 1
xen: --> pirq=19 -> irq=19 (gsi=19)
(XEN) [2013-02-27 19:43:07] IOAPIC[0]: Set PCI routing entry (6-19 -> 0x99 -> IRQ 19 Mode:1 Active:1)
ahci 0000:00:11.0: AHCI 0001.0200 32 slots 4 ports 6 Gbps 0xf impl SATA mode
ahci 0000:00:11.0: flags: 64bit ncq sntf ilck pm led clo pmp pio slum part
ahci: probe of 0000:00:11.0 failed with error -22

That is b/c in ahci_host_activate the second call to
devm_request_threaded_irq  would return -EINVAL as we passed in
(on the second run) an IRQ that was never initialized.

CC: stable@vger.kernel.org
Reported-and-Tested-by: Sander Eikelenboom <linux@eikelenboom.it>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2013-03-01 10:54:21 -05:00
Gabor Juhos 09f5100a59 watchdog: ath79_wdt: get register base from platform device's resources
The ath79_wdt driver uses a fixed memory address
currently. Although this is working with each
currently supported SoCs, but this may change
in the future. Additionally, the driver includes
platform specific header files in order to be
able to get the memory base of the watchdog
device.

The patch adds a memory resource to the platform
device, and converts the driver to get the base
address of the watchdog device from that.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2013-03-01 12:22:38 +01:00
Gabor Juhos 0f2ad9ed7c MIPS: ath79: use dynamically allocated watchdog device
Remove the static watchdog device variable and use
the 'platform_device_register_simple' helper to
allocate and register the device in one step.

This allows us to save a few bytes in the kernel image.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2013-03-01 12:22:29 +01:00
Linus Torvalds 1e5005979e Merge git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull one kvm bugfix from Gleb Natapov.

* git://git.kernel.org/pub/scm/virt/kvm/kvm:
  x86/kvm: Fix pvclock vsyscall fixmap
2013-02-28 20:44:23 -08:00
Linus Torvalds 1a32c58bb9 arm-soc: mvebu platform changes
This series contains changes for the Marvell EBU platforms (mvebu,
 orion, kirkwood, dove) that were not part of the first set of pull
 requests because of dependencies on the MMC tree, and being submitted
 a little late.
 
 Notable changes are:
 
 * More devices get moved out of board files into device tree
   descriptions. The remaining devices listed in there have patches
   that will get sent for 3.10, after which we can remove a lot of the
   board files entirely. We are doing the pinctrl and mmc drivers here,
   ethernet and PCI still remain.
 
 * SMP support for mvebu is improved with support for the
   local interrupt controller.
 
 * The Guruplug board file gets replaced with a DT description.
 
 Unfortunately, the dependency on the MMC tree turned out to be a much
 larger problem than expected, when the MMC maintainer rebased the patches
 in his tree that all of the patches in this branch are based on, which
 caused merge conflicts between the new and old versions of those patches.
 
 To work around the merge conflicts, this branch rebases all patches
 on top of the respective MMC patches that did get merged into 3.9.
 The patches are all identical to the versions that were part of
 linux-next, but have a new commit date.
 
 Merge conflicts:
 
 * in board-nsa310.c, the gpio.h inclusion was removed prematurely and
   put back as a bug fix earlier. With this series it is really not needed
   any more.
 
 * The patch to add rtc support was already applied by Andrew Morton,
   and conflicts with a second copy that was in this series, which adds
   a lot of other devices to arch/arm/boot/dts/armada-370-xp.dtsi.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIVAwUAUS+/hWCrR//JCVInAQK/eBAA0RskNuX3dL4Tn0FUBQfA11hMXyNLSLdY
 mwNE91jJO0Q6NIjSlZCMV0pqEhoVlWlKnHcD76ID68qxNHiU4XMyxT/NkwTQAdOC
 lKry+X8B5yt4kYiQp5adpME0rTHqtCQ9pNswU7j40ENNiOfwNk34O+PfNvh+FDkn
 s2mmLjyAbJgO1n5SGVETaVCGAW1/1dcCSxOV2BqUzn2AecTHmZb1lS8W+y761+Yi
 1V+Y3Xp4EJngN/OGtCNNfJ3H627MERfUF80xeijE2elhrdmynkBN1oOb4H+1AX6w
 Tsi4BUYd5BkeETgsskOeZevkbRq4LZGHueaofh9i11enjgVE09Z/P3eL2K6/UbBA
 mVA7+i1UujTcrEOUNO+EJ/AKvz7BU9trI4gR/RDHEkg2vzIHtsqMnDf44cQESxTn
 7AgLo+G5nG10hucgcTNse3Ev2k4wQpdev5QX3uGKVNW7PPoxY/abSYKtWek6TjGd
 nMGMI0+Re17Ej83SCXEJOvHmaA5IQDJJQOVLz/IxNuHE8HjEwJmguQy/YFzyZ0dQ
 Rha3iaLXrWBLt5jIYOIdI0K6S4KUp5mZCax2MK/c6D18Tiuk4iIA9yD1doL4a3g8
 AWoRL23ajabVa+Pg+EHqOsSUCfNI4+teMuio8vsJifudxZ6R8vYgJqdzIklwCkl3
 0l2Xvnf55Ks=
 =7l0+
 -----END PGP SIGNATURE-----

Merge tag 'late-mvebu-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC mvebu platform changes from Olof Johansson:
 "This series contains changes for the Marvell EBU platforms (mvebu,
  orion, kirkwood, dove) that were not part of the first set of pull
  requests because of dependencies on the MMC tree, and being submitted
  a little late.

  Notable changes are:

   - More devices get moved out of board files into device tree
     descriptions.  The remaining devices listed in there have patches
     that will get sent for 3.10, after which we can remove a lot of the
     board files entirely.  We are doing the pinctrl and mmc drivers
     here, ethernet and PCI still remain.

   - SMP support for mvebu is improved with support for the local
     interrupt controller.

   - The Guruplug board file gets replaced with a DT description.

  Unfortunately, the dependency on the MMC tree turned out to be a much
  larger problem than expected, when the MMC maintainer rebased the
  patches in his tree that all of the patches in this branch are based
  on, which caused merge conflicts between the new and old versions of
  those patches.

  To work around the merge conflicts, this branch rebases all patches on
  top of the respective MMC patches that did get merged into 3.9.  The
  patches are all identical to the versions that were part of
  linux-next, but have a new commit date."

* tag 'late-mvebu-rebased' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (90 commits)
  arm: mvebu: enable the SD card slot on Armada 370 Reference Design board
  ARM: kirkwood: topkick: init mvsdio via DT
  ARM: kirkwood: nsa310: convert to pinctrl
  ARM: Kirkwood: topkick: Enable i2c bus.
  ARM: kirkwood: topkick: convert to pinctrl
  ARM: dove: convert serial DT nodes to clocks property
  arm: mvebu: Add SPI flash on Armada 370 DB board
  arm: mvebu: Add SPI flash on Armada XP-DB board
  arm: mvebu: Add SPI flash on Armada XP-GP board
  arm: mvebu: Add support for SPI controller in Armada 370/XP
  clocksource: update and move armada-370-xp-timer documentation to timer directory
  arm: mvebu: update DT to support local timers
  ARM: Dove: convert usb host controller to DT
  arm: mvebu: Enable USB controllers on Armada 370/XP boards
  arm: mvebu: Add support for USB host controllers in Armada 370/XP
  arm: mvebu: add button for OpenBlocks AX3-4
  ARM: Kirkwood: Convert NS2 to gpio-poweroff.
  ARM: Kirkwood: Convert NSA310 I2C to device tree
  ARM: Kirkwood: Convert NSA310 to use gpio-poweroff driver
  ARM: Kirkwood: Convert NSA310 to DT based regulators.
  ...
2013-02-28 20:09:24 -08:00
Linus Torvalds 7307c00f33 arm-soc: late OMAP changes
This branch contains changes for OMAP that came in late during the release
 staging, close to when the merge window opened.
 
 It contains, among other things:
 
 - OMAP PM fixes and some patches for audio device integration
 - OMAP clock fixes related to common clock conversion
 - A set of patches cleaning up WFI entry and blocking.
 - A set of fixes and IP block support for PM on TI AM33xx SoCs (Beaglebone, etc)
 - A set of smaller fixes and cleanups around AM33xx restart and revision
   detection, as well as removal of some dead code (CONFIG_32K_TIMER_HZ)
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRL9AUAAoJEIwa5zzehBx3BiIQAIwJOAZQhbIsDAmqVAGfj39i
 Y6DneECJ3BvrMsC3nk6IUOC/aW5uUi2GAmhYI6YuDDKzLfeTSGW2VQcMa98cvWig
 dLo2CPqKuuB7YZAwHkg4i3BwHVJcaPntaKOajNmhwJQIiNEiXCauP/f9kG2NKvHu
 XxlWuNyeEB1uQlnB0nXL+HHqcHKxproK6eIvILWYJMdVYnMn+57O3yWBmXkCr07b
 9oOa1NdR+4xN7cSbS5YGUfxqwDWnXSZSKggXEPLglHObmSqj7R7NDBNgRR7ui8+t
 c3UYljPsiRprY8TYVTbator9wyYocZ6pMja+vrPwATHUMsxGZTurURzpYsyAXaMc
 VKWLWItCOOee8CKn1+pGpelon69//EJEFIsg1hChJJZKMRLHYVg48tM64/uN1VOo
 Mu/6XDLx4DearMxZv5pZ7Qe0IkIDGtlpyIwo1Yy6T5xEC6pcwRG0XeTuQtOxndFc
 XUcXrE+Nlg3eW/6xtB7XhftnKVoBsCrIQ5Z+PxMw1QNUTXWxQwZffeBLxGenuoD6
 IofLCdjVyRMcPnVj+s29ZO5k7yMllQ0dO8bySxoU2Y2QvD7wUdZxGDY5Nu7cwfAt
 jL0sEpT32g4ZSD8R75qt+qTDWv/IjB4EE/uNw3y2AUSTT5A+cN7H3MXw5s7hm8nI
 fw5cYz37iH0zUZhoIU/w
 =/vBT
 -----END PGP SIGNATURE-----

Merge tag 'late-omap' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC late OMAP changes from Olof Johansson:
 "This branch contains changes for OMAP that came in late during the
  release staging, close to when the merge window opened.

  It contains, among other things:

   - OMAP PM fixes and some patches for audio device integration
   - OMAP clock fixes related to common clock conversion
   - A set of patches cleaning up WFI entry and blocking.
   - A set of fixes and IP block support for PM on TI AM33xx SoCs
     (Beaglebone, etc)
   - A set of smaller fixes and cleanups around AM33xx restart and
     revision detection, as well as removal of some dead code
     (CONFIG_32K_TIMER_HZ)"

* tag 'late-omap' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
  ARM: omap2: include linux/errno.h in hwmod_reset
  ARM: OMAP2+: fix some omap_device_build() calls that aren't compiled by default
  ARM: OMAP4: hwmod data: Enable AESS hwmod device
  ARM: OMAP4: hwmod data: Update AESS data with memory bank area
  ARM: OMAP4+: AESS: enable internal auto-gating during initial setup
  ASoC: TI AESS: add autogating-enable function, callable from architecture code
  ARM: OMAP2+: hwmod: add enable_preprogram hook
  ARM: OMAP4: clock data: Add missing clkdm association for dpll_usb
  ARM: OMAP2+: PM: Fix the dt return condition in pm_late_init()
  ARM: OMAP2: am33xx-hwmod: Fix "register offset NULL check" bug
  ARM: OMAP2+: AM33xx: hwmod: add missing HWMOD_NO_IDLEST flags
  ARM: OMAP: AM33xx hwmod: Add parent-child relationship for PWM subsystem
  ARM: OMAP: AM33xx hwmod: Corrects PWM subsystem HWMOD entries
  ARM: DTS: AM33XX: Add nodes for OCMC RAM and WKUP-M3
  ARM: OMAP2+: AM33XX: Update the hardreset API
  ARM: OMAP2+: AM33XX: hwmod: Update the WKUP-M3 hwmod with reset status bit
  ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
  ARM: OMAP2+: AM33XX: hwmod: Update TPTC0 hwmod with the right flags
  ARM: OMAP2+: AM33XX: hwmod: Register OCMC RAM hwmod
  ARM: OMAP2+: AM33XX: CM/PRM: Use __ASSEMBLER__ macros in header files
  ...
2013-02-28 20:00:40 -08:00
Linus Torvalds f8f466c817 arm-soc: i.MX DT changes
This branch contains of devicetree changes for the Freescale i.MX platform.
 
 The base patch of the branch changes the format of the dts files to a
 slightly different format that makes it easier to do derivative board
 definitions, but it also introduces a lot of churn in the process since
 every line of the file is touched.
 
 On top of that are a handful of the regular changes; enabling more boards
 as DT-based instead of legacy board files (mx25pdk), enabling another
 driver for devicetree and thus adding bindings (onewire), etc.
 
 I'm not happy about the churn, and will likely not take it for other platforms
 in the future.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.11 (GNU/Linux)
 
 iQIcBAABAgAGBQJRL81iAAoJEIwa5zzehBx38egP/jkD5elNVtJ9Pu2AzwOnfYNG
 oNfoVRr189VcCxQ8sq9xocnZDPyJEZzR/wnrs0wiFcFaMU1qQJpR4EgG8zhifM8D
 plIFnf9H3z1/p+XKk7NwPII2RcSEQQ7jfK3UaPg0tQVOgGJiOh/czoYTRNHCaoQY
 RF0W1K01uR15Pee95USIBvllyveJrss54dFB9ON1xGgf3aAHtyoPy/7Robm1FZAd
 14msm3cN2v1lWXrTYvL8d+8sK6cIm1lOGOpc/VBSX5sjEBMiuGwnIDvajEvXIXMB
 DNvkK6WpWSQsVv0oDLgWSBcgqpEElHmbzOo0WTMdec4hjaoLHRbeLdoaA7On/kpj
 XofbXoXtsM2O5VSumhSfOWFtu22W3E4ng69UE5UkKknq8n+CKA5J0NmMW3PmCWws
 xk9bk9I1feqy4uVkgaihCV5o+gtawaG6vOBEClLoVF+D6INMGts1FBN/MNZCBLck
 hZjgr1/tcPlK5VMrxnlQBGRKcaXV1uGU+RWcV4jA1xR5GM3fQWMXe4aQohcYqglO
 lpHeZCfy5JDexY30jfA+ldcG27PxUIYqhapanYTmcXMCSO4XZ4o1gy8oxDLrUoXe
 /Whi3csxcGhitkUBWvxAeoOTeWRJonwyqEPJ/LpdNgnPmj8tnZKo3tc5wEKEywMA
 qVDu5M4yi3FfkDK+0vp9
 =72aL
 -----END PGP SIGNATURE-----

Merge tag 'late-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC i.MX DT changes from Olof Johansson:
 "This branch contains of devicetree changes for the Freescale i.MX
  platform.

  The base patch of the branch changes the format of the dts files to a
  slightly different format that makes it easier to do derivative board
  definitions, but it also introduces a lot of churn in the process
  since every line of the file is touched.

  On top of that are a handful of the regular changes; enabling more
  boards as DT-based instead of legacy board files (mx25pdk), enabling
  another driver for devicetree and thus adding bindings (onewire), etc.

  I'm not happy about the churn, and will likely not take it for other
  platforms in the future."

* tag 'late-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (21 commits)
  ARM: dts: add dtsi for imx6q and imx6dl
  ARM: dts: rename imx6q.dtsi to imx6qdl.dtsi
  ARM: dts: i.MX6: Add regulator delay support
  ARM: dts: Add device tree entry for onewire master on i.MX53
  ARM: i.MX53: Add clocks for i.mx53 onewire master.
  W1: Add device tree support to MXC onewire master.
  ARM: imx: enable imx6q-cpufreq support
  ARM: dts: Add apf51 basic support
  ARM i.MX6: change mxs usbphy clock usage
  ARM: dts: imx6q: Remove silicon version from SDMA firmware
  ARM i.MX53: dts: add oftree for MBa53 baseboard
  ARM i.MX53: add dts for the TQ tqma53 module
  ARM: dts: imx53: pinctrl update
  ARM i.MX51 babbage: Add keypad support
  ARM: dts: imx: Add imx51 KPP entry
  ARM: dts: imx25-karo-tx25: Put status entry in the end
  ARM: mx25pdk: Add device tree support
  ARM: dts: imx: use nodes label in board dts
  ARM: dts: add missing imx dtb targets
  ARM: boot: dts: Add an entry for imx27-pdk.dtb
  ...
2013-02-28 19:59:34 -08:00
Linus Torvalds 2af78448ff Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux
Pull thermal management updates from Zhang Rui:
 "Highlights:

   - introduction of Dove thermal sensor driver.

   - introduction of Kirkwood thermal sensor driver.

   - introduction of intel_powerclamp thermal cooling device driver.

   - add interrupt and DT support for rcar thermal driver.

   - add thermal emulation support which allows platform thermal driver
     to do software/hardware emulation for thermal issues."

* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (36 commits)
  thermal: rcar: remove __devinitconst
  thermal: return an error on failure to register thermal class
  Thermal: rename thermal governor Kconfig option to avoid generic naming
  thermal: exynos: Use the new thermal trend type for quick cooling action.
  Thermal: exynos: Add support for temperature falling interrupt.
  Thermal: Dove: Add Themal sensor support for Dove.
  thermal: Add support for the thermal sensor on Kirkwood SoCs
  thermal: rcar: add Device Tree support
  thermal: rcar: remove machine_power_off() from rcar_thermal_notify()
  thermal: rcar: add interrupt support
  thermal: rcar: add read/write functions for common/priv data
  thermal: rcar: multi channel support
  thermal: rcar: use mutex lock instead of spin lock
  thermal: rcar: enable CPCTL to use hardware TSC deciding
  thermal: rcar: use parenthesis on macro
  Thermal: fix a build warning when CONFIG_THERMAL_EMULATION cleared
  Thermal: fix a wrong comment
  thermal: sysfs: Add a new sysfs node emul_temp for thermal emulation
  PM: intel_powerclamp: off by one in start_power_clamp()
  thermal: exynos: Miscellaneous fixes to support falling threshold interrupt
  ...
2013-02-28 19:48:26 -08:00
Florian Fainelli 5649912059 arm: mvebu: enable the SD card slot on Armada 370 Reference Design board
The Armada 370 Reference Design board has one SD card slot, directly
connected to the SDIO IP of the SoC, so we enable this IP. there are no
GPIOs for card-detect and write-protect so we do not specify any.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:16 +01:00
Jason Cooper 0dbe6ce037 ARM: kirkwood: topkick: init mvsdio via DT
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Tested-by: Andrew Lunn <andrew@lunn.ch>
2013-02-28 18:57:16 +01:00
Jason Cooper 4ded65751c ARM: kirkwood: nsa310: convert to pinctrl
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:16 +01:00
Andrew Lunn 44d032e794 ARM: Kirkwood: topkick: Enable i2c bus.
Add a DT node for I2C and pinctrl hog for the pins. There appears to
be an i2c bus on topkick with a device on it:

i2cdetect 0
WARNING! This program can confuse your I2C bus, cause data loss and worse!
I will probe file /dev/i2c-0.
I will probe address range 0x03-0x77.
Continue? [Y/n] y
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
00:          -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- 64 -- -- -- -- -- -- -- -- -- -- --
70: -- -- -- -- -- -- -- --

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:15 +01:00
Jason Cooper 15989543d4 ARM: kirkwood: topkick: convert to pinctrl
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:15 +01:00
Sebastian Hesselbarth 8be7a962e8 ARM: dove: convert serial DT nodes to clocks property
of_serial now has support for using clocks property and we have
a DT clock provider. This patch replaces the hard coded clock-frequency
property with a clocks phandle to tclk.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:15 +01:00
Gregory CLEMENT 04e09b7273 arm: mvebu: Add SPI flash on Armada 370 DB board
This patch add support for the SPI flash MX25l25635E which is present
on the Armada 370 DB board. This flash stores the bootloader and its
environment.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:15 +01:00
Gregory CLEMENT 1f24a21f8e arm: mvebu: Add SPI flash on Armada XP-DB board
This patch add support for the SPI flash M25P64 which is present on
the Armada XP DB board. This flash stores the bootloader and its
environment.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:15 +01:00
Ezequiel Garcia 9dc3e34687 arm: mvebu: Add SPI flash on Armada XP-GP board
This patch adds an SPI master device node for Armada XP-GP board.
This master node is an SPI flash controller 'n25q128a13'.

Since there is no 'partitions' node declared, one full sized
partition named as the device will be created.

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Lior Amsalem <alior@marvell.com>
Tested-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:14 +01:00
Ezequiel Garcia d5dc035eaa arm: mvebu: Add support for SPI controller in Armada 370/XP
The Armada 370 and Armada XP SoC has an SPI controller.
This patch adds support for this controller in Armada 370
and Armada XP SoC common device tree files.

Note that the Armada XP SPI register length is 0x50 bytes,
while Armada 370 SPI register length is 0x28 bytes,
so we choose the smaller of the two.

Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Lior Amsalem <alior@marvell.com>
Acked-by: Gregory Clement <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:14 +01:00
Gregory CLEMENT e1dd464901 arm: mvebu: update DT to support local timers
Now that the time-armada-370-xp support local timers, updated the
device tree to take it into account.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:14 +01:00
Sebastian Hesselbarth a1abcd7c23 ARM: Dove: convert usb host controller to DT
With DT support for orion-ehci also convert Dove to it and
remove the legacy calls and clock aliases.

This patch is based on "ARM: Dove: split legacy and DT setup"
applied to mvebu/boards recently.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:14 +01:00
Ezequiel Garcia 200506b1b6 arm: mvebu: Enable USB controllers on Armada 370/XP boards
This patch activates every USB port provided by each SoC.
Except for Armada XP Openblocks AX3-4 board,
where we enable only the first two USB ports
until we have more information on the third one usage.

Cc: Lior Amsalem <alior@marvell.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:13 +01:00
Ezequiel Garcia b2bb806f55 arm: mvebu: Add support for USB host controllers in Armada 370/XP
The Armada 370 and Armada XP SoC has an Orion EHCI USB controller.
This patch adds support for this controller in Armada 370
and Armada XP SoC common device tree files.

Cc: Lior Amsalem <alior@marvell.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:13 +01:00
Thomas Petazzoni 4ca73962a1 arm: mvebu: add button for OpenBlocks AX3-4
The OpenBlocks AX3-4 board has one software-controlled button on the
front side, labeled "INIT", so we add minimal support for this button
in the kernel.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:13 +01:00
Andrew Lunn 102c9543ff ARM: Kirkwood: Convert NS2 to gpio-poweroff.
Remove C code and add a Device Tree node in its place.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Simon Guinot <simon.guinot@sequanux.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:13 +01:00
Andrew Lunn b4d2a24fa5 ARM: Kirkwood: Convert NSA310 I2C to device tree
Add a sub-node into the I2C node to represent the adt7476 device.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:12 +01:00
Andrew Lunn 7dcc628349 ARM: Kirkwood: Convert NSA310 to use gpio-poweroff driver
Remove the C code and add a Device Tree node for gpio-poweroff.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:12 +01:00
Andrew Lunn 12131b5424 ARM: Kirkwood: Convert NSA310 to DT based regulators.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:12 +01:00
Sebastian Hesselbarth 41e364bb24 ARM: Dove: add fixed regulator for CuBox USB power
CuBox needs to enable USB power on a gpio pin. Add a fixed regulator
to always enable usb power on boot.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:12 +01:00
Sebastian Hesselbarth e35e40cd55 ARM: Dove: move CuBox led pinctrl to gpio-leds node
gpio-leds has support for pinctrl allocation, make use of it.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:12 +01:00
Nobuhiro Iwamatsu 50ab955486 ARM: Kirkwood: Convert openblocks A6 board to pinctrl
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:11 +01:00
Nobuhiro Iwamatsu 9290469917 ARM: Kirkwood: Add pinctrl of NAND to 88f6282
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:11 +01:00
Nobuhiro Iwamatsu 00211e9650 ARM: Kirkwood: Add pinctrl of TWSI1 to 88f6282
The 88f6282 has one more TWSI(TWSI1). This add the information to enable
pinctl of TWSI1.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:11 +01:00
Thomas Petazzoni 8059fc1de2 arm: kirkwood: add pinmux option for the SDIO interface on 88F6282
This commit adds a pinmux option, pmx_sdio, to enable the muxing of
the SDIO interface on the 88F6282 SoC from Marvell.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:11 +01:00
Thomas Petazzoni 5dd8a01003 arm: kirkwood: mplcec4: use Device Tree to probe SDIO
Now that the mvsdio driver has a Device Tree binding, and the SDIO
controller is declared in kirkwood.dtsi, migrate the mplcec4 board to
use the Device Tree to probe the SDIO controller and to mux the pins
of the SDIO interface correctly.

This patch has not been tested, it remains to be tested by a person
having access to the hardware.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Stefan Peter <s.peter@mpl.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:11 +01:00
Thomas Petazzoni a49da46c52 arm: kirkwood: dreamplug: use Device Tree to probe SDIO
Now that the mvsdio driver has a Device Tree binding, and the SDIO
controller is declared in kirkwood.dtsi, migrate the dreamplug board
to use the Device Tree to probe the SDIO controller and to mux this
interface properly.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:10 +01:00
Thomas Petazzoni ec05fcf679 arm: kirkwood: add Device Tree informations for the SDIO controller
Now that the SDIO controller has a Device Tree binding, let's use it
in kirkwood.dtsi.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:10 +01:00
Thomas Petazzoni 5f6d11c398 arm: mvebu: enable the SDIO interface on the Globalscale Mirabox
The Globalscale Mirabox uses the SDIO interface of the Armada 370 to
connect to a Wifi/Bluetooth SD8787 chip, so we enable the SDIO
interface of this board in its Device Tree file.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:10 +01:00
Thomas Petazzoni b6150c7106 arm: mvebu: enable the SD card slot on Armada 370 DB board
The Armada XP DB evaluation board has one SD card slot, directly
connected to the SDIO IP of the SoC, so we add a device tree
description for it.

However, in the default configuration of the board, the SD card slot
is not usable: the connector plugged into CON40 must be changed
against a different one, provided with the board by the
manufacturer. Since such a manual modification of the hardware is
needed, we did not enable the SDIO interface by default, and left it
to the board user to modify the Device Tree if needed. Since this
board is really only an evaluation board for developers and not a
final product, it is not too bad.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:10 +01:00
Thomas Petazzoni d64c129b44 arm: mvebu: enable the SD card slot on Armada XP DB board
The Armada XP DB evaluation board has one SD card slot, directly
connected to the SDIO IP of the SoC, so we enable this
IP. Unfortunately, there are no GPIOs for card-detect and
write-protect.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:10 +01:00
Thomas Petazzoni 6d36e8e08f arm: mvebu: add pin muxing options for the SDIO interface on Armada XP
The SDIO interface is only available on pins MPP30/31/32/33/34/35 on
the various Armada XP variants, so we provide a pin muxing option for
this in the Armada XP .dtsi files.

Even though those muxing options are the same for MV78230, MV78260 and
MV78460, we keep them in each .dtsi file, because the number of pins,
and therefore the declaration of the pinctrl node, is different for
each SoC variant.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-02-28 18:57:09 +01:00