Commit Graph

5613 Commits

Author SHA1 Message Date
John Crispin 0d4649684c MIPS: ralink: mt7620: Add spi clock definition
Register a clock device for the SPI block of the
MT7620 SoC. The clock device will be used by the
SPI host controller driver to determine the base
clock of the controller.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5754/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 16:58:06 +02:00
John Crispin 68c9b7ed9e MIPS: ralink: mt7620: Add wdt clock definition
The watchdog driver of the SoC uses the clk API to
get the clock associated with the watchdog device.
However the MT7620 specific setup code does not
register a clock for the watchdog device yet which
leads to the following error:

  rt2880_wdt: probe of 10000120.watchdog failed with error -2

Register a clock device for the watchdog in order to
avoid the error and make the watchdog usable.

Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5756/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 16:57:31 +02:00
Gabor Juhos ded1e9d727 MIPS: ralink: mt7620: Improve clock frequency detection
The current code assumes that the peripheral clock always
runs at 40MHz which is not true in all configuration. The
peripheral clock can also use the reference clock instead
of the fixed 40MHz rate. If the reference clock runs at a
different rate, various peripheries are behaving incorrectly.

Additionally, the currectly calculated system clock is also
wrong. The actual value what the code computes is the rate
of the DRAM which can be different from the system clock.

Add new helper functions to get the rate of the different
clocks and use the correct values for the registered clock
devices.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5755/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 16:57:05 +02:00
John Crispin 2b9dbb15a9 MIPS: ralink: mt7620: This SoC has EHCI and OHCI hosts
Select the the EHCI and OHCI symbols.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5675/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 16:56:43 +02:00
John Crispin 538e0daa0d MIPS: ralink: mt7620: Add verbose ram info
Make the code print which of SDRAM, DDR1 or DDR2 was detected.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/5671/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 16:56:09 +02:00
John Crispin b1f172a133 MIPS: ralink: Probe clocksources from OF
Make plat_time_init() call clocksource_of_init() allowing the systick cevt
to load.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/5670/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 16:55:50 +02:00
John Crispin 1f2acc5a8a MIPS: ralink: Add support for systick timer found on newer ralink SoC
Newer Ralink SoC (MT7620x and RT5350) have a 50KHz clock that runs independent
of the SoC master clock. If we want to automatic frequency scaling to work we
need to use the systick timer as the clock source.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5669/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 16:55:29 +02:00
John Crispin 80ecbd2457 MIPS: ralink: Add support for periodic timer irq
Adds a driver for the periodic timer found on Ralink SoC.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5682/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-04 16:55:05 +02:00
Al Viro 6af4ea0ba7 oprofilefs_create_...() do not need superblock argument
same story as with oprofilefs_mkdir()

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-09-03 22:52:48 -04:00
Al Viro ecde28237e oprofilefs_mkdir() doesn't need superblock argument
it's always equal to ->d_sb of the second argument (parent dentry),
due to either being literally that, or ->d_sb of parent's parent.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-09-03 22:52:47 -04:00
Al Viro ef7bca1456 oprofile: don't bother with passing superblock to ->create_files()
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-09-03 22:52:46 -04:00
Linus Torvalds a923874198 PCI changes for the v3.12 merge window:
PCI device hotplug
     - Use PCIe native hotplug, not ACPI hotplug, when possible (Neil Horman)
     - Assign resources on per-host bridge basis (Yinghai Lu)
 
   MPS (Max Payload Size)
     - Allow larger MPS settings below hotplug-capable Root Port (Yijing Wang)
     - Add warnings about unsafe MPS settings (Yijing Wang)
     - Simplify interface and messages (Bjorn Helgaas)
 
   SR-IOV
     - Return -ENOSYS on non-SR-IOV devices (Stefan Assmann)
     - Update NumVFs register when disabling SR-IOV (Yijing Wang)
 
   Virtualization
     - Add bus and slot reset support (Alex Williamson)
     - Fix ACS (Access Control Services) issues (Alex Williamson)
 
   Miscellaneous
     - Simplify PCIe Capability accessors (Bjorn Helgaas)
     - Add pcibios_pm_ops for arch-specific hibernate stuff (Sebastian Ott)
     - Disable decoding during BAR sizing only when necessary (Zoltan Kiss)
     - Delay enabling bridges until they're needed (Yinghai Lu)
     - Split Designware support into Synopsys and Exynos parts (Jingoo Han)
     - Convert class code to use dev_groups (Greg Kroah-Hartman)
     - Cleanup Designware and Exynos I/O access wrappers (Seungwon Jeon)
     - Fix bridge I/O window alignment (Bjorn Helgaas)
     - Add pci_wait_for_pending_transaction() (Casey Leedom)
     - Use devm_ioremap_resource() in Marvell driver (Tushar Behera)
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Merge tag 'pci-v3.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI changes from Bjorn Helgaas:

  PCI device hotplug:
    - Use PCIe native hotplug, not ACPI hotplug, when possible (Neil Horman)
    - Assign resources on per-host bridge basis (Yinghai Lu)

  MPS (Max Payload Size):
    - Allow larger MPS settings below hotplug-capable Root Port (Yijing Wang)
    - Add warnings about unsafe MPS settings (Yijing Wang)
    - Simplify interface and messages (Bjorn Helgaas)

  SR-IOV:
    - Return -ENOSYS on non-SR-IOV devices (Stefan Assmann)
    - Update NumVFs register when disabling SR-IOV (Yijing Wang)

  Virtualization:
    - Add bus and slot reset support (Alex Williamson)
    - Fix ACS (Access Control Services) issues (Alex Williamson)

  Miscellaneous:
    - Simplify PCIe Capability accessors (Bjorn Helgaas)
    - Add pcibios_pm_ops for arch-specific hibernate stuff (Sebastian Ott)
    - Disable decoding during BAR sizing only when necessary (Zoltan Kiss)
    - Delay enabling bridges until they're needed (Yinghai Lu)
    - Split Designware support into Synopsys and Exynos parts (Jingoo Han)
    - Convert class code to use dev_groups (Greg Kroah-Hartman)
    - Cleanup Designware and Exynos I/O access wrappers (Seungwon Jeon)
    - Fix bridge I/O window alignment (Bjorn Helgaas)
    - Add pci_wait_for_pending_transaction() (Casey Leedom)
    - Use devm_ioremap_resource() in Marvell driver (Tushar Behera)

* tag 'pci-v3.12-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (63 commits)
  PCI/ACPI: Fix _OSC ordering to allow PCIe hotplug use when available
  PCI: exynos: Add I/O access wrappers
  PCI: designware: Drop "addr" arg from dw_pcie_readl_rc()/dw_pcie_writel_rc()
  PCI: Remove pcie_cap_has_devctl()
  PCI: Support PCIe Capability Slot registers only for ports with slots
  PCI: Remove PCIe Capability version checks
  PCI: Allow PCIe Capability link-related register access for switches
  PCI: Add offsets of PCIe capability registers
  PCI: Tidy bitmasks and spacing of PCIe capability definitions
  PCI: Remove obsolete comment reference to pci_pcie_cap2()
  PCI: Clarify PCI_EXP_TYPE_PCI_BRIDGE comment
  PCI: Rename PCIe capability definitions to follow convention
  PCI: Warn if unsafe MPS settings detected
  PCI: Fix MPS peer-to-peer DMA comment syntax
  PCI: Disable decoding for BAR sizing only when it was actually enabled
  PCI: Add comment about needing pci_msi_off() even when CONFIG_PCI_MSI=n
  PCI: Add pcibios_pm_ops for optional arch-specific hibernate functionality
  PCI: Don't restrict MPS for slots below Root Ports
  PCI: Simplify MPS test for Downstream Port
  PCI: Remove unnecessary check for pcie_get_mps() failure
  ...
2013-09-03 16:24:35 -07:00
Ganesan Ramalingam 1cf0e1be81 MIPS: Netlogic: Built-in DTB for XLP2xx SoC boards
Add a default built-in device tree for XLP2xx SoC. The new file
xlp_fvp.dts has updated entries for I2C and memory.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5705/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:20 +02:00
Ganesan Ramalingam 9eac3591e7 MIPS: Netlogic: Add support for USB on XLP2xx
Add USB intialization code to handle the new XLP2XX USB 3.0 block.
This adds xlp/usb-init-xlp2.c to initialize the XLP2XX USB glue-logic
for XHCI and EHCI. Interrupt and IO offset code in xlp-hal/iomap.h
and xlp/nlm_hal.c is also updated for the new USB block.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5744/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:20 +02:00
Ganesan Ramalingam e5be1fd007 MIPS: Netlogic: XLP2xx update for I2C controller
XLP2xx has a new I2C controller which has 4 buses connected to
it. Update the IO offset and IRQ mapping code to reflect this.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5707/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:20 +02:00
Jayachandran C c49e42aba8 MIPS: Netlogic: Core wakeup changes for XLP2XX
On XLP2xx, wakeup code does not need to enable clock on the core.
Update xlp/wakeup.c to handle this.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5703/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:19 +02:00
Ganesan Ramalingam 57ceb4b020 MIPS: Netlogic: XLP2XX CPU and PIC frequency
Add code to calculate the CPU and PIC frequency for XLP2XX SoCs.

Since the PIC frequency on XLP2XX can be configured, add a new macro
pic_timer_freq() to be used in netlogic/common/time.c.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Cc: Ganesan Ramalingam <ganesanr@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/5701/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:19 +02:00
Jayachandran C 5b6ff35d33 MIPS: Netlogic: Call xlp_mmu_init on all threads
The config7/config4 register has to be written on all the threads.
This does not cause any problems in XLP, but is needed for XLPII

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5700/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:19 +02:00
Jayachandran C 4ca86a2ff3 MIPS: Netlogic: Add support for XLP2XX
XLP2XX is first in the series of 28nm XLPII processors.

The changes are to:
* Add processor ID for XLP2XX to asm/cpu.h and kernel/cpu-probe.c.
* Add a cpu_is_xlpii() function to check for XLPII processors.
* Update xlp_mmu_init() to use config4 to enable extended TLB.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5698/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:19 +02:00
Jayachandran C 13314a91f0 MIPS: Netlogic: Fix DT flash size parameter
The flash chipselects can span 32MB, fix this in the built-in device
tree.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5704/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:18 +02:00
Jayachandran C 4f848ba5a0 MIPS: Netlogic: Remove memory section from built-in DT
Do not pass a memory section in the built-in DTB, and let the
boot code use the values from the DRAM BARs.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5699/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:18 +02:00
Jayachandran C a2ba6cd6e6 MIPS: Netlogic: Read memory from DRAM BARs
Read the memory from the Bridge DRAM BARs, if it is not passed in
from the device tree. This will allow us to remove memory configuration
from built in device trees.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5743/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:18 +02:00
Gabor Juhos 2c4f1ac562 MIPS: ath79: Switch to the clkdev framework
The ath79 code uses static clock devices and
provides its own clk_{get,put} implementations.

Change the code to use dynamically allocated
clock devices and register the clocks within
the clkdev framework.

Additionally, remove the local clk_{get,put}
implementation. The clkdev framework has a
common implementation of those.

Also move the call of ath79_clock_init() from
plat_mem_init() to plat_time_init(). Otherwise
it would not be possible to use memory allocation
functions from ath79clock_init() becasuse the
memory subsystem is not yet initialized when
plat_mem_init() runs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5780/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:18 +02:00
Gabor Juhos 6612a6885b MIPS: ath79: Use local variables for clock rates
Use local variables for ref, cpu, ddr and ahb
rates in SoC specific clock init functions.

The patch has no functional changes, it is
an interim change in preparation of the next
patch.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5781/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:18 +02:00
Gabor Juhos 59a8c10b25 MIPS: ath79: Use ath79_get_sys_clk_rate to get basic clock rates
Instead of accessing the rate field of the static
clock devices directly, use the recently introduced
helper function to get the rate of the basic clocks.

The static ath79_{ahb,cpu,ddr,ref}_clk variables
will be removed by a subsequent patch. The actual
change is in preparation of that.

Also move the clock frequency printing code into
the plat_time_init function. We are getting the
cpu clock rate there already so we can save an
extra call of the helper.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5782/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:17 +02:00
Gabor Juhos 2310780244 MIPS: ath79: Use a helper function to get system clock rates
The ath79 platform uses similar code to get the
rate of various clocks during init. Separate the
similar code into a new helper function and use
that to avoid code duplication.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5778/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:17 +02:00
Gabor Juhos 837f036c8a MIPS: ath79: Use local ref clock rate in ar934x_get_pll_freq
The reference clock rate is passed in the first
argument of the function. Use that instead of the
rate of the global ath79_ref_clk variable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5779/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:17 +02:00
Felix Fietkau a1191927ac MIPS: ath79: Fix ar933x watchdog clock
The watchdog device on the AR933x is connected to
the AHB clock, however the current code uses the
reference clock. Due to the wrong rate, the watchdog
driver can't calculate correct register values for
a given timeout value and the watchdog unexpectedly
restarts the system.

The code uses the wrong value since the initial
commit 04225e1d22
(MIPS: ath79: add AR933X specific clock init)

The patch fixes the code to use the correct clock
rate to avoid the problem.

Cc: stable@vger.kernel.org
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5777/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:16 +02:00
Gabor Juhos 70c3c4cd2d MIPS: ath79: Don't hardwire cpu_has_dsp{2} to 0
The ath79 code supports various SoCs which are using either a 24Kc
or a 74Kc core. The 74Kc core has DSP support, so don't hardwire
the values to zero.

Commit 00dc5ce2a6 (MIPS: ath79: don't
hardcode the unavailability of the DSP ASE) has fixed this already,
but that change got reverted by 475032564e
(MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.)

Reported-by: Helmut Schaa <helmut.schaa@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5750/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:16 +02:00
John Crispin 9d9a49ab32 MIPS: Lantiq: Add defconfig for xway SoC
This add a default config for the Lantiq XWAY SoC.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5796/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:16 +02:00
Thomas Langer df8b5bed1b MIPS: Lantiq: Falcon: fix asc clock definition
The clocks of the serial ports were not setup properly.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5659/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:16 +02:00
Thomas Langer 362b34faef MIPS: Lantiq: Falcon: add cpu-feature-override.h
Add cpu-feature-override.h for the GPON SoC

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5658/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:16 +02:00
John Crispin 45d3f186cf MIPS: Lantiq: Adds minimal dcdc driver
This driver so far only reads the core voltage.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5677/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 23:22:15 +02:00
Linus Torvalds 2f01ea908b TTY/Serial driver patches for 3.12-rc1
Here's the big tty/serial driver pull request for 3.12-rc1.
 
 Lots of n_tty reworks to resolve some very long-standing issues, removing the
 3-4 different locks that were taken for every character.  This code has been
 beaten on for a long time in linux-next with no reported regressions.
 
 Other than that, a range of serial and tty driver updates and revisions.  Full
 details in the shortlog.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'tty-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial driver patches from Greg KH:
 "Here's the big tty/serial driver pull request for 3.12-rc1.

  Lots of n_tty reworks to resolve some very long-standing issues,
  removing the 3-4 different locks that were taken for every character.
  This code has been beaten on for a long time in linux-next with no
  reported regressions.

  Other than that, a range of serial and tty driver updates and
  revisions.  Full details in the shortlog"

* tag 'tty-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (226 commits)
  hvc_xen: Remove unnecessary __GFP_ZERO from kzalloc
  serial: imx: initialize the local variable
  tty: ar933x_uart: add device tree support and binding documentation
  tty: ar933x_uart: allow to build the driver as a module
  ARM: dts: msm: Update uartdm compatible strings
  devicetree: serial: Document msm_serial bindings
  serial: unify serial bindings into a single dir
  serial: fsl-imx-uart: Cleanup duplicate device tree binding
  tty: ar933x_uart: use config_enabled() macro to clean up ifdefs
  tty: ar933x_uart: remove superfluous assignment of ar933x_uart_driver.nr
  tty: ar933x_uart: use the clk API to get the uart clock
  tty: serial: cpm_uart: Adding proper request of GPIO used by cpm_uart driver
  serial: sirf: fix the amount of serial ports
  serial: sirf: define macro for some magic numbers of USP
  serial: icom: move array overflow checks earlier
  TTY: amiserial, remove unnecessary platform_set_drvdata()
  serial: st-asc: remove unnecessary platform_set_drvdata()
  msm_serial: Send more than 1 character on the console w/ UARTDM
  msm_serial: Add support for non-GSBI UARTDM devices
  msm_serial: Switch clock consumer strings and simplify code
  ...
2013-09-03 11:38:36 -07:00
Linus Torvalds 542a086ac7 Driver core patches for 3.12-rc1
Here's the big driver core pull request for 3.12-rc1.
 
 Lots of tiny changes here fixing up the way sysfs attributes are
 created, to try to make drivers simpler, and fix a whole class race
 conditions with creations of device attributes after the device was
 announced to userspace.
 
 All the various pieces are acked by the different subsystem maintainers.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'driver-core-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core

Pull driver core patches from Greg KH:
 "Here's the big driver core pull request for 3.12-rc1.

  Lots of tiny changes here fixing up the way sysfs attributes are
  created, to try to make drivers simpler, and fix a whole class race
  conditions with creations of device attributes after the device was
  announced to userspace.

  All the various pieces are acked by the different subsystem
  maintainers"

* tag 'driver-core-3.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (119 commits)
  firmware loader: fix pending_fw_head list corruption
  drivers/base/memory.c: introduce help macro to_memory_block
  dynamic debug: line queries failing due to uninitialized local variable
  sysfs: sysfs_create_groups returns a value.
  debugfs: provide debugfs_create_x64() when disabled
  rbd: convert bus code to use bus_groups
  firmware: dcdbas: use binary attribute groups
  sysfs: add sysfs_create/remove_groups for when SYSFS is not enabled
  driver core: add #include <linux/sysfs.h> to core files.
  HID: convert bus code to use dev_groups
  Input: serio: convert bus code to use drv_groups
  Input: gameport: convert bus code to use drv_groups
  driver core: firmware: use __ATTR_RW()
  driver core: core: use DEVICE_ATTR_RO
  driver core: bus: use DRIVER_ATTR_WO()
  driver core: create write-only attribute macros for devices and drivers
  sysfs: create __ATTR_WO()
  driver-core: platform: convert bus code to use dev_groups
  workqueue: convert bus code to use dev_groups
  MEI: convert bus code to use dev_groups
  ...
2013-09-03 11:37:15 -07:00
Ralf Baechle 17efb59adc MIPS: Move declaration of Octeon function fixup_irqs() to header.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 18:19:28 +02:00
James Hogan 4defe4559e MIPS: Add uImage build target
Add a uImage build target for MIPS, which builds uImage.gz (a U-Boot
image of vmlinux.bin.gz), and then symlinks it to uImage. This allows
for the use of other compression algorithms in future, and is how a few
other architectures do it.

It's enabled conditionally on load-y >= 0xffffffff80000000 which
hopefully allows 64bit kernels to also work as long as the load and
entry address can be represented by the 32bit addresses in the U-Boot
image format.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5795/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 18:00:01 +02:00
James Hogan 3185557d1a MIPS: Refactor load/entry address calculations
The vmlinux load address and entry address is calculated in multiple
places:
 - arch/mips/Makefile defines load-y from CONFIG_PHYSICAL_START (or
   defined by the platform) and passes it to
   arch/mips/boot/compressed/Makefile.
 - arch/mips/boot/compressed/Makefile calculates kernel entry using nm.
 - arch/mips/lasat/image/Makefile calculates both load and entry address
   using nm.

Lets combine these in the main Makefile and then pass them as Make
parameters to each of the three boot image Makefiles (in boot/,
boot/compressed, lasat/image/). The boot/ Makefile doesn't currently use
them, but will soon need to for U-Boot image targets.

The existing load-y definition is used in preference to calculating the
load address using nm.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5794/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 17:58:37 +02:00
James Hogan 38d2d649be MIPS: Refactor boot and boot/compressed rules
Split out the arch/mips/boot/ and arch/mips/boot/compressed/ targets
into boot-y and bootz-y variables. This makes it slightly cleaner to add
new targets.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5793/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 17:57:50 +02:00
James Hogan 3b29aa5ba2 MIPS: add <dt-bindings/> symlink
Add symlink to include/dt-bindings from arch/mips/boot/dts/include/ to
match the ones in ARM and Meta architectures so that preprocessed device
tree files can include various useful constant definitions.

See commit c58299a (kbuild: create an "include chroot" for DT bindings)
merged in v3.10-rc1 for details.

MIPS structures it's dts files a little differently to other
architectures, having a separate dts directory for each SoC/platform,
but most of the definitions in the dt-bindings/ directory are common so
for now lets just have a single "include chroot" for all MIPS platforms.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Steven. J. Hill <steven.hill@imgtec.com>
Cc: Michal Marek <mmarek@suse.cz>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kbuild@vger.kernel.org
Acked-by: Stephen Warren <swarren@nvidia.com>
Patchwork: http://patchwork.linux-mips.org/patch/5745/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 17:08:40 +02:00
Markos Chandras f7c1285f0e MIPS: powertv: Drop BOOTLOADER_DRIVER Kconfig symbol
The kbldr.h header file required for this was neither committed in the
original submission in a3a0f8c8ed
"MIPS: PowerTV: Base files for Cisco PowerTV platform"
nor was it ever present in the git tree so this option never worked.
Fixes the following build problem:
arch/mips/powertv/reset.c:25:36: fatal error: asm/mach-powertv/kbldr.h: No such
file or directory
compilation terminated.

Cc: David VomLehn <dvomlehn@cisco.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: David VomLehn <dvomlehn@cisco.com>
Patchwork: https://patchwork.linux-mips.org/patch/5801/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 16:48:37 +02:00
Markos Chandras c5eaff3e85 MIPS: Kconfig: Drop obsolete NR_CPUS_DEFAULT_{1,2} options
The NR_CPUS_DEFAULT_1 introduced as an aid for the QEMU
platform in 72ede9b189
"[MIPS] Qemu: Fix Symmetric Uniprocessor support"
which was later removed in
302922e5f6
"[MIPS] Qemu: Remove platform."

On certain randconfigs it may happen for NR_CPUS to have an
empty value because not all SMP platforms select a suitable
NR_CPUS_DEFAULT_* value. We fix this by restoring the range
of NR_CPUS to 2..64 and drop the NR_CPUS_DEFAULT_{1,2} symbols.
The first one is no longer used and the latter is not needed since
NR_CPUS=2 is now the default value.

Fixes the following problem on a randconfig:
.config:164:warning: symbol value '' invalid for NR_CPUS

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5747/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 16:31:26 +02:00
Markos Chandras c8acd40d38 MIPS: TXx9: Fix build error if CONFIG_TOSHIBA_JMR3927 is not selected
The jmr3927_vec txx9_board_vec struct is defined in
txx9/jmr3927/setup.c which is only built if
CONFIG_TOSHIBA_JMR3927 is selected. This patch fixes the following
build problem:

arch/mips/txx9/generic/setup.c: In function 'select_board':
arch/mips/txx9/generic/setup.c:354:20: error:
'jmr3927_vec' undeclared (first use in this function)
arch/mips/txx9/generic/setup.c:354:20: note: each undeclared
identifier is reported only once for each function it appears in
make[3]: *** [arch/mips/txx9/generic/setup.o] Error 1

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5713/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 15:30:50 +02:00
Markos Chandras 8510376e59 MIPS: Loongson: Hide the pci code behind CONFIG_PCI
The pci.c code depends on symbols which are only visible
if CONFIG_PCI is selected.

Also fixes the following problem on loongson allnoconfig:
arch/mips/built-in.o: In function `pcibios_init':
pci.c:(.init.text+0x528):
undefined reference to `register_pci_controller'
arch/mips/built-in.o:(.data+0xc):
undefined reference to `loongson_pci_ops'

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5584/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-09-03 15:27:39 +02:00
Corey Minyard 05f226391d MIPS: Ftrace: Fix function tracing return address to match
Dynamic function tracing was not working on MIPS.  When doing dynamic
tracing, the tracer attempts to match up the passed in address with
the one the compiler creates in the mcount tables.  The MIPS code was
passing in the return address from the tracing function call, but the
compiler tables were the address of the function call.  So they
wouldn't match.

Just subtracting 8 from the return address will give the address of
the function call.  Easy enough.

Signed-off-by: Corey Minyard <cminyard@mvista.com>
[david.daney@cavium.com: Adjusted code comment and patch Subject.]
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/5592/
2013-09-03 14:46:27 +02:00
Maciej W. Rozycki afddce0cc9 MIPS: R4k clock source initialization bug fix
This is a fix for a bug introduced with commit
447cdf2628, submitted as archived here:
http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20080312235002.c717dde3.yoichi_yuasa%40tripeaks.co.jp
regrettably with no further explanation.

The issue is with the CP0 Count register read erratum present on R4000 and
some R4400 processors.  If this erratum is present, then a read from this
register that happens around the time it reaches the value stored in the
CP0 Compare register causes a CP0 timer interrupt that is supposed to
happen when the values in the two registers match to be missed.  The
implication for the chips affected is the CP0 timer can be used either as
a source of a timer interrupt (a clock event) or as a source of a
high-resolution counter (a clock source), but not both at a time.

The erratum does not affect timer interrupt operation itself, because in
this case the CP0 Count register is only read while the timer interrupt
has already been raised, while high-resolution counter references happen
at random times.

Additionally some systems apparently have issues with the timer interrupt
line being routed externally and not following the usual CP0 Count/Compare
semantics.  In this case we don't want to use the R4k clock event.

We've meant to address the erratum and the timer interrupt routing issue
in time_init, however the commit referred to above broke our solution.
What we currently have is we enable the R4k clock source if the R4k clock
event initialization has succeeded (the timer is present and has no timer
interrupt routing issue) or there is no CP0 Count register read erratum.
Which gives the following boolean matrix:

clock event | count erratum => clock source
------------+---------------+--------------
     0      |       0       |      1 (OK)
     0      |       1       |      0 (bug!) -> no interference, could use
     1      |       0       |      1 (OK)
     1      |       1       |      1 (bug!) -> can't use, interference

What we want instead is to enable the R4k clock source if there is no CP0
Count register read erratum (obviously) or the R4k clock event
initialization has *failed* -- because in the latter case we won't be
using the timer interrupt anyway, so we don't care about any interference
CP0 Count reads might cause with the interrupt.  This corresponds to the
following boolean matrix:

clock event | count erratum => clock source
------------+---------------+--------------
     0      |       0       |      1
     0      |       1       |      1
     1      |       0       |      1
     1      |       1       |      0

This is implemented here, effectively reverting the problematic commit,
and a short explanation is given next to code modified so that the
rationale is known to future readers and confusion is prevented from
happening here again.

It is worth noting that mips_clockevent_init returns 0 upon success while
cpu_has_mfc0_count_bug returns 0 upon failure.  This is because the former
function returns an error code while the latter returns a boolean value.
To signify the difference I have therefore chosen to compare the result of
the former call explicitly against 0.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5799/
2013-09-03 14:44:02 +02:00
Grant Likely 8be137f266 Linux 3.11-rc7
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Merge tag 'v3.11-rc7' into devicetree/next

Linux 3.11-rc7
2013-08-28 20:18:13 +01:00
David Daney b8199546a4 MIPS: Discard .eh_frame sections in linker script.
Some toolchains (including Cavium OCTEON SDK) are emitting .eh_frame
sections by default.  Discard them as they are useless in the kernel.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5684/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:33:41 +02:00
David Daney 99cab4bb4f MIPS: OCTEON: Select ARCH_REQUIRE_GPIOLIB
... and create asm/mach-cavium-octeon/gpio.h so that things continue
to build.

This allows us to use the existing I2C connected GPIO expanders.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-gpio@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5632/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:33:40 +02:00
David Daney 36b0f79b30 MIPS: Remove unreachable break statements from cp1emu.c
There were many cases of:

   return something;
   break;

All those break statements are unreachable and thus redundant.

Signed-off-by: David Daney <david.daney@cavium.com>
Reviewed-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:33:40 +02:00
Ralf Baechle 43d3093903 MIPS: BMIPS: Fix compilation for BMIPS5000
Commit 02b849f761 ("MIPS: Get rid of the
use of .macro in C code.") replaced the macro usage but missed
the accessors in bmips.h, causing the following build error:

  CC      arch/mips/kernel/smp-bmips.o
{standard input}: Assembler messages:
{standard input}:951: Error: Unrecognized opcode `_ssnop'
{standard input}:952: Error: Unrecognized opcode `_ssnop'
(...)
make[6]: *** [arch/mips/kernel/smp-bmips.o] Error 1

Fix by rewriting the inline assembler using existing inline functions.
The generated code should stay unchanged.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/5644/
Reviewed-by: Jonas Gorski <jogo@openwrt.org>
2013-08-26 15:31:55 +02:00
Aaro Koskinen d8b74276f5 MIPS: cavium-octeon: fix I/O space setup on non-PCI systems
Fix I/O space setup, so that on non-PCI systems using inb()/outb()
won't crash the system. Some drivers may try to probe I/O space and for
that purpose we can just allocate some normal memory initially. Drivers
trying to reserve a region will fail early as we set the size to 0. If
a real I/O space is present, the PCI/PCIe support code will re-adjust
the values accordingly.

Tested with EdgeRouter Lite by enabling CONFIG_SERIO_I8042 that caused
the originally reported crash.

Reported-by: Faidon Liambotis <paravoid@debian.org>
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5626/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:54 +02:00
Alexandru Juncu 83eefabf9b MIPS:Netlogic: Remove redundant value in operation.
Removed parameters checked twice in logical OR operation.
Suggested by coccinelle and manually verified.

Signed-off-by: Alexandru Juncu <alexj@rosedu.org>
Cc: jchandra@broadcom.com
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5627/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:54 +02:00
David Daney 62597c6081 MIPS: OCTEON: Set L1 cache parameters for OCTEON3 CPUs.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5638/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:53 +02:00
David Daney 4723b20a38 MIPS: Generate OCTEON3 TLB handlers with the same features as OCTEON2.
OCTEON2 need the same code.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5637/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:53 +02:00
David Daney 4122af0ab0 MIPS: Use r4k_wait for OCTEON3 CPUs.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5636/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:53 +02:00
David Daney af04bb8578 MIPS: Probe for new OCTEON CPU/SoC types.
Add probing for CNF71XX, CN78XX and CN70XX.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5635/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:53 +02:00
David Daney 71a8b7d86c MIPS: Add CPU identifiers for more OCTEON family members.
Needed to support new SOCs.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5634/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:52 +02:00
James Hogan cad3b62485 MIPS: use generic-y where possible
Use generic-y and remove headers in arch/mips/include/[uapi/]asm/Kbuild
where the header just includes or is identical to the corresponding
<asm-generic/*.h>.

We can't do the same for uapi/asm/kvm_para.h because it's presence is
explicitly checked in include/uapi/linux/Kbuild to decide whether to add
kvm_para.h to header-y.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Christoph Lameter <cl@linux-foundation.org>
Cc: Tejun Heo <tj@kernel.org>
Cc: Dave Jones <davej@redhat.com>
Cc: David Howells <dhowells@redhat.com>
Cc: David Sharp <dhsharp@google.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5581/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:52 +02:00
Tony Wu 774b6175f8 MIPS: tlbex: Guard tlbmiss_handler_setup_pgd
tlbmiss_handler_setup_pgd* are only referenced when
CONFIG_MIPS_PGD_C0_CONTEXT is defined.

Signed-off-by: Tony Wu <tung7970@gmail.com>
Cc: Jayachandran C. <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5601/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:31:52 +02:00
Kamal Dasu 5b167c123b MIPS: Fix get_user_page_fast() for mips with cache alias
get_user_pages_fast() is missing cache flushes for MIPS platforms with
cache aliases.  Filesystem failures observed with DirectIO operations due
to missing flush_anon_page() that use page coloring logic to work with
cache aliases. This fix falls through to take slow_irqon path that calls
get_user_pages() that has required logic for platforms where
cpu_has_dc_aliases is true.

[ralf@linux-mips.org: Explicity include <asm/cpu-features.h>.]

Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/5469/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26 15:26:48 +02:00
David Daney ea69f28ddf mips/kvm: Make kvm_locore.S 64-bit buildable/safe.
We need to use more of the Macros in asm.h to allow kvm_locore.S to
build in a 64-bit kernel.

For 32-bit there is no change in the generated object code.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-08-26 12:30:49 +03:00
David Daney bb48c2fc64 mips/kvm: Cleanup .push/.pop directives in kvm_locore.S
There are:
	.set	push
	.set	noreorder
	.set	noat
	 .
	 .
	 .
	.set	pop

Sequences all over the place in this file, but in some places the
final ".set pop" is erroneously converted to ".set push", so none of
these really do what they appear to.

Clean up the whole mess by moving ".set noreorder", ".set noat" to the
top, and get rid of everything else.

Generated object code is unchanged.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-08-26 12:30:39 +03:00
David Daney 2c07ebbd2c mips/kvm: Improve code formatting in arch/mips/kvm/kvm_locore.S
No code changes, just reflowing some comments and consistently using
tabs and spaces.  Object code is verified to be unchanged.

Signed-off-by: David Daney <david.daney@cavium.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Gleb Natapov <gleb@redhat.com>
2013-08-26 12:30:24 +03:00
Geert Uytterhoeven bf2206957c Kconfig: Remove hotplug enable hints in CONFIG_KEXEC help texts
commit 40b313608a ("Finally eradicate
CONFIG_HOTPLUG") removed remaining references to CONFIG_HOTPLUG, but missed
a few plain English references in the CONFIG_KEXEC help texts.

Remove them, too.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-22 12:35:01 -07:00
Kevin Hilman bfa664f21b ARM: tegra: core SoC enhancements for 3.12
This branch includes a number of enhancements to core SoC support for
 Tegra devices. The major new features are:
 
 * Adds a new CPU-power-gated cpuidle state for Tegra114.
 * Adds initial system suspend support for Tegra114, initially supporting
   just CPU-power-gating during suspend.
 * Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode
   both gates CPU power, and places the DRAM into self-refresh mode.
 * A new DT-driven PCIe driver to Tegra20/30. The driver is also moved
   from arch/arm/mach-tegra/ to drivers/pci/host/.
 
 The PCIe driver work depends on the following tag from Thomas Petazzoni:
 git://git.infradead.org/linux-mvebu.git mis-3.12.2
 ... which is merged into the middle of this pull request.
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Merge tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc

From: Stephen Warren:
ARM: tegra: core SoC enhancements for 3.12

This branch includes a number of enhancements to core SoC support for
Tegra devices. The major new features are:

* Adds a new CPU-power-gated cpuidle state for Tegra114.
* Adds initial system suspend support for Tegra114, initially supporting
  just CPU-power-gating during suspend.
* Adds "LP1" suspend mode support for all of Tegra20/30/114. This mode
  both gates CPU power, and places the DRAM into self-refresh mode.
* A new DT-driven PCIe driver to Tegra20/30. The driver is also moved
  from arch/arm/mach-tegra/ to drivers/pci/host/.

The PCIe driver work depends on the following tag from Thomas Petazzoni:
git://git.infradead.org/linux-mvebu.git mis-3.12.2
... which is merged into the middle of this pull request.

* tag 'tegra-for-3.12-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (33 commits)
  ARM: tegra: disable LP2 cpuidle state if PCIe is enabled
  MAINTAINERS: Add myself as Tegra PCIe maintainer
  PCI: tegra: set up PADS_REFCLK_CFG1
  PCI: tegra: Add Tegra 30 PCIe support
  PCI: tegra: Move PCIe driver to drivers/pci/host
  PCI: msi: add default MSI operations for !HAVE_GENERIC_HARDIRQS platforms
  ARM: tegra: add LP1 suspend support for Tegra114
  ARM: tegra: add LP1 suspend support for Tegra20
  ARM: tegra: add LP1 suspend support for Tegra30
  ARM: tegra: add common LP1 suspend support
  clk: tegra114: add LP1 suspend/resume support
  ARM: tegra: config the polarity of the request of sys clock
  ARM: tegra: add common resume handling code for LP1 resuming
  ARM: pci: add ->add_bus() and ->remove_bus() hooks to hw_pci
  of: pci: add registry of MSI chips
  PCI: Introduce new MSI chip infrastructure
  PCI: remove ARCH_SUPPORTS_MSI kconfig option
  PCI: use weak functions for MSI arch-specific functions
  ARM: tegra: unify Tegra's Kconfig a bit more
  ARM: tegra: remove the limitation that Tegra114 can't support suspend
  ...

Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-08-21 10:17:18 -07:00
David Daney c26d421987 MIPS: Handle OCTEON BBIT instructions in FPU emulator.
The branch emulation needs to handle the OCTEON BBIT instructions,
otherwise we get SIGILL instead of emulation.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5726/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-20 19:17:40 +02:00
Greg Kroah-Hartman 567b21e973 mips: convert vpe_class to use dev_groups
The dev_attrs field of struct class is going away soon, dev_groups
should be used instead.  This converts the MIPS vpe_class code to use
the correct field.

Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: John Crispin <blogic@openwrt.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-19 21:22:33 -07:00
Thomas Petazzoni ebd97be635 PCI: remove ARCH_SUPPORTS_MSI kconfig option
Now that we have weak versions for each of the PCI MSI architecture
functions, we can actually build the MSI support for all platforms,
regardless of whether they provide or not architecture-specific
versions of those functions. For this reason, the ARCH_SUPPORTS_MSI
hidden kconfig boolean becomes useless, and this patch gets rid of it.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tested-by: Daniel Price <daniel.price@gmail.com>
Tested-by: Thierry Reding <thierry.reding@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: linux390@de.ibm.com
Cc: linux-s390@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: x86@kernel.org
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: linux-ia64@vger.kernel.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: David S. Miller <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
Cc: Chris Metcalf <cmetcalf@tilera.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-08-12 15:26:48 +00:00
Thomas Petazzoni 4287d824f2 PCI: use weak functions for MSI arch-specific functions
Until now, the MSI architecture-specific functions could be overloaded
using a fairly complex set of #define and compile-time
conditionals. In order to prepare for the introduction of the msi_chip
infrastructure, it is desirable to switch all those functions to use
the 'weak' mechanism. This commit converts all the architectures that
were overidding those MSI functions to use the new strategy.

Note that we keep two separate, non-weak, functions
default_teardown_msi_irqs() and default_restore_msi_irqs() for the
default behavior of the arch_teardown_msi_irqs() and
arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
code.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Tested-by: Daniel Price <daniel.price@gmail.com>
Tested-by: Thierry Reding <thierry.reding@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: linux390@de.ibm.com
Cc: linux-s390@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: x86@kernel.org
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: linux-ia64@vger.kernel.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: David S. Miller <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
Cc: Chris Metcalf <cmetcalf@tilera.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-08-12 15:26:39 +00:00
Jonas Gorski e60665c50f MIPS: BCM63XX: export PSI size from nvram
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
Acked-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-05 18:58:55 +01:00
Florian Fainelli fcfa66de8a MIPS: BMIPS: fix hardware interrupt routing for boot CPU != 0
The hardware interrupt routing for boot CPU != 0 is wrong because it
will route all the hardware interrupts to TP0 which is not the one we
booted from. Fix this by properly checking which boot CPU we are booting
from and updating the right interrupt mask for the boot CPU. This fixes
booting on BCM3368 with bmips_smp_emabled = 0.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: blogic@openwrt.org
Cc: jogo@openwrt.org
Cc: cernekee@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/5650/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-05 13:35:18 +02:00
Ralf Baechle cf5b2d23a7 MIPS: oprofile: Fix BUG due to smp_processor_id() in preemptible code.
current_cpu_type() is not preemption-safe.
If CONFIG_PREEMPT is enabled then mipsxx_reg_setup() can be called from preemptible state.
Added get_cpu()/put_cpu() pair to make it preemption-safe.

This was found while testing oprofile with CONFIG_DEBUG_PREEMPT enable.

/usr/zntestsuite # opcontrol --init
/usr/zntestsuite # opcontrol --setup --event=L2_CACHE_ACCESSES:500 --event=L2_CACHE_MISSES:500 --no-vmlinux
/usr/zntestsuite # opcontrol --start
Using 2.6+ OProfile kernel interface.
BUG: using smp_processor_id() in preemptible [00000000] code: oprofiled/1362
caller is mipsxx_reg_setup+0x11c/0x164
CPU: 0 PID: 1362 Comm: oprofiled Not tainted 3.10.4 #18
Stack : 00000006 70757465 00000000 00000000 00000000 00000000 80b173f6 00000037
          80b10000 00000000 80b21614 88f5a220 00000000 00000000 00000000 00000000
          00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
          00000000 00000000 00000000 89c49c00 89c49c2c 80721254 807b7927 8012c1d0
          80b10000 80721254 00000000 00000552 88f5a220 80b1335c 807b78e6 89c49ba8
          ...
Call Trace:
[<801099a4>] show_stack+0x64/0x7c
[<80665520>] dump_stack+0x20/0x2c
[<803a2250>] debug_smp_processor_id+0xe0/0xf0
[<8052df24>] mipsxx_reg_setup+0x11c/0x164
[<8052cd70>] op_mips_setup+0x24/0x4c
[<80529cfc>] oprofile_setup+0x5c/0x12c
[<8052b9f8>] event_buffer_open+0x78/0xf8
[<801c3150>] do_dentry_open.isra.15+0x2b8/0x3b0
[<801c3270>] finish_open+0x28/0x4c
[<801d49b8>] do_last.isra.41+0x2cc/0xd00
[<801d54a0>] path_openat+0xb4/0x4c4
[<801d5c44>] do_filp_open+0x3c/0xac
[<801c4744>] do_sys_open+0x110/0x1f4
[<8010f47c>] stack_done+0x20/0x44

Bug reported and original patch by Jerin Jacob <jerinjacobk@gmail.com>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Acked-by: Jerin Jacob <jerinjacobk@gmail.com>
2013-08-05 13:34:22 +02:00
Markos Chandras 3ac3bcb962 MIPS: PNX833x: PNX8335_PCI_ETHERNET_INT depends on CONFIG_SOC_PNX8335
The PNX8335_PCI_ETHERNET_INT macro is defined in
arch/mips/include/asm/mach-pnx833x/irq-mapping.h
only if CONFIG_SOC_PNX8335 is selected.

Fixes the following randconfig problem:
arch/mips/pnx833x/common/platform.c:210:12:
error: 'PNX8335_PIC_ETHERNET_INT' undeclared here
(not in a function)

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5585/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-05 13:34:22 +02:00
Greg Kroah-Hartman 5ac1ccb70a Merge 3.11-rc4 into tty-next
We want the tty fixes in here as well.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-08-05 05:41:03 +08:00
Alexander Shiyan 90efa75f7a serial: sccnxp: Using CLK API for getting UART clock
This patch removes "frequency" parameter from SCCNXP platform_data
and uses CLK API for getting clock. If CLK ommited, default IC
frequency will be used instead.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-07-31 18:08:01 -07:00
Florian Fainelli ff5fadaff3 MIPS: BMIPS: fix slave CPU booting when physical CPU is not 0
The current BMIPS SMP code assumes that the slave CPU is physical and
logical CPU 1, but on some systems such as BCM3368, the slave CPU is
physical CPU0. Fix the code to read the physical CPU (thread ID) we are
running this code on, and adjust the relocation vector address based on
it. This allows bringing up the second CPU on BCM3368 for instance.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: blogic@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5621/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-30 18:54:29 +02:00
Florian Fainelli c4091d3fbb MIPS: BMIPS: do not change interrupt routing depending on boot CPU
Commit 4df715aa ("MIPS: BMIPS: support booting from physical CPU other
than 0") changed the interupt routing when we are booting from physical
CPU 0, but the settings are actually correct if we are booting from
physical CPU 0 or CPU 1. Revert that specific change.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Cc: blogic@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/5622/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-30 18:54:09 +02:00
Markos Chandras c055629b27 MIPS: powertv: Fix arguments for free_reserved_area()
Commit 6e7582bf35
"MIPS: PowerTV: use free_reserved_area() to simplify code"

merged in 3.11-rc1, broke the build for the powertv defconfig with
the following build error:

arch/mips/powertv/asic/asic_devices.c: In function 'platform_release_memory':
arch/mips/powertv/asic/asic_devices.c:533:7: error: passing argument 1 of
'free_reserved_area' makes pointer from integer without a cast [-Werror]

The free_reserved_area() function expects a void * pointer for the start
address and a void * pointer for the end one.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5624/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-30 18:50:31 +02:00
Markos Chandras 314878d246 MIPS: Set default CPU type for BCM47XX platforms
If neither BCM47XX_SSD nor BCM47XX_BCMA is selected, then no
CPU type is available leading to build problems. We fix
this problem by using MIPS32r1 as the default CPU type for
the BCM47XX platform.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5618/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-30 18:48:50 +02:00
Maciej W. Rozycki 1d3e2d79a7 MIPS: uapi/asm/siginfo.h: Fix GCC 4.1.2 compilation
It wasn't until GCC 4.3 I believe that the __SIZEOF_*__ predefined macros
were added.  The change below switches <uapi/asm/siginfo.h> to the
_MIPS_SZLONG macro so that compilation with e.g. GCC 4.1.2 succeeds.
This is a user API header so I think this is even more important, for
older userland support.  The change adds an unsuccessful default too, to
catch any compiler configuration oddities.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5630/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-30 18:40:40 +02:00
Steven J. Hill 7ad18dd03c MIPS: Fix multiple definitions of UNCAC_BASE.
Fix build error below:

arch/mips/include/asm/mach-generic/spaces.h:29:0: warning:
"UNCAC_BASE" redefined [enabled by default]
In file included from arch/mips/include/asm/addrspace.h:13:0,
                 from arch/mips/include/asm/barrier.h:11,
                 from arch/mips/include/asm/bitops.h:18,
                 from include/linux/bitops.h:22,
                 from include/linux/kernel.h:10,
                 from include/asm-generic/bug.h:13,
                 from arch/mips/include/asm/bug.h:41,
                 from include/linux/bug.h:4,
                 from include/linux/page-flags.h:9,
                 from kernel/bounds.c:9:
arch/mips/include/asm/mach-ar7/spaces.h:20:0: note: this is the
location of the previous definition

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5583/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-30 18:40:40 +02:00
Yinghai Lu 928bea9648 PCI: Delay enabling bridges until they're needed
We currently enable PCI bridges after scanning a bus and assigning
resources.  This is often done in arch code.

This patch changes this so we don't enable a bridge until necessary, i.e.,
until we enable a PCI device behind the bridge.  We do this in the generic
pci_enable_device() path, so this also removes the arch-specific code to
enable bridges.

[bhelgaas: changelog]
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2013-07-25 12:35:03 -06:00
Santosh Shilimkar 374d5c9964 of: Specify initrd location using 64-bit
On some PAE architectures, the entire range of physical memory could reside
outside the 32-bit limit.  These systems need the ability to specify the
initrd location using 64-bit numbers.

This patch globally modifies the early_init_dt_setup_initrd_arch() function to
use 64-bit numbers instead of the current unsigned long.

There has been quite a bit of debate about whether to use u64 or phys_addr_t.
It was concluded to stick to u64 to be consistent with rest of the device
tree code. As summarized by Geert, "The address to load the initrd is decided
by the bootloader/user and set at that point later in time. The dtb should not
be tied to the kernel you are booting"

More details on the discussion can be found here:
https://lkml.org/lkml/2013/6/20/690
https://lkml.org/lkml/2012/9/13/544

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Vineet Gupta <vgupta@synopsys.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Grant Likely <grant.likely@linaro.org>
2013-07-24 11:10:01 +01:00
Linus Torvalds 1b05018045 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS fixes from Ralf Baechle:
 "MIPS fixes for 3.11.  Half of then is for Netlogic the remainder
  touches things across arch/mips.

  Nothing really dramatic and by rc1 standards MIPS will be in fairly
  good shape with this applied.  Tested by building all MIPS defconfigs
  of which with this pull request four platforms won't build.  And yes,
  it boots also on my favorite test systems"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: kvm: Kconfig: Drop HAVE_KVM dependency from VIRTUALIZATION
  MIPS: Octeon: Fix DT pruning bug with pip ports
  MIPS: KVM: Mark KVM_GUEST (T&E KVM) as BROKEN_ON_SMP
  MIPS: tlbex: fix broken build in v3.11-rc1
  MIPS: Netlogic: Add XLP PIC irqdomain
  MIPS: Netlogic: Fix USB block's coherent DMA mask
  MIPS: tlbex: Fix typo in r3000 tlb store handler
  MIPS: BMIPS: Fix thinko to release slave TP from reset
  MIPS: Delete dead invocation of exception_exit().
2013-07-19 15:10:01 -07:00
Markos Chandras f1b7001903 MIPS: kvm: Kconfig: Drop HAVE_KVM dependency from VIRTUALIZATION
Virtualization does not always need KVM capabilities so drop the
dependency. The KVM symbol already depends on HAVE_KVM.

Fixes the following problem on a randconfig:
warning: (REMOTEPROC && RPMSG) selects VIRTUALIZATION which has unmet direct
dependencies (HAVE_KVM)
warning: (REMOTEPROC && RPMSG) selects VIRTUALIZATION which has unmet
direct dependencies (HAVE_KVM)

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Acked-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5443/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-19 12:45:57 +02:00
Faidon Liambotis ab2bb148c5 MIPS: Octeon: Fix DT pruning bug with pip ports
During the pruning of the device tree octeon_fdt_pip_iface() is called
for each PIP interface and every port up to the port count is removed
from the device tree. However, the count was set to the return value of
cvmx_helper_interface_enumerate() which doesn't actually return the
count but just returns zero on success. This effectively removed *all*
ports from the tree.

Use cvmx_helper_ports_on_interface() instead to fix this. This
successfully restores the 3 ports of my ERLite-3 and fixes the "kernel
assigns random MAC addresses" issue.

Signed-off-by: Faidon Liambotis <paravoid@debian.org>
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5587/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-19 11:04:54 +02:00
James Hogan f2a5b1d78c MIPS: KVM: Mark KVM_GUEST (T&E KVM) as BROKEN_ON_SMP
Make KVM_GUEST depend on BROKEN_ON_SMP so that it cannot be enabled with
SMP.

SMP kernels use ll/sc instructions for an atomic section in the tlb fill
handler, with a tlbp instruction contained in the middle. This cannot be
emulated with trap & emulate KVM because the tlbp instruction traps and
the eret to return to the guest code clears the LLbit which makes the sc
instruction always fail.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Sanjay Lal <sanjayl@kymasys.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/5588/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-19 10:41:17 +02:00
Aaro Koskinen 38a997a70e MIPS: tlbex: fix broken build in v3.11-rc1
Commit 6ba045f9fb (MIPS: Move generated code
to .text for microMIPS) deleted tlbmiss_handler_setup_pgd_array, but some
references were not converted. Fix that to enable building a MIPS kernel.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Jayachandran C. <jchandra@broadcom.com>
Acked-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5589/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-19 10:36:10 +02:00
Jayachandran C 628f0650ea MIPS: Netlogic: Add XLP PIC irqdomain
Add a legacy irq domain for the XLP PIC interrupts. This will be used
when interrupts are assigned from the device tree. This change is required
after commit c5cdc67 "irqdomain: Remove temporary MIPS workaround code".

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Cc: Jayachandran C <jchandra@broadcom.com>
Patchwork: https://patchwork.linux-mips.org/patch/5597/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-19 10:24:12 +02:00
Ganesan Ramalingam 35ac7840bc MIPS: Netlogic: Fix USB block's coherent DMA mask
The on-chip USB controller on Netlogic XLP does not suppport
DMA beyond 32-bit physical address. Set the coherent_dma_mask
of the USB in its PCI fixup to support this.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C. <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5596/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-19 10:23:14 +02:00
Tony Wu afc813ae6d MIPS: tlbex: Fix typo in r3000 tlb store handler
commit 6ba045f (MIPS: Move generated code to .text for microMIPS)
causes a panic at boot. The handler builder should test against
handle_tlbs_end, not handle_tlbs.

Signed-off-by: Tony Wu <tung7970@gmail.com>
Acked-by: Jayachandran C. <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5600/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-19 10:18:07 +02:00
Florian Fainelli 976f39b139 MIPS: BMIPS: Fix thinko to release slave TP from reset
Commit 4df715aa ["MIPS: BMIPS: support booting from physical CPU other
than 0"] introduced a thinko which will prevents slave CPUs from being
released from reset on systems where we boot from TP0. The problem is
that we are checking whether the slave CPU logical CPU map is 0, which
is never true for systems booting from TP0, so we do not release the
slave TP from reset and we are just stuck. Fix this by properly checking
that the CPU we intend to boot really is the physical slave CPU (logical
and physical value being 1).

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: blogic@openwrt.org
Cc: jogo@openwrt.org
Cc: cernekee@gmail.com
Cc: Florian Fainelli <florian@openwrt.org>
Patchwork: https://patchwork.linux-mips.org/patch/5598/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-19 10:09:59 +02:00
Takuya Yoshikawa e59dbe09f8 KVM: Introduce kvm_arch_memslots_updated()
This is called right after the memslots is updated, i.e. when the result
of update_memslots() gets installed in install_new_memslots().  Since
the memslots needs to be updated twice when we delete or move a memslot,
kvm_arch_commit_memory_region() does not correspond to this exactly.

In the following patch, x86 will use this new API to check if the mmio
generation has reached its maximum value, in which case mmio sptes need
to be flushed out.

Signed-off-by: Takuya Yoshikawa <yoshikawa_takuya_b1@lab.ntt.co.jp>
Acked-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Xiao Guangrong <xiaoguangrong@linux.vnet.ibm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2013-07-18 12:29:25 +02:00
Ralf Baechle a47bde9b7c MIPS: Delete dead invocation of exception_exit().
panic() doesn't return so this call was useless.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reported-by: Alexander Sverdlin <alexander.sverdlin@nsn.com>
2013-07-17 17:28:48 +02:00
Paul Gortmaker 078a55fc82 MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.

The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files.  MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.

[1] https://lkml.org/lkml/2013/5/20/589

[ralf@linux-mips.org: Folded in Paul's followup fix.]

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-14 19:36:51 -04:00
Linus Torvalds be9c6d9169 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking fixes from David Miller:
 "Just a bunch of small fixes and tidy ups:

   1) Finish the "busy_poll" renames, from Eliezer Tamir.

   2) Fix RCU stalls in IFB driver, from Ding Tianhong.

   3) Linearize buffers properly in tun/macvtap zerocopy code.

   4) Don't crash on rmmod in vxlan, from Pravin B Shelar.

   5) Spinlock used before init in alx driver, from Maarten Lankhorst.

   6) A sparse warning fix in bnx2x broke TSO checksums, fix from Dmitry
      Kravkov.

   7) Dummy and ifb driver load failure paths can oops, fixes from Tan
      Xiaojun and Ding Tianhong.

   8) Correct MTU calculations in IP tunnels, from Alexander Duyck.

   9) Account all TCP retransmits in SNMP stats properly, from Yuchung
      Cheng.

  10) atl1e and via-rhine do not handle DMA mapping failures properly,
      from Neil Horman.

  11) Various equal-cost multipath route fixes in ipv6 from Hannes
      Frederic Sowa"

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (36 commits)
  ipv6: only static routes qualify for equal cost multipathing
  via-rhine: fix dma mapping errors
  atl1e: fix dma mapping warnings
  tcp: account all retransmit failures
  usb/net/r815x: fix cast to restricted __le32
  usb/net/r8152: fix integer overflow in expression
  net: access page->private by using page_private
  net: strict_strtoul is obsolete, use kstrtoul instead
  drivers/net/ieee802154: don't use devm_pinctrl_get_select_default() in probe
  drivers/net/ethernet/cadence: don't use devm_pinctrl_get_select_default() in probe
  drivers/net/can/c_can: don't use devm_pinctrl_get_select_default() in probe
  net/usb: add relative mii functions for r815x
  net/tipc: use %*phC to dump small buffers in hex form
  qlcnic: Adding Maintainers.
  gre: Fix MTU sizing check for gretap tunnels
  pkt_sched: sch_qfq: remove forward declaration of qfq_update_agg_ts
  pkt_sched: sch_qfq: improve efficiency of make_eligible
  gso: Update tunnel segmentation to support Tx checksum offload
  inet: fix spacing in assignment
  ifb: fix oops when loading the ifb failed
  ...
2013-07-13 17:42:22 -07:00
Linus Torvalds d144746478 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "MIPS updates:

   - All the things that didn't make 3.10.
   - Removes the Windriver PPMC platform.  Nobody will miss it.
   - Remove a workaround from kernel/irq/irqdomain.c which was there
     exclusivly for MIPS.  Patch by Grant Likely.
   - More small improvments for the SEAD 3 platform
   - Improvments on the BMIPS / SMP support for the BCM63xx series.
   - Various cleanups of dead leftovers.
   - Platform support for the Cavium Octeon-based EdgeRouter Lite.

  Two large KVM patchsets didn't make it for this pull request because
  their respective authors are vacationing"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (124 commits)
  MIPS: Kconfig: Add missing MODULES dependency to VPE_LOADER
  MIPS: BCM63xx: CLK: Add dummy clk_{set,round}_rate() functions
  MIPS: SEAD3: Disable L2 cache on SEAD-3.
  MIPS: BCM63xx: Enable second core SMP on BCM6328 if available
  MIPS: BCM63xx: Add SMP support to prom.c
  MIPS: define write{b,w,l,q}_relaxed
  MIPS: Expose missing pci_io{map,unmap} declarations
  MIPS: Malta: Update GCMP detection.
  Revert "MIPS: make CAC_ADDR and UNCAC_ADDR account for PHYS_OFFSET"
  MIPS: APSP: Remove <asm/kspd.h>
  SSB: Kconfig: Amend SSB_EMBEDDED dependencies
  MIPS: microMIPS: Fix improper definition of ISA exception bit.
  MIPS: Don't try to decode microMIPS branch instructions where they cannot exist.
  MIPS: Declare emulate_load_store_microMIPS as a static function.
  MIPS: Fix typos and cleanup comment
  MIPS: Cleanup indentation and whitespace
  MIPS: BMIPS: support booting from physical CPU other than 0
  MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPS
  MIPS: GIC: Fix gic_set_affinity infinite loop
  MIPS: Don't save/restore OCTEON wide multiplier state on syscalls.
  ...
2013-07-13 14:52:21 -07:00
Ralf Baechle 6ac5310e64 Merge branch '3.10-fixes' into mips-for-linux-next
This that should have been fixed but weren't, way to much, intrusive
and late.
2013-07-12 18:11:43 +02:00
Michel Lespinasse 98d1e64f95 mm: remove free_area_cache
Since all architectures have been converted to use vm_unmapped_area(),
there is no remaining use for the free_area_cache.

Signed-off-by: Michel Lespinasse <walken@google.com>
Acked-by: Rik van Riel <riel@redhat.com>
Cc: "James E.J. Bottomley" <jejb@parisc-linux.org>
Cc: "Luck, Tony" <tony.luck@intel.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: David Howells <dhowells@redhat.com>
Cc: Helge Deller <deller@gmx.de>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-10 18:11:34 -07:00