Commit Graph

8 Commits

Author SHA1 Message Date
Leo Liu 2fc5703abd drm/radeon: check VCE relocation buffer range v3
v2 (chk): fix image size storage
v3 (chk): fix UV size calculation

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-20 14:40:46 +02:00
Leo Liu 428beddd02 drm/radeon: add Mullins VCE support
VCE 2.0 just like the other CIK parts.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-05-06 12:20:05 +02:00
Christoph Jaeger 681941c179 drm/radeon: fix VCE fence command
Due to a type mismatch that causes an implicit type conversion, the
upper 32 bits of the GPU address have been zeroed out when adding to the
command buffer.

Picked up by Coverity - CID 1198624.

Signed-off-by: Christoph Jaeger <christophjaeger@linux.com>
2014-04-17 13:59:55 +02:00
Christian König df0af4403a drm/radeon: remove struct radeon_bo_list
Just move all fields into radeon_cs_reloc, removing unused/duplicated fields.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2014-03-04 14:34:34 +01:00
Christian König b03b4e4b6e drm/radeon: fix VCE suspend/resume
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-03-03 11:03:32 +01:00
Alex Deucher 03afe6f648 drm/radeon/dpm: enable dynamic vce state switching v2
enable vce states when vce is active.  When vce is active,
it adjusts the currently selected state (performance, battery,
uvd, etc.)

v2: add code comments

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-18 16:11:41 +01:00
Christian König 98ccc291ff drm/radeon: add VCE version parsing and checking
Also make the result available to userspace.

Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-18 16:11:26 +01:00
Christian König d93f79376f drm/radeon: initial VCE support v4
Only VCE 2.0 support so far.

v2: squashing multiple patches into this one
v3: add IRQ support for CIK, major cleanups,
    basic code documentation
v4: remove HAINAN from chipset list

Signed-off-by: Christian König <christian.koenig@amd.com>
2014-02-18 16:11:22 +01:00