2 Commits

Author	SHA1	Message	Date
David S. Miller	f78eae2e6f	[SPARC64]: Proper multi-core scheduling support. ... The scheduling domain hierarchy is: all cpus --> cpus that share an instruction cache --> cpus that share an integer execution unit Signed-off-by: David S. Miller <davem@davemloft.net>	2007-06-04 21:50:00 -07:00
David S. Miller	5cbc307373	[SPARC64]: Use machine description and OBP properly for cpu probing. ... Signed-off-by: David S. Miller <davem@davemloft.net>	2007-05-29 02:49:41 -07:00