omapdss.h included platform_device.h and atomic.h, neither of which is
needed by omapdss.h. Remove those includes from omapdss.h, and fix the
affected .c files which did not include platform_device.h even though
they should.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Introduce DSI2 PLL clock sources needed by LCD2 channel and DSI2 Protocol
engine and DISPC Functional clock. Do the following:
- Modify dss_get_dsi_clk_source() and dss_select_dsi_clk_source() to take the
dsi module number as an argument.
- Create debugfs files for dsi2, split the corresponding debugfs functions.
- Allow DPI to use these new clock sources.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
The DSI interface is represented as a platform device, using the DSI platform
driver(dsi.c). The current DSI driver design is capable of running only one
instance of a DSI device. On OMAP4, there are 2 very similar DSI modules which
can be represented as instances of "omapdss_dsi" platform device.
Add member "module" in "dssdev.phy.dsi" that tells us which DSI module's lanes
the panel is connected to. Modify dsi.c functions to take the device's
platform_device struct pointer, provide functions dsi_get_dsidev_from_dssdev()
and dsi_get_dsidev_from_id() take the panel's omap_dss_device and module number
respectively, and return the platform_device pointer. Currently, the dsi struct
is declared globally and is accessed when dsi data is needed. The new pdev
argument will be used later to provide the platform device's dsi related data.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
DSS_IRQSTATUS register is available only on OMAP3, and reading it in
dss_dump_registers() on OMAP4 seems to cause a crash.
The register is not used for anything, and displaying its value is of no
use, so let's just remove it altogether.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
OMAP4 has clocks set up in a bit interesting way, causing, for example,
the DSS's "ick" to be called "dss_fck".
This patch changes the debugfs output to show both the DSS's name for
the clock (ie. basically the clock alias), and the real name from the
clock struct.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Change enum dss_clk_source to omap_dss_clock_source and move it to
'plat/display.h'. Change the enum members to attach "OMAP_" in the beginning.
These changes are done in order to specify the clock sources for DSS in the
board file.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
For some unknown reason we may get SYNC_LOST errors from the display
subsystem at initialization time if we don't sleep before resetting the
DSS. See the source (dss.c) for more comments.
However, 50ms is quite long time to sleep, and with some configurations
the SYNC_LOST may never happen, so this patch creates a Kconfig option
to disable the sleep.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
dss.lcd_clk_source is set to the default value DSS_CLK_SRC_FCK at dss_init.
For OMAP2 and OMAP3, the dss.lcd_clk_source should always be the same as
dss.dispc_clk_source. The function dss_get_lcd_clk_source() always returns the
default value DSS_CLK_SRC_FCK for OMAP2/3. This leads to wrong clock dumps when
dispc_clk_source is not DSS_CLK_SRC_FCK.
Correct this function to always return dss.dispc_clk_source for OMAP2/3.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
arch/arm/plat-omap/include/plat/display.h is an include for the OMAP DSS
driver. A more logical place for it is in include/video.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Add dss.dpll4_m4_ck (DSS FCLK) initialization for OMAP4. This is used
to compute the pixel clock for DPI interface and also to reconfigure
the DSS FCLK to the desired rate, corresponding to the rate computed
for pixel clock.
Adding these cpu_is_44xx() checks are meant to be temporary, until a
cleaner implementation to manage these checks are added. Currently this
is needed to get DVI display running on OMAP4 PandaBoard
Signed-off-by: Raghuveer Murthy <raghuveer.murthy@ti.com>
[tomi.valkeinen@ti.com: minor changes due to conflicts]
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
OMAP2 does not have dpll4_m4_ck source clock for dss functional clock,
but later OMAPs do. Currently we check for cpu type in multiple places
to find out if dpll4_m4_ck is available.
This patch cleans up dss.c by using the fact that dss.dpll4_m4_ck
pointer is NULL on OMAP2. This allows us to remove many of the cpu
checks.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Adding function to select between HDMI or VENC clock source.
Signed-off-by: Mythri P K <mythripk@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Create 2 functions dss_feat_get_param_min() and dss_feat_get_param_max() which
return the minimum and maximum value of a parameter. Introduce a enum in
dss_features called dss_range_param which contains parameters whose ranges we
are interested in.
Replace this with dss_feat_get_max_dss_fck() which is specific to the parameter
DSS_FCK.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
The structures dss_reg_field and dss_clk_source_name have enum members which
specify the register field and the clock source respectively. These members are
not used to choose the correct result in the corresponding feature functions.
Remove these members and change the features array declaration to incorporate
these enums.
The structure dss_clk_source_name without the enum member is just a pointer to
an string. Remove the structure and use a character pointer directly.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
On OMAP3, the pixel clock for the LCD manager was derived through DISPC_FCLK as:
Lcd Pixel clock = DISPC_FCLK / lcd / pcd
Where lcd and pcd are divisors in the DISPC_DIVISOR register.
On OMAP4, the pixel clocks for LCD1 and LCD2 managers are derived from 2 new
clocks named LCD1_CLK and LCD2_CLK. The pixel clocks are calculated as:
Lcd_o Pixel clock = LCDo_CLK / lcdo /pcdo, o = 1, 2
Where lcdo and pcdo registers are divisors in DISPC_DIVISORo registers.
LCD1_CLK and LCD2_CLK can have DSS_FCLK, and the M4 divider clocks of DSI1 PLL
and DSI2 PLL as clock sources respectively. Introduce functions to select and
get the clock source for these new clocks. Modify DISPC functions get the
correct lck and pck rates based on the clock source of these clocks. Since
OMAP2/3 don't have these clocks, force OMAP2/3 to always have the LCD_CLK source
as DSS_CLK_SRC_FCK by introducing a dss feature.
Introduce clock source names for OMAP4 and some register field changes in
DSS_CTRL on OMAP4.
Currently, LCD2_CLK can only have DSS_FCLK as its clock source as DSI2 PLL
functionality hasn't been introduced yet. BUG for now if DSI2 PLL is selected as
clock.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Clean up some of the DSS functions which select/get clock sources, use switch
to select the clock source members since more clock sources will be introduced
later on.
Remove the use of macro CONFIG_OMAP2_DSS_DSI in dispc_fclk_rate, use a dummy
inline for function for dsi_get_pll_hsdiv_dispc_rate() instead for code clarity.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
On omap4 the registers may not be accessible right after enabling the
clocks. At some point this will be handled by pm_runtime, but, for the
time begin, adding a small delay after clk_enable() should make things
work.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
DPI and SDI are different from the other interfaces as they are not
hwmods and there is not platform driver for them. They could be said to
be a part of DSS or DISPC modules, although it's not a clear definition.
This patch moves DPI and SDI initialization into DSS platform driver,
making the code more consistent: omap_dss_probe() only initializes
platform drivers now.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
FB_OMAP_BOOTLOADER_INIT does not work, and it was only partially
implemented for SDI.
This patch removes support for FB_OMAP_BOOTLOADER_INIT to clean up the
code and to remove any assumptions that FB_OMAP_BOOTLOADER_INIT would
work.
Proper implementation is much more complex, requiring early boot time
register and clock handling to keep the DSS running.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
DSI PLL output clock names have been made more generic. The clock name
describes what the source of the clock and what clock is used for. Some of
DSI PLL parameters like dividers and DSI PLL source have also been made more
generic.
dsi1_pll_fclk and dsi2_pll_fclk have been changed as dsi_pll_hsdiv_dispc_clk
and dsi_pll_hsdiv_dsi_clk respectively. Also, the hsdividers are now named
regm_dispc and regm_dsi instead of regm3 and regm4.
Functions and macros named on the basis of these clock names have also been
made generic.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Clock source names vary across OMAP2/3 and OMAP4, the clock source enum
names have been made generic in the driver, but for purposes of debugging
and dumping clock sources, it is better to preserve the actual TRM name of
the clock.
Introduce a dss feature function 'dss_feat_get_clk_source_name()' which
returns a string with the TRM clock name for the current OMAP in use. The OMAP
specific name is printed along the generic name within brackets.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
The enum members of 'dss_clk_source' have clock source names specific to
OMAP2/3. Change the names to more generic terms such that they now describe
where the clocks come from and what they are used for.
Also, change the enum member names to have "DSS_CLK_SRC" instead of "DSS_SRC"
for more clarity.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
The maximum supported frequency for DSS has increased from 173 to 186 Mhz on
OMAP4.
Introduce a dss feature function to get the max_fck to replace DISPC_MAX_FCK
macro.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
hwmod databases provide information about which optional clocks are available
for a given platform. This is available via a function pointer opt_clock_enable
in pdata.
Use this information during get/enable/disable/put of clocks.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Only OMAP 3430 hardware has SDI support. The availability of SDI HW can
be found out by checking if the LCD channel supports SDI displays.
This patch checks for SDI HW support before accessing SDI registers,
which fixes a crash on OMAP4 when SDI SW support is compiled in.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Currently, the core DSS platform device requests for an irq line for OMAP2 and
OMAP3. Make DISPC and DSI platform devices request for a shared IRQ line.
On OMAP3, the logical OR of DSI and DISPC interrupt lines goes to the MPU. There
is a register DSS_IRQSTATUS which tells if the interrupt came from DISPC or DSI.
On OMAP2, there is no DSI, only DISPC interrupts goto the MPU. There is no
DSS_IRQSTATUS register.
Hence, it makes more sense to have separate irq handlers corresponding to the
DSS sub modules instead of having a common handler.
Since on OMAP3 the logical OR of the lines goes to MPU, the irq line is shared
among the IRQ handlers.
The hwmod irq info has been removed for DSS to DISPC and DSI for OMAP2 and OMAP3
hwmod databases. The Probes of DISPC and DSI now request for irq handlers.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
The dss struct in dss.c has omap2/3 specific clock names. Making them generic,
to increase readability and extendability.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
enum dss_clock structure is replaced with generic names that
could be used across OMAP2420, 2430, 3xxx, 44xx platforms.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Currently, clock database has <dev, clock-name> tuples for DSS2. Because of
this, the clock names are different across different OMAP platforms.
This patch aligns the DSS2 clock names and roles across OMAP 2420, 2430, 3xxx,
44xx platforms in the clock databases, hwmod databases for opt-clocks, and DSS
clock handling.
This ensures that clk_get/put/enable/disable APIs in DSS can use uniform role
names.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
DSS IRQ number can be obtained from platform_get_irq(). This API in turn
picks the right IRQ number belonging to HW IP from the hwmod database.
So hardcoding of IRQ number could be removed.
This IRQ is stored in dss_irq as part of dss structure, and freed it in
dss_exit().
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
DSS, DISPC, DSI, RFBI, VENC baseaddr can be obtained from platform_get_resource().
This API in turn picks the right silicon baseaddr from the hwmod database.
So hardcoding of base addr could be removed.
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
All clock management is moved to dss platform driver. clk_get/put APIs use
dss device instead of core platform device.
Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So the device name is changed from omapdss to omapdss_dss in 2420, 2430,
3xxx clock database files. Now the core driver "omapdss" only takes care
of panel registration with the custom bus.
core driver also uses the clk_enable() / clk_disable() APIs exposed by DSS for
clock management.
DSS driver would do clock management of clocks needed by DISPC, RFBI, DSI, VENC
TODO: The clock content would be adapted to omap_hwmod in a seperate series.
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Hwmod adaptation design requires each of the DSS HW IP to be a platform driver.
So a platform_driver of DSS is created and init exit methods are moved from core.c
to its driver probe,remove. pdev member has to be maintained by its own drivers.
DSS platform driver is registered from inside omap_dss_probe, in the order desired.
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
The TRM tells us to wait for the DSI PLL derived clocks to become
active before selecting them for use. I didn't actually have any issues
which this would fix but according to the TRM it seems to be the right
thing to do.
Signed-off-by: Ville Syrjälä <ville.syrjala@nokia.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
In DPLL4 M3, M4, M5 and M6 field width has been increased by 1 bit in 3630.
So the max divider value that can be achived will be 32 and not 16.
In 3630 the functional clock is x1 of DPLL4 and not x2. Hence multiplier 2
is removed.
Signed-off-by: Sudeep Basavaraj <sudeep.basavaraj@ti.com>
Signed-off-by: Mukund Mittal <mmittal@ti.com>
Signed-off-by: Kishore Y <kishore.y@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Clk sources were not initialized, leading to kernel crash, or possibly to
strange behaviour if DSI was compiled in.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
dss_select_clk_source() was rather confusing. Selecting the source with
enums is much clearer.
The clk source selection is also stored into memory, so that we know what
is the selected source, even when clocks are off. This is important during
setup, as we need to what clocks to turn on before the clocks are turned
on.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Loops checking for certain condition were rather inconsistent.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Reported-by: Juha Leppanen <juha_motorsportcom@luukku.com>
The core files of DSS2. DSS2 commits are split a bit artificially to
make the individual commits smaller, and DSS2 doesn't compile properly
without the rest of the core commits. This shouldn't be a problem, as no
configuration uses DSS2 yet.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Tomi Valkeinen