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Author SHA1 Message Date
Stephen Warren 964ea47572 clk: tegra: fix enum tegra114_clk to match binding 
A gap exists in the binding's clock ID definitions. Fix the clock driver
to be consistent. This allows pclk to be looked up through device tree
and prevents:

ERROR: could not get clock /pmc:pclk(0)

Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2013-04-04 17:17:14 -06:00
Peter De Schrijver c604283f52 clk: tegra: Remove forced clk_enable of uartd 
The UART driver enables the console uart clock, so we don't need to do that
anymore in this file.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2013-04-04 17:17:14 -06:00
Peter De Schrijver 2cb5efefd6 clk: tegra: Implement clocks for Tegra114 
Implement clocks for Tegra114.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2013-04-04 17:17:12 -06:00