Commit Graph

8364 Commits

Author SHA1 Message Date
Franck Bui-Huu 8ff7bc4808 [MIPS] setup.c: remove useless includes.
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:59 +01:00
Franck Bui-Huu d2043ca848 [MIPS] setup.c: move initrd code inside dedicated functions
NUMA specific code could rely on them too.

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:59 +01:00
Franck Bui-Huu b6f1f0dea1 [MIPS] setup.c: cleanup bootmem_init()
This function although doing simple thing is hard to follow. It's
mainly due to:

    - a lot of #ifdef
    - bad local names
    - redundant tests

So this patch try to address these issues. It also do not use
max_pfn global which is marked as an unused exported symbol.

As a bonus side, it's now really easy to see what part of the
code is for no-numa system.

There's also no point to make this function inline.

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:59 +01:00
Franck Bui-Huu b594318259 [MIPS] get_wchan(): remove uses of mfinfo[64]
This array was used to 'cache' some frame info about scheduler
functions to speed up get_wchan(). This array was 1Ko size and
was only used when CONFIG_KALLSYMS was set but declared for all
configs.

Rather than make the array statement conditional, this patches
removes this array and its uses. Indeed the common case doesn't
seem to use this array and get_wchan() is not a critical path
anyways.

It results in a smaller bss and a smaller/cleaner code:

   text    data     bss     dec     hex filename
2543808  254148  139296 2937252  2cd1a4 vmlinux-new-get-wchan
2544080  254148  143392 2941620  2ce2b4 vmlinux~old

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:58 +01:00
Franck Bui-Huu 29b376ff10 [MIPS] get_frame_info(): null function size means size is unknown
This patch adds 2 sanity checks.

The first one test that the start address of the function to analyze has been
set by the caller. If not return an error since nothing usefull can be done
without.

The second one checks that the function's size has been set. A null size can
happen if CONFIG_KALLSYMS is not set and it means that we don't know the size
of the function to analyze. In this case, we make it equal to 128 instructions
by default.

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:58 +01:00
Franck Bui-Huu 1fd6909802 [MIPS] unwind_stack(): return ra if an exception occured at the first instruction
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:58 +01:00
Ralf Baechle f83b854a1d [MIPS] Enable tmpfs for anything that possibly runs a full distribution.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:57 +01:00
Richard Sandiford 63415dbb54 [MIPS] The o32 fstatat syscall behaves differently on 32 and 64 bit kernels
While working on a glibc patch to support the fstatat() functions[1],
I noticed that the o32 implementation behaves differently on 32-bit and
64-bit kernels; the former provides a stat64 while the latter provides
a plain (o32) stat.  I think the former is what's intended, as there is
no separate fstatat64.  It's also what x86 does.

I think this is just a case of a compat too far.

[1] I've seen Khem's patch, but I don't think it's right.

Signed-off-by: Richard Sandiford <richard@codesourcery.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:55 +01:00
Ralf Baechle d48f1de2d8 [MIPS] Remove EV96100 as previously announced.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:55 +01:00
Ralf Baechle 432bef2a31 [MIPS] Replace BARRIER with more appropriate hazard barrier.
This is the unchanged part 2 of Chris' hazard cleanup.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:54 +01:00
Ralf Baechle da79e827d4 [MIPS] IP27: Delete useless declaration of allocate_irqno().
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:52 +01:00
thomas@koeller.dyndns.org 663c3d9009 [MIPS] Add configuration variables for RM9xxx processor
This patch introduces a number of configuration variables. These allow to
specify presence/absence of integrated peripherals found on the MIPS
RM9xxx processor family, based on the particular processor model used.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:51 +01:00
thomas@koeller.dyndns.org 0c68a9b6a7 [MIPS] Move excite_fpga.h to include/asm-mips/mach-excite
excite_fpga.h, like all platform headers, really belongs in the
platform header directory.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:50 +01:00
thomas@koeller.dyndns.org 48712a96e3 [MIPS] Suppress compiler warnings
The excite platform exports hardware resources for device drivers to use.
Any driver wanting to use these resources will look up them by their names.
Since these resources are declared to have static linkage, but are not
used in the source file defining them, the compiler used to emit an
'unused' warning, which this patch suppresses.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:50 +01:00
Ralf Baechle 633fd568c1 [MIPS] Move definition of IRIX compat constant into IRIX compat code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:45 +01:00
Ralf Baechle a00f631018 [MIPS] c-r4k: Convert init functions from inline to __init.
With more recent compilers inline doesn't necessarily means a function
will always be inlined.  So leave that decission to the compiler and
make the function as __init.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:44 +01:00
Ralf Baechle 06be375b9a [MIPS] TLS: set_thread_area returns asmlinkage int not void.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:43 +01:00
Ralf Baechle 717736d4d7 [MIPS] TLS: Delete unused sys32_set_thread_area
There is no need for a compat version.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:43 +01:00
Ralf Baechle 00932ba305 [MIPS] Make PROT_WRITE imply PROT_READ. 2006-09-27 13:37:42 +01:00
Maciej W. Rozycki fc095a9021 [MIPS] Atlas: update interrupt handling
The following change updates the Atlas interrupt handling to match that
of Malta.  Tested with a 5Kc and a 34Kf successfully.

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:42 +01:00
Kevin D. Kissell 846acaa2b4 [MIPS] Patch to arch/mips/mips-boards/generic/time.c
In hooking up the perf counter overflow interrupt to the experimental
deprecated-real-soon-now /proc/perf interface last night, I had to
revisit arch/mips/mips-boards/generic/time.c, and discovered that
when the 2.6.9-based SMTC prototype was merged with the more
recent tree, it was missed that arch/mips/kernel/time.c had changed
so that even in SMP kernels, timer_interrupt() calls
local_timer_interrupt(), so there is no longer a need to invoke it
directly from mips_timer_interrupt() in those cases where
timer_interrupt() has been called.  So I got rid of that, and added the
invocation of perf_irq() if Cause.PCI is set, more-or-less following the
same logic as in the non-SMTC case, with the modifications that (a) a
runtime check for Release 2 isn't done, because it's redundant in SMTC),
and (b) we check for a clock interrupt regardless of the value returned
by the perf counter service - I don't understand why we'd want to control
that with perf_irq(), but maybe one of you knows the story.  I also got
rid of the stupid warning about the unused variable when compiled for
SMTC (another artifact of the merge). The result hasn't been beaten to
death, but boots, seems stable, and supports extended precision event
counting.

Signed-off-by: Kevin D. Kissell <kevink@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:41 +01:00
Atsushi Nemoto 60a6c3777e [MIPS] Reduce race between cpu_wait() and need_resched() checking
If a thread became runnable between need_resched() and the WAIT
instruction, switching to the thread will delay until a next interrupt.
Some CPUs can execute the WAIT instruction with interrupt disabled, so
we can get rid of this race on them (at least UP case).

Original Patch by Atsushi with fixing up for MIPS Technology's cores by
Ralf based on feedback from the RTL designers.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:40 +01:00
Atsushi Nemoto 7fdeb04814 [MIPS] Wire up set_robust_list(2) and get_robust_list(2)
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:40 +01:00
Maciej W. Rozycki 09f451bfb9 [MIPS] SEAD defconfig build fix
Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:38 +01:00
Alexander Bigga 32136568a9 [MIPS] Fix for pci config_access on alchemy au1x000
I've encountered a serious problem with PCI config space access on Au1x000
platforms with recent 2.6.x-kernel. With 2.4.31 the same hardware works fine.
So I was looking for the differences:

Symptoms:
- no PCI-device is seen on bootup though two or three cards are present
- lspci output is empty
- OR: lspci shows 20 times the same device
(- OR: in some slot-configurations it worked anyhow)

System(s):
1. platform with Au1500 and three PCI-devices (actually a mycable XXS1500
    with backplane for three PCI-devices)
2. platform with Au1550 and two PCI-devices (custom board)

Debugging:
I digged down to the config_access() of the au1xxx-processors in
arch/mips/pci/ops-au1000.c and switched on DEBUG.

The code of config_access() seems to be almost the same as of the
2.4.x-kernel. But the "pci_cfg_vm->addr" returned by get_vm_area(0x2000, 0)
once on booting is different. That's of course not forbidden. But the
alignment seems to be wrong. In my case, I received:

2.4.31: pci_cfg_vm->addr = c0000000
2.6.18-rc5: pci_cfg_vm->addr = c0101000

To make it short: With 2.6.x it fails on the first config-access with:
"PCI ERR detected: status 83a00356".

Fixup:
My fix is now, to use the VM_IOREMAP-flag in the get_vm_area call. This flag
seems to be introduced in mm/vmalloc.c a long time ago (in 2.6.7-bk13, I
found in gitweb).
Now, the returned address is pci_cfg_vm->addr = c0104000 and everything works
fine.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:38 +01:00
Atsushi Nemoto 898d229107 [MIPS] Make prepare_frametrace() not clobber v0
Since lmo commit 323a380bf9e1a1679a774a2b053e3c1f2aa3f179 ("Simplify
dump_stack()") made prepare_frametrace() always inlined, using $2 (v0)
in __asm__ is not safe anymore.  We can use $1 (at) instead.  Also we
should use "dla" instead of "la" for 64-bit kernel.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:37 +01:00
Atsushi Nemoto f6502791d7 [MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache.
c-r4k.c and c-sb1.c use drop_mmu_context() to flush virtually tagged
I-caches, but this does not work for flushing other task's icache.  This
is for example triggered by copy_to_user_page() called from ptrace(2).
Use indexed flush for such cases.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:37 +01:00
Elizabeth Oldham a94d702049 [MIPS] MT: Fix setting of XTC.
XTC can only be set if VPA is clear, which it may not be. There is
also the possibility of a back to back c0 register access hazard to
take care of.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:36 +01:00
Ralf Baechle 6e74bae9a0 [MIPS] SMTC Build fix.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:36 +01:00
Ralf Baechle dc41fb4396 [MIPS] Fix 32-bit kernel by replacing 64-bit-only code.
dclz() expects its 64-bit argument being passed as a single register
but on 32-bit kernels it'll actually be in a register pair.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:35 +01:00
Ralf Baechle 73b76c78fd [MIPS] MT: When doing "select SMP" also select SMP's prerequesites or ...
... kconfig will do weird stuff.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:35 +01:00
Ralf Baechle c487d2a5a0 [MIPS] eXcite: Don't set SERIAL_RM9000.
The driver has not been merged yet so selecting it results in a warning
message.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:34 +01:00
Ralf Baechle 585fa72493 [MIPS] Retire flush_icache_page from mm use.
On the 34K the redundant cache operations were causing excessive stalls
resulting in realtime code running on the second VPE missing its deadline.
For all other platforms this patch is just a significant performance
improvment as illustrated by below benchmark numbers.

Processor, Processes - times in microseconds - smaller is better
------------------------------------------------------------------------------
Host                 OS  Mhz null null      open slct sig  sig  fork exec sh
                             call  I/O stat clos TCP  inst hndl proc proc proc
--------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ----
25Kf      2.6.18-rc4     533 0.49 1.16 7.57 33.4 30.5 1.34 12.4 5497 17.K 54.K
25Kf      2.6.18-rc4-p   533 0.49 1.16 6.68 23.0 30.7 1.36 8.55 5030 16.K 48.K
4Kc       2.6.18-rc4      80 4.21 15.0 131. 289. 261. 16.5 258. 18.K 70.K 227K
4Kc       2.6.18-rc4-p    80 4.34 13.1 128. 285. 262. 18.2 258. 12.K 52.K 176K
34Kc      2.6.18-rc4      40 5.01 14.0 61.6 90.0 477. 17.9 94.7 29.K 108K 342K
34Kc      2.6.18-rc4-p    40 4.98 13.9 61.2 89.7 475. 17.6 93.7 8758 44.K 158K
BCM1480   2.6.18-rc4     700 0.28 0.60 3.68 5.92 16.0 0.78 5.08 931. 3163 15.K
BCM1480   2.6.18-rc4-p   700 0.28 0.61 3.65 5.85 16.0 0.79 5.20 395. 1464 8385
TX49-16K  2.6.18-rc3     197 0.73 2.41 19.0 37.8 82.9 2.94 17.5 4438 14.K 56.K
TX49-16K  2.6.18-rc3-p   197 0.73 2.40 19.9 36.3 82.9 2.94 23.4 2577 9103 38.K
TX49-32K  2.6.18-rc3     396 0.36 1.19 6.80 11.8 41.0 1.46 8.17 2738 8465 32.K
TX49-32K  2.6.18-rc3-p   396 0.36 1.19 6.82 10.2 41.0 1.46 8.18 1330 4638 18.K
    
Original patch by me with enhancements by Atsushi Nemoto.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
2006-09-27 13:37:34 +01:00
Ralf Baechle 13fdd31abe [MIPS] Avoid double signal restarting.
In entry.S resume_userspace ... jal do_notify_resume form a loop through
which the kernel will iterate as long as work is pending.  If we
iterate through this loop more than once with no signal pending for at
least one but the last iteration we will take do the syscall restarting
multiple times resulting in a syscall return prior to the the syscall
instruction in userspace.  This may happen when debugging a multithreaded
program.

Debugging and original fix by Maciej; extended to other ABIs by me.

Signed-off-by: Maciej W. Rozycki <macro@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:33 +01:00
Chris Dearman 847b9dfcca [MIPS] MT: Initialise all writable bits in Cause register to zero.
Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an
immediate exception when starting the second VPE.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:33 +01:00
Yoichi Yuasa bca70d24c0 [MIPS] Fix EV64120 PCI fixup in Makefile
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:33 +01:00
Ralf Baechle 45887e12f2 [MIPS] Add missing returns in signal code.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:32 +01:00
Ralf Baechle 1b223c861f [MIPS] IRIX: Crapectopy.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:31 +01:00
Ralf Baechle 048c6140c0 [MIPS] Don't call try_to_freeze in do_signal & co.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:30 +01:00
Ralf Baechle b4b30a5a0a [MIPS] Cleanup leftovers of ARCH_HAS_IRQ_PER_CPU
CONFIG_IRQ_PER_CPU now controls the IRQ_PER_CPU stuff.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:29 +01:00
Franck Bui-Huu 4d157d5eac [MIPS] Improve unwind_stack()
This patch allows unwind_stack() to return ra for leaf function.
But it tries to detects cases where get_frame_info() wrongly
consider nested function as a leaf one.

It also pass 'unsinged long *sp' instead of 'unsigned long **sp'
as second parameter. The code looks cleaner.

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:29 +01:00
Franck Bui-Huu 0cceb4aa9a [MIPS] Make get_frame_info() more robust
Now get_frame_info() wants to detect move sp instruction first. It
assumes that the save ra in the stack instruction can't happen
before allocating frame size space into the stack.

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:28 +01:00
Franck Bui-Huu 1666a6fc73 [MIPS] Simplify dump_stack()
Make dump_stack() code not depend on CONFIG_KALLSYMS.

It also make prepare_frametrace() always inlined to get
less false entries reported by show_raw_backtrace().

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:28 +01:00
Franck Bui-Huu 6057a79876 [MIPS] Make frame_info_init() more readable.
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:27 +01:00
Franck Bui-Huu 87151ae39b [MIPS] Miscellaneous cleanup in prologue analysis code
We usually use backtrace term for dumping a call tree during
debug. Therefore this patch renames show_frametrace() into
show_backtrace() and show_trace() into show_raw_backtrace().

It also uses the new function print_ip_sym().

Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:26 +01:00
Franck Bui-Huu cf495a3330 [MIPS] Remove unused MODULE_RANGE macro.
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:25 +01:00
Franck Bui-Huu c0efbb6dc2 [MIPS] Make get_frame_info() more readable.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Franck Bui-Huu <vagabon.xyz@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:24 +01:00
Ralf Baechle df586d59a4 [MIPS] c-r4k: Typo fix.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:23 +01:00
Peter Watkins 1b4ee40a13 [MIPS] N32 rt_sigqueueinfo uses O32 padding, not N64
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:22 +01:00
Atsushi Nemoto f66686f70a [MIPS] dump_stack() based on prologue code analysis
Instead of dump all possible address in the stack, unwind the stack frame
based on prologue code analysis, as like as get_wchan() does.  While the
code analysis might fail for some reason, there is a new kernel option
"raw_show_trace" to disable this feature.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27 13:37:06 +01:00