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5 Commits

Author SHA1 Message Date
Zhangfei Gao 8b9dcb6cb7 clk: hisi: add hisi_clk_register_gate 
Add hisi_clk_register_gate register clk gate table

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
 2014-05-12 11:30:18 +08:00
Zhangfei Gao 156342a1e5 clk: hisi: use clk_register_mux_table in hisi_clk_register_mux 
Platform hix5hd2 use mux table, so use clk_register_mux_table instead

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
 2014-05-12 11:30:05 +08:00
Haojian Zhuang 75af25f581 clk: hisi: remove static variable 
Remove the static variable. So these common clock register helper could
be used in more SoCs.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
 2014-03-19 15:31:27 +08:00
Haojian Zhuang 16d1c8991c clk: hisi: assign missing clk to table 
The fixed rate and fixed factor clock isn't registered to clk table.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
 2014-03-19 15:23:32 +08:00
Haojian Zhuang 0aa0c95f74 clk: hisilicon: add common clock support 
Enable common clock driver of Hi3620 SoC. clkgate-seperated driver is
used to support the clock gate that enable/disable/status registers
are seperated.

Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
 2013-12-04 18:36:45 +08:00