3 Commits

Author	SHA1	Message	Date
Ralf Baechle	47740eb887	MIPS: Enable CLO / CLZ instructions via separate CPU property ... This is useful for IDT RC32332, RC32334 and NEC VR5500 processors which do not implement the full MIPS32 / MIPS64 architecture. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2009-05-14 13:50:26 +01:00
Ralf Baechle	4816227b54	MIPS: Clean up MIPSxx-optimized bitop functions ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2008-10-30 14:44:33 +00:00
Ralf Baechle	384740dc49	MIPS: Move headfiles to new location below arch/mips/include ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>	2008-10-11 16:18:52 +01:00