Commit Graph

8 Commits

Author SHA1 Message Date
Chris Packham e120c17a70 clk: mvebu: support for 98DX3236 SoC
The 98DX3236, 98DX3336, 98DX4521 and variants have a different TCLK from
the Armada XP (200MHz vs 250MHz). The CPU core clock is fixed at 800MHz.

The clock gating options are a subset of those on the Armada XP.

The core clock divider is different to the Armada XP also.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-01-27 10:48:03 -08:00
Ezequiel Garcia 0737c15ff5 clk: mvebu: Support Armada 380 SoC on the core divider clock
This commit adds support for the Core Divider clocks of the Armada
380 SoCs. Similarly to Armada 370 and XP, the Core Divider clocks of
the 380 have gate capabilities. The only difference is the register layout.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1394742273-5113-2-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-03-13 23:24:23 +00:00
Ezequiel Garcia 8230a5ab43 clk: mvebu: Fix ratio register offset on A375 SoC
This commit fixes the ratio register offset which is 0x4,
as per the Armada 375 SoC specification.

Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Link: https://lkml.kernel.org/r/1394638901-13368-2-git-send-email-ezequiel.garcia@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-03-13 23:20:27 +00:00
Thomas Petazzoni e4aec65c86 clk: mvebu: add Armada 375 support to the corediv clock driver
This commit adds support for the Core Divider clocks of the Armada
375. Compared to Armada 370 and XP the Core Divider clocks of the 375
cannot be gated: only their ratio can be changed. This is reflected by
the fact that the enable, disable and is_enabled clock operations are
not defined, and that the enable_bit_offset field is also undefined.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17 02:33:59 +00:00
Thomas Petazzoni c642e6a95b clk: mvebu: refactor corediv driver to support more SoC
This commit refactors the corediv clock driver so that it is capable
of handling various SOCs that have slightly different corediv clock
registers and capabilities.

It introduces a clk_corediv_soc_desc structure that encapsulates all
the SoC specific details.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17 02:33:57 +00:00
Thomas Petazzoni 846f33e6c3 clk: mvebu: add a little bit of documentation about data structures
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17 02:33:56 +00:00
Thomas Petazzoni 5d836c58f2 clk: mvebu: do not copy the contents of clk_corediv_desc
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-02-17 02:33:54 +00:00
Ezequiel Garcia a2473b6c82 clk: mvebu: Add Core Divider clock
This commit introduces a new group of clocks present in Armada 370/XP
SoCs (called "Core Divider" clocks) and add a provider for them.
The only clock supported for now is the NAND clock (ndclk), but the
infrastructure to add the rest is already set.

Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-11-24 17:29:25 +00:00