1726 Commits

Author	SHA1	Message	Date
Stephen Boyd	44a6951777	Merge branch 'clk-qcom-8998-resets' into clk-next ... - Add resets and make Qualcomm MSM8998 GCC driver more functional * clk-qcom-8998-resets: clk: qcom: Drop unused 8998 clock clk: qcom: Leave mmss noc on for 8998 clk: qcom: Add missing msm8998 resets clk: qcom: gcc-msm8998: Add clkref clocks clk: qcom: gcc-msm8998: Disable halt check of UFS clocks clk: qcom: gcc-msm8998: Drop hmss_dvm and lpass_at clk: qcom: Enumerate remaining msm8998 resets clk: qcom: Add xo dummy clk on msm8998 clk: qcom: Fix MSM8998 resets	2018-12-14 13:42:00 -08:00
Stephen Boyd	58c05c823b	Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp' and 'clk-imx8mq' into clk-next ... - NXP i.MX7ULP SoC clock support - Support for i.MX8QXP SoC clocks - Support for NXP i.MX8MQ clock controllers * clk-imx7ulp: clk: imx: add imx7ulp clk driver clk: imx: implement new clk_hw based APIs clk: imx: make mux parent strings const dt-bindings: clock: add imx7ulp clock binding doc clk: imx: add imx7ulp composite clk support clk: imx: add pfdv2 support clk: imx: add pllv4 support clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support clk: imx: add gatable clock divider support * clk-imx6-fixes: clk: imx6q: handle ENET PLL bypass clk: imx6q: optionally get CCM inputs via standard clock handles clk: imx6q: reset exclusive gates on init * clk-imx-fixes: clk: imx6q: add DCICx clocks gate clk: imx6sl: ensure MMDC CH0 handshake is bypassed clk: imx7d: remove UART1 clock setting * clk-imx8qxp: clk: imx: add imx8qxp lpcg driver clk: imx: add lpcg clock support clk: imx: add imx8qxp clk driver clk: imx: add scu clock common part clk: imx: add configuration option for mmio clks dt-bindings: clock: add imx8qxp lpcg clock binding dt-bindings: clock: imx8qxp: add SCU clock IDs firmware: imx: add pm svc headfile dt-bindings: fsl: scu: update power domain binding firmware: imx: remove resource id enums dt-bindings: imx: add scu resource id headfile * clk-imx8mq: clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant clk: imx: remove redundant initialization of ret to zero clk: imx: Add SCCG PLL type clk: imx: Add fractional PLL output clock clk: imx: Add clock driver for i.MX8MQ CCM clk: imx: Add imx composite clock dt-bindings: Add binding for i.MX8MQ CCM	2018-12-14 13:34:47 -08:00
Stephen Boyd	ffe05540d1	Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and 'clk-rockchip' into clk-next ... * clk-renesas: clk: renesas: rcar-gen3: Add HS400 quirk for SD clock clk: renesas: rcar-gen3: Add documentation for SD clocks clk: renesas: rcar-gen3: Set state when registering SD clocks clk: renesas: r8a77995: Simplify PLL3 multiplier/divider clk: renesas: r8a77995: Add missing CPEX clock clk: renesas: r8a77995: Remove non-existent SSP clocks clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks clk: renesas: r8a77995: Correct parent clock of DU clk: renesas: r8a77990: Correct parent clock of DU clk: renesas: r8a77970: Add CPEX clock clk: renesas: r8a77965: Add CPEX clock clk: renesas: r8a7796: Add CPEX clock clk: renesas: r8a7795: Add CPEX clock clk: renesas: r8a774a1: Add CPEX clock dt-bindings: clock: r8a7796: Remove CSIREF clock dt-bindings: clock: r8a7795: Remove CSIREF clock clk: renesas: Mark rza2_cpg_clk_register static clk: renesas: r7s9210: Add USB clocks clk: renesas: r8a77970: Add RPC clocks clk: renesas: r7s9210: Add SDHI clocks * clk-allwinner: clk: sunxi-ng: a64: Allow parent change for VE clock clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocks clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLL clk: sunxi-ng: h3: Allow parent change for ve clock clk: sunxi-ng: add support for suniv F1C100s SoC dt-bindings: clock: Add Allwinner suniv F1C100s CCU clk: sunxi-ng: h3/h5: Fix CSI_MCLK parent clk: sunxi-ng: r40: Force LOSC parent to RTC LOSC output clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLL clk: sunxi-ng: a64: Fix gate bit of DSI DPHY clk: sunxi-ng: Enable DE2_CCU for SUN8I and SUN50I clk: sunxi-ng: Add support for H6 DE3 clocks dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description clk: sunxi-ng: h6: Set video PLLs limits clk: sunxi-ng: Use u64 for calculation of NM rate clk: sunxi-ng: Adjust MP clock parent rate when allowed clk: sunxi-ng: sun50i: h6: Fix MMC clock mux width clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clock * clk-tegra: clk: tegra: Return the exact clock rate from clk_round_rate clk: tegra30: Use Tegra CPU powergate helper function soc/tegra: pmc: Drop SMP dependency from CPU APIs clk: tegra: Fix maximum audio sync clock for Tegra124/210 clk: tegra: get rid of duplicate defines clk: tegra20: Check whether direct PLLM sourcing is turned off for EMC clk: tegra20: Turn EMC clock gate into divider * clk-meson: (25 commits) clk: meson: axg-audio: use the clk input helper function clk: meson: add clk-input helper function clk: meson: Mark some things static clk: meson: meson8b: add the read-only video clock trees clk: meson: meson8b: add the fractional divider for vid_pll_dco clk: meson: meson8b: fix the offset of vid_pll_dco's N value clk: meson: Fix GXL HDMI PLL fractional bits width clk: meson: meson8b: add the CPU clock post divider clocks clk: meson: meson8b: rename cpu_div2/cpu_div3 to cpu_in_div2/cpu_in_div3 clk: meson: clk-regmap: add read-only gate ops clk: meson: meson8b: allow changing the CPU clock tree clk: meson: meson8b: run from the XTAL when changing the CPU frequency clk: meson: meson8b: add support for more M/N values in sys_pll clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel clk: meson: clk-pll: check if the clock is already enabled clk: meson: meson8b: fix the width of the cpu_scale_div clock clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table clk: meson: meson8b: use the HHI syscon if available dt-bindings: clock: meson8b: use the registers from the HHI syscon ... * clk-rockchip: clk: rockchip: add clock-id to gate of ACODEC for rk3328 clk: rockchip: add clock ID of ACODEC for rk3328 clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328 clk: rockchip: fix I2S1 clock gate register for rk3328 clk: rockchip: make rk3188 hclk_vio_bus critical clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering clk: rockchip: fix rk3188 sclk_smc gate data clk: rockchip: fix typo in rk3188 spdif_frac parent	2018-12-14 13:34:00 -08:00
Stephen Boyd	1a501c8def	Merge branches 'clk-managed-registration', 'clk-spdx', 'clk-remove-basic' and 'clk-ops-const' into clk-next ... - Make devm_of_clk_add_hw_provider() use parent dt node if necessary - Various SPDX taggings - Mark clk_ops const when possible * clk-managed-registration: clk: bd718x7: Initial support for ROHM bd71837/bd71847 PMIC clock clk: apcs-msm8916: simplify probe cleanup by using devm clk: clk-twl6040: Free of_provider at remove clk: rk808: use managed version of of_provider registration clk: clk-hi655x: Free of_provider at remove clk: of-provider: look at parent if registered device has no provider info clk: Add kerneldoc to managed of-provider interfaces * clk-spdx: clk: Tag basic clk types with SPDX clk: Tag clk core files with SPDX clk: bcm2835: Switch to SPDX identifier * clk-remove-basic: clk: Loongson1: Remove usage of CLK_IS_BASIC clk: samsung: s3c2410: Remove usage of CLK_IS_BASIC clk: versatile: sp810: Remove usage of CLK_IS_BASIC clk: hisilicon: Remove usage of CLK_IS_BASIC clk: h8300: Remove usage of CLK_IS_BASIC clk: axm5516: Remove usage of CLK_IS_BASIC clk: st: Remove usage of CLK_IS_BASIC clk: renesas: Remove usage of CLK_IS_BASIC * clk-ops-const: clk: s2mps11: constify clk_ops structure clk: pxa: constify clk_ops structures clk: pistachio: constify clk_ops structures clk: palmas: constify clk_ops structure clk: max77686: constify clk_ops structure	2018-12-14 13:33:44 -08:00
Stephen Boyd	3315fe5faf	Merge branch 'clk-qcom-sdm845-lpass' into clk-next ... - Qualcomm SDM845 audio subsystem clks * clk-qcom-sdm845-lpass: clk: qcom: Add lpass clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM LPASS clock bindings dt-bindings: clock: Update GCC bindings for protected-clocks	2018-12-14 13:27:53 -08:00
Stephen Boyd	f4ad7fba06	Merge branches 'clk-qcom-kconfig', 'clk-qcom-gpucc', 'clk-qcom-qcs404-rpm', 'clk-qcom-spi' and 'clk-qcom-videocc-binding' into clk-next ... - Qualcomm SDM845 GPU clock controllers - Qualcomm QCS404 RPM clk support * clk-qcom-kconfig: clk: qcom: Move to menuconfig and reduce lines * clk-qcom-gpucc: dt-bindings: clock: qcom: Fix the xo parent in gpucc example clk: qcom: gpu_cc_gmu_clk_src has 5 parents, not 6 clk: qcom: Add a dummy enable function for GX gdsc clk: qcom: gdsc: Don't override existing gdsc pd functions clk: qcom: Add graphics clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM Graphics clock bindings * clk-qcom-qcs404-rpm: clk: qcom: smd: Add support for QCS404 rpm clocks * clk-qcom-spi: clk: qcom: msm8916: Additional clock rates for spi * clk-qcom-videocc-binding: dt-bindings: clock: Require #reset-cells in sdm845-videocc	2018-12-14 13:27:11 -08:00
Rohit kumar	76119509d2	ASoC: qdsp6: dt-bindings: Add q6afe display_port dt binding ... This patch adds bindings required for DISPLAY_PORT_RX port on AFE. Signed-off-by: Rohit kumar <rohitkr@codeaurora.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>	2018-12-14 12:48:48 +00:00
Vignesh R	fc66393ab5	dt-bindings: pinctrl: k3: Introduce pinmux definitions ... The dt-bindings header for TI K3 AM6 SoCs define a set of macros for defining pinmux configs in human readable form, instead of raw-coded hex values. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>	2018-12-14 09:56:43 +02:00
Aisheng Dong	0f5ab411f5	dt-bindings: clock: add imx8qxp lpcg clock binding ... The Low-Power Clock Gate (LPCG) modules contain a local programming model to control the clock gates for the peripherals. An LPCG module is used to locally gate the clocks for the associated peripheral. Note: This level of clock gating is provided after the clocks are generated by the SCU resources and clock controls. Thus even if the clock is enabled by these control bits, it might still not be running based on the base resource. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-13 22:12:46 -08:00
Aisheng Dong	8cecda9164	dt-bindings: clock: imx8qxp: add SCU clock IDs ... Add IMX8QXP SCU clock IDs. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-13 22:12:46 -08:00
Olof Johansson	e3154317a0	i.MX drivers change for 4.21: ... - A series from Aisheng that improves SCU power domain bindings by defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain driver support on top of it. - A series from Lucas that updates gpcv2 driver for scalability and adds i.MX8MQ support into the driver. - Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power domain on imx6sx has 7 clocks. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJcDbkEAAoJEFBXWFqHsHzO1C4H/05Khi/tWF6xZNMw7C4Q6wf6 WIFhB73tTLxZ8W0n8gIS+Y2YKFw6+dy8J/ZpkFBpe+f6rqVsyTzUvGB+6Ii3Nomu V2juCn8XaHfv32FfaPBCelnitcpgFrnEvXYS6u8mSEt1DSu8rK2y2yMcnrkdcurq Jy9eAYjUrdXYGsH9uw36mco7q25I5wSnXOLzZ0SLXSqB//a9YlzPKGRmQqF0uQ3t K8uT5PwqEBrjNAP6sTvSzMf6vSeXD5MGqrEvd/LnGp6IPwx7R+z4Y+HUw/RtTIdg rP1hAt3PLDD7Ibk+GHH5q/M2+9fI2dn2y44JXGOlQvqdmoLVg1vCpTLEj8OioFU= =/3Mg -----END PGP SIGNATURE----- Merge tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers i.MX drivers change for 4.21: - A series from Aisheng that improves SCU power domain bindings by defining '#power-domain-cells' as 1, and adds i.MX8 SCU power domain driver support on top of it. - A series from Lucas that updates gpcv2 driver for scalability and adds i.MX8MQ support into the driver. - Increase gpc driver GPC_CLK_MAX definition to 7, as DISPLAY power domain on imx6sx has 7 clocks. * tag 'imx-drivers-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: soc: imx: gpc: Increase GPC_CLK_MAX to 7 soc: imx: gpcv2: add support for i.MX8MQ SoC soc: imx: gpcv2: move register access table to domain data soc: imx: gpcv2: prefix i.MX7 specific defines firmware: imx: add SCU power domain driver firmware: imx: add pm svc headfile dt-bindings: fsl: scu: update power domain binding firmware: imx: remove resource id enums dt-bindings: imx: add scu resource id headfile Signed-off-by: Olof Johansson <olof@lixom.net>	2018-12-12 13:33:06 -08:00
Olof Johansson	48ff08dd9a	Renesas ARM Based SoC Drivers Updates for v4.21 ... SYSC Driver: * Common - Fix power domain control after system resume - Merge PM Domain registration and linking - Remove rcar_sysc_power_{down,up}() helpers * R-Car E3 (r8a77990) SoC - Fix initialization order of 3DG-{A,B} * R-Car V3H (r8a77980) SoC - Correct A3VIP[012] power domain hierarchy - Correct names of A2DP[01] power domains * R-Car V3M (r8a77970) SoC - Correct names of A2DP/A2CN power domains - emove non-existent CR7 power domain * R-Car M3-N (r8a77965) SoC - Remove non-existent A3IR power domain -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlwJlSMACgkQ189kaWo3 T75d6A/5AY8yOPpAjVCS4H21JY4X5AyQaIzrQ776Ya9K8JrqL3f5GcNk1PsRiJFr wOKwAIIYBQlD3uv5yT2zTUymAU2jDwqLiAQk2mHSLzsTi2MC7FhJZr6eybsMvt5/ BUtWKrl+L6fTmFBKgNznhJqdV54m16cOLFRsNPcgKccMtYhHG0cQqumERfaLzXiW JLu6gpzlx4TLHPMzdLqldHAmM65Y+33BUPU/+SIF0vjNCeQonz2HLgHJ9zh0gvr6 StN+nArJ3/bVqCsgMdkTtc+hWGTShkC+ndyC/C6kDtRARZZplf7MfRYl2MLNvW3s o9kJa0kwC71Y11QHpWBxbWKYh+SrlGcubummrGH60i4PQoinS8PyneLbQ/pz9P4H CfaaO4Vj6NuGaVecKy7deaVFL77ojS50pTg0ebFkyiOP0Cu3uWYgLQfm15WKpnDl jc4JTAJYCsk5OMScwvBVxplob4XL+BQ79iOdS0spuqlJUVwcClqfwBXvp5RHFfAn WoVqyEbzUZ6yXoxwElSP28BGx4C89Fk4okhf4IZKkprIVGjrO3e+Z5kCKeLZ+45r QsG83DM8ilgSfafVUzgwwJS3he532sHGTimMtpMqIFkJiUOK7tebtsNNeNJ4OdlP xBMllTaYnXTx9EG7iNU7tmqskLACy1s3cbut1W/H7B3n8Cep3ZA= =zQF+ -----END PGP SIGNATURE----- Merge tag 'renesas-drivers-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers Renesas ARM Based SoC Drivers Updates for v4.21 SYSC Driver: * Common - Fix power domain control after system resume - Merge PM Domain registration and linking - Remove rcar_sysc_power_{down,up}() helpers * R-Car E3 (r8a77990) SoC - Fix initialization order of 3DG-{A,B} * R-Car V3H (r8a77980) SoC - Correct A3VIP[012] power domain hierarchy - Correct names of A2DP[01] power domains * R-Car V3M (r8a77970) SoC - Correct names of A2DP/A2CN power domains - emove non-existent CR7 power domain * R-Car M3-N (r8a77965) SoC - Remove non-existent A3IR power domain * tag 'renesas-drivers-for-v4.21' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: rcar-sysc: Fix power domain control after system resume soc: renesas: rcar-sysc: Merge PM Domain registration and linking soc: renesas: rcar-sysc: Remove rcar_sysc_power_{down,up}() helpers soc: renesas: r8a77990-sysc: Fix initialization order of 3DG-{A,B} soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain soc: renesas: r8a77965-sysc: Remove non-existent A3IR power domain Signed-off-by: Olof Johansson <olof@lixom.net>	2018-12-12 13:27:40 -08:00
Olof Johansson	ac3e0be697	ARM: dts: Amlogic updates for v4.21, round 2 ... Highlights - add CPU OPP tables - timers: add global timer and TWD -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlwOzBgACgkQWTcYmtP7 xmXT1g/+LyEr7VDCf+AQOGMdkpQ/kivF6YoDmlj2wEO5v2qb1FpZIGfHsddDG+hZ mHDjsNDFowNODrzc3wmOJ5AfidGnZxgr9Thsm6ZDoMErgVfMeiBPJ7IjjbIGU8Zr a8hyBpOqrtR5gxeDg13jkRh+lxC+DFe6CjsF34JN3lwrUmfuzQNDAHWeXyKRiK0L fWcBFjd1kXYajWzRYDqqLfwpIxZH1YcQx5aREaCd5izV6mOBpJ6J3Jv2kSbBN1ld LOL+iPUFlhU5EvT0gaxT/Tr6SAws0XR3Rt1/ZwMt5GCM3vmvP4A/OJHcj0Gmk3EI UDH0utrtsPS7Gx+J7yG7jfEcxt1bUZ7KM8TbFw+Axf4wfWYZ4S3aWQfXfVPfDNtB zJWbZ2Q449lFqYyeS+UQVrsyLpTxLFQkohlHhJ0mq5sQdA3ARSyoxqOb6z4fOP0K vpYTKpmalS+EfINXkbBruxuJfZirJHO2LB94dy71OCoS4qCGN3ZFvWebpL/Fjwnx jiWHEdmWdo61X4mLplLm1fS0x1sdGgS/1OsiKutPiZlXmgK1kMYhRn83ZW5vbb2P RwsX0zlZWRy1lJ1go19CcMCFE5OXJ4ZxRv5ADakHYFg4rpx4EoMPkBPgNUbWW4WW bxy/STU3D+F8uhj5sf1uV1sc832mnGELic1A9DPGbG0L7/pdbQo= =qoPa -----END PGP SIGNATURE----- Merge tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt ARM: dts: Amlogic updates for v4.21, round 2 Highlights - add CPU OPP tables - timers: add global timer and TWD * tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson: meson8b: add the CPU OPP tables ARM: dts: meson: meson8: add the CPU OPP table ARM: dts: meson8b: add the Cortex-A5 global timer ARM: dts: meson8b: add the ARM TWD timer ARM: dts: meson8: add the Cortex-A9 global timer ARM: dts: meson8: add the ARM TWD timer ARM: dts: meson: group the Cortex-A5 / Cortex-A9 peripherals dt-bindings: clock: meson8b: export the CPU post dividers Signed-off-by: Olof Johansson <olof@lixom.net>	2018-12-12 13:02:51 -08:00
Olof Johansson	fafda335f8	i.MX7ULP device tree for 4.21: ... - It includes the initial device tree for i.MX7ULP SoC and EVK board support. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJcDd7aAAoJEFBXWFqHsHzOgNEIAKc4dqYzWmfJTMnJGO+Bb1Rc BPkENpRWk6rWVBuxXwN4MTupXIgj96bBHWsg3kplgcthMRAl2wgomHTpNWXk8R9m Fn6sH9yIoeqr+xs6BzzQ8COrFBXg8CEZgKLgy+9nhfFi3xNf6pN6IQLgqrGF17MC zFH+sM0rqlh1l3BfHXMuwHvbhw+ms6Qo6z68OGSXmu0bUPThm2FV/Akivqp+INSI CeFyZ8RMTkEKVSkFEryZaprKgqlIYW2Kl54yeALjvG03mtn1onaZKqsNV7YonYMC X+mZPLnwjBUnLi2HbKrStmTR0ePQjg5x1tMT+Eco7Cjj4h6H6uBu0IYMi4PiN7o= =aOId -----END PGP SIGNATURE----- Merge tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt i.MX7ULP device tree for 4.21: - It includes the initial device tree for i.MX7ULP SoC and EVK board support. * tag 'imx7ulp-dt-4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: dts: imx: add imx7ulp evk support ARM: dts: imx: add common imx7ulp dtsi support dt-bindings: fsl: add imx7ulp pm related components bindings dt-bindings: fsl: add compatible for imx7ulp evk clk: imx: add imx7ulp clk driver clk: imx: implement new clk_hw based APIs clk: imx: make mux parent strings const dt-bindings: clock: add imx7ulp clock binding doc clk: imx: add imx7ulp composite clk support clk: imx: add pfdv2 support clk: imx: add pllv4 support clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support clk: imx: add gatable clock divider support Signed-off-by: Olof Johansson <olof@lixom.net>	2018-12-12 12:56:36 -08:00
Boris Brezillon	7482d6ecc6	regulator: act8945a-regulator: Implement PM functionalities ... The regulator supports a dedicated suspend mode. Implement the appropriate ->set_suspend_xx() hooks, add support for ->set_mode(), and provide basic PM ops functionalities to setup the regulator in a suspend state when the system is entering suspend. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> [claudiu.beznea@microchip.com: remove shutdown function, use dev_pm_ops, fix checkpatch warning, adapt commit message, add LDO modes support, move modes constants to active-semi,8945a-regulator.h, remove rdevs from struct act8945a_pmic, add op_mode to act8945a_pmic] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org>	2018-12-12 16:59:04 +00:00
Jeffrey Hugo	a1697aba27	clk: qcom: Add missing msm8998 resets ... commit c0cb7c7e71 ("clk: qcom: Enumerate remaining msm8998 resets") missed two USB2 resets. Add them. Fixes: c0cb7c7e71 ("clk: qcom: Enumerate remaining msm8998 resets") Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-11 13:25:24 -08:00
Olof Johansson	44a26c894b	dt-bindings: Changes for v4.21-rc1 ... This contains a few cleanups of and additions to existing device tree bindings, such as XUSB, EMC, PMC and thermal. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlwKfkQTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoapRD/0dpJfxARsf0gH8vzO2MSQrUFaXFxPF 9C86G5RzoVGTbEXwLQoOH9k73Cup+eyjnlMcMXHHTkuINJhi5Bil+6lyztCa/P/n 4z5mZeMfv7LZaHq+/nUHSD0qjzSkz5ZaKdEXTZNijb4hjQE7x5zphOrYd4OLNrOF 1nfhHkLjmTW77cJCkG+70OQ4MP+hBQg8sHcbDrfTD5bweVb3ZcD7Bp81w4gKLrdk K4/DYxHBfzL2Y6JCgVtvHfgrWkw3cfOzznnfuHkC37OvYSVFdgkpkSNr6V+a+dQ1 AcCJ5RIyZsSSVatQT9j/QexE/eLYQUvCN/hM1VG1hZv3QFnGpTgTuF1zEw3v4rjF dN7a8OC2jkmaueQIFFHPiUgpq16FL4Tixu8DKDrU+KHmM9JJZC4PgP+5N+NdVGmq VAEjHUIgbKSToyePdic24MCuJ8TCWB75IWVw9zPLmcmQiJMTzWVwLuiEnd3/dYuW pqgrj31e30BJQ6Sgs1nKKrg6MRS0RNjaelTXhJP07P7IMgtec7xEhDlZQY6SQssV Us8M2IYSRiUocynykJCeNCkve22X2Cmtc2q68jsWhKDf/HZM8fgjbatetNDJNfFz Zr48QSyIGcp0Uba+M0LpeIHDDasgtE/YUjkNOOHc7cap2yK45L0/5E/iosXA3H1m VAI1vmcNJFTmcw== =3PUd -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.21-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt dt-bindings: Changes for v4.21-rc1 This contains a few cleanups of and additions to existing device tree bindings, such as XUSB, EMC, PMC and thermal. * tag 'tegra-for-4.21-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: tegra186-pmc: Add interrupt controller properties dt-bindings: thermal: tegra-bpmp: Add Tegra194 support dt: bindings: Move tegra20-emc binding to memory-controllers directory dt: bindings: tegra20-emc: Document clock property dt: bindings: tegra20-emc: Document interrupt property dt-bindings: usb: xhci-tegra: Add power-domain details Signed-off-by: Olof Johansson <olof@lixom.net>	2018-12-11 08:05:17 -08:00
Anson Huang	929914946f	clk: imx6q: add DCICx clocks gate ... On i.MX6QP/i.MX6Q/i.MX6DL, there are DCIC1/DCIC2 clocks gate in CCM_CCGR0 register, add them into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-10 11:34:50 -08:00
Thierry Reding	25fbc9e8d3	dt-bindings: tegra186-gpio: Add Tegra186 specific prefix ... Subsequent generations of Tegra, such as Tegra194, contain a completely different set of GPIOs. In order to clarify that the Tegra186 defines are indeed specific to Tegra186, change the prefix from TEGRA_ to TEGRA186_. Note that for now we need to keep the old definitions in place to avoid breaking compilation in file that use this header. Once all users have been converted to use the new defines, the old ones can be removed. Also note that this is only a naming change and doesn't affect device tree ABI. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2018-12-07 11:07:12 +01:00
Bjorn Andersson	30bc0b9881	clk: qcom: gcc-msm8998: Add clkref clocks ... Add clkref clocks for usb3, hdmi, ufs, pcie, and usb2. They are all sourced off CXO_IN, so parent them off "xo" until a proper link to the rpmcc can be described in DT. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-05 15:57:49 -08:00
Jeffrey Hugo	c0cb7c7e71	clk: qcom: Enumerate remaining msm8998 resets ... The current list of defined resets is incomplete compared to what the hardware implements. Enumerate the remaining resets according to the hardware documentation. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-05 15:57:01 -08:00
Lucas Stach	685efffe37	soc: imx: gpcv2: add support for i.MX8MQ SoC ... The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the GPCv2 on the i.MX7, but only controls more power domains with a different mapping. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>	2018-12-05 08:50:36 +08:00
Geert Uytterhoeven	6155bfa32c	clk: renesas: r8a77995: Add missing CPEX clock ... The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) added the CPEX clock on R-Car D3. This clock can be selected as a clock source for CMT1 (Compare Match Timer Type 1). Add the missing clock to the DT bindings header, and implement support for it in the clock driver. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>	2018-12-04 10:30:05 +01:00
Geert Uytterhoeven	846dbb405b	clk: renesas: r8a77995: Remove non-existent SSP clocks ... The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as this SoC does not have a Stream and Security Processor. As these definitions were never used, they can just be removed. The freed slots in the DT bindings header must not be reused, though. Fixes: 714c53aa2e ("clk: renesas: Add r8a77995 CPG Core Clock Definitions") Fixes: d71e851d82 ("clk: renesas: cpg-mssr: Add R8A77995 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>	2018-12-04 10:30:02 +01:00
Geert Uytterhoeven	4584738e13	dt-bindings: clock: r8a7796: Remove CSIREF clock ... The R-Car Gen3 HardWare Manual Errata for Rev. 0.52 (Nov 30, 2016) removed the CSI reference clock on R-Car M3-W. As this definition was never used, it can just be removed. The freed slot in the DT bindings header must not be reused, though. Fixes: 972610fb23 ("clk: renesas: Add r8a7796 CPG Core Clock Definitions") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>	2018-12-04 10:29:35 +01:00
Geert Uytterhoeven	4102a9edf9	dt-bindings: clock: r8a7795: Remove CSIREF clock ... The R-Car Gen3 HardWare Manual Errata for Rev. 0.52 (Nov 30, 2016) removed the CSI reference clock on R-Car H3. As this definition was never used, it can just be removed. The freed slot in the DT bindings header must not be reused, though. Fixes: 9d0c3c6820 ("clk: shmobile: Add r8a7795 CPG Core Clock Definitions") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Stephen Boyd <sboyd@kernel.org>	2018-12-04 10:29:30 +01:00
Mesih Kilinc	3d737ddbe7	dt-bindings: clock: Add Allwinner suniv F1C100s CCU ... Add compatiple string for Allwinner suniv F1C100s CCU. Add clock and reset definitions. Signed-off-by: Mesih Kilinc <mesihkilinc@gmail.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>	2018-12-04 08:41:13 +01:00
Olof Johansson	e5734bebed	This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes ... for 4.21, please pull the following changes: - James fixes the firmware interface after a commit changed the use of VLA and broke large transfers - Stefan adds a timeout check for Raspberry Pi firmware transactions and updates a bunch of SoC/firmware files to use SPDX tags - Wolfram switches the GISB bus arbiter to use dev_get_drvdata() - Yangtao provides a fix for a reference leak due to a call to of_find_node_by_path() - Florian fixes the CPU re-entry point out of S3 suspend with kernels built in Thumb2 mode -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlwC0o4ACgkQh9CWnEQH BwSYfxAA0AmUWIJ65Tp+UyfmKXI4ufa7Rznf7x3pJs788Fulz1Q/158oifIBHZY9 p6wc9MOFGk0uPc4HN4eVYXuUnQ1liJ6YfWPDj+rBvk9IVOZCKjRSbiELeSjEMeTy J/nC/N69rIkwkOaTNFne8SNdKba/DMgsYTLz+p0WOyktO50AAcrG4qL1avx/7QnM TjpUkQ1wKsLJZftJCUSSOcMCnSTuBpcAlRickacuFnoDi+S3QZ1Ub0rtDFP+fjb/ AHfV7jIsVJUuiWcKFrLLWFrR3lGC0Z7AB/w/EE1a8SiDfDC/dgXzZTP6j40aWL4c aYOQZI4zmrqiajEIjTOk1lV/+yp8CD+qkQ3F5WHAUi/vRTI8UiCYGw6UgsfLyi5s TE4c35HWgQs4HOmcYuzYV+7TWQ0+cwodGqom0M8As28W+/G0kw7VkmyHJw0F28Bh 2UlOETpUzKv+k+xwa17+FcT897uLGnE97N9g96BoO9EuTramBGTzKShRezC5M9Dj 7/ie8v0IY6UWasSFncT39g8P//oz/Xo5KnlPNUPYBU0Vt9aAQUCJ+O75rgPXWcYn n1qmauBiCQBv4j8JkHLxpiZEYSSBulE7/DoWt+U7A5OJQmrchi9vW2QSWPWuax3c 1DwOmo5S4M0mPveL+2v28kLfioL4qov1aEYtO/6xshGMzrCm4OQ= =yGiB -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux into next/drivers This pull request contains Broadcom ARM/ARM64/MIPS SoCs drivers changes for 4.21, please pull the following changes: - James fixes the firmware interface after a commit changed the use of VLA and broke large transfers - Stefan adds a timeout check for Raspberry Pi firmware transactions and updates a bunch of SoC/firmware files to use SPDX tags - Wolfram switches the GISB bus arbiter to use dev_get_drvdata() - Yangtao provides a fix for a reference leak due to a call to of_find_node_by_path() - Florian fixes the CPU re-entry point out of S3 suspend with kernels built in Thumb2 mode * tag 'arm-soc/for-4.21/drivers' of https://github.com/Broadcom/stblinux: soc: bcm: brcmstb: Don't leak device tree node reference firmware: raspberrypi: Switch to SPDX identifier firmware: raspberrypi: Fix firmware calls with large buffers soc: bcm: Switch raspberrypi-power to SPDX identifier firmware: raspberrypi: Define timeout for transactions bus: brcmstb_gisb: simplify getting .driver_data soc: bcm: brcmstb: Fix re-entry point with a THUMB2_KERNEL Signed-off-by: Olof Johansson <olof@lixom.net>	2018-12-03 13:06:27 -08:00
A.s. Dong	eb299e4d57	dt-bindings: clock: add imx7ulp clock binding doc ... i.MX7ULP Clock functions are under joint control of the System Clock Generation (SCG) modules, Peripheral Clock Control (PCC) modules, and Core Mode Controller (CMC)1 blocks Note IMX7ULP has two clock domains: M4 and A7. This binding doc is only for A7 clock domain. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-03 11:31:36 -08:00
Dhaval Shah	83268fa6b4	media: xilinx: Use SPDX-License-Identifier ... SPDX-License-Identifier is used for the Xilinx Video IP and related drivers. [Added drivers/media/platform/xilinx/Kconfig] [Added drivers/media/platform/xilinx/Makefile] [Added include/dt-bindings/media/xilinx-vip.h] Signed-off-by: Dhaval Shah <dhaval23031987@gmail.com> Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>	2018-12-03 13:40:05 -05:00
Lucas Stach	1cf3817bf1	dt-bindings: Add binding for i.MX8MQ CCM ... This adds the binding for the i.MX8MQ Clock Controller Module. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-03 10:12:50 -08:00
Taniya Das	8ff1a156cb	dt-bindings: clock: Introduce QCOM LPASS clock bindings ... Add device tree bindings for Low Power Audio subsystem clock controller for Qualcomm Technology Inc's SDM845 SoCs. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-12-03 09:25:01 -08:00
Geert Uytterhoeven	160bfa7c72	soc: renesas: r8a77980-sysc: Correct A3VIP[012] power domain hierarchy ... The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A3VIP power domain on R-Car V3H to A3VIP0, and clarified the power domain hierarchy for the A3VIP[012] power domains. As the definition for the A3VIP0 domain is not yet used from DT, it can just be renamed. Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions") Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2018-11-30 11:22:30 +01:00
Geert Uytterhoeven	97473bc85b	soc: renesas: r8a77980-sysc: Correct names of A2DP[01] power domains ... The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A2PD0 and A2DP0 power domains on R-Car V3H to A2DP0 resp. A2DP1. As these definitions are not yet used from DT, they can just be renamed. Fixes: 7755b40d07 ("dt-bindings: power: add R8A77980 SYSC power domain definitions") Fixes: 41d6d8bd8a ("soc: renesas: rcar-sysc: add R8A77980 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2018-11-30 11:22:30 +01:00
Geert Uytterhoeven	b5eb730e03	soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains ... The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) renamed the A2IR2 and A2IR3 power domains on R-Car V3M to A2DP resp. A2CN. As these definitions are not yet used from DT, they can just be renamed. While at it, fix the indentation of the A3IR definition. Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions") Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2018-11-30 11:22:30 +01:00
Geert Uytterhoeven	da3e1c57ca	soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain ... The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Feb 28, 2018) removed the CR7 power domain on R-Car V3M, as this SoC does not have an ARM Cortex-R7 Realtime Core. As this definition was never used from DT, it can just be removed. Fixes: 833bdb47c8 ("dt-bindings: power: add R8A77970 SYSC power domain definitions") Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>	2018-11-30 11:22:29 +01:00
Ryder Lee	3b5e748615	clk: mediatek: add clock support for MT7629 SoC ... Add all supported clocks exported from every susbystem found on MT7629 SoC. Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-11-29 22:52:05 -08:00
Amit Nischal	e431c92188	dt-bindings: clock: Introduce QCOM Graphics clock bindings ... Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SDM845 SoCs. Signed-off-by: Amit Nischal <anischal@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Add input clocks property] Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-11-27 16:24:44 -08:00
Thierry Reding	34e8b809bf	dt-bindings: thermal: tegra-bpmp: Add Tegra194 support ... The thermal controller implementation on Tegra194 is very similar to the implementation on Tegra186. Add a compatible string for the new generation. Signed-off-by: Thierry Reding <treding@nvidia.com>	2018-11-27 18:41:23 +01:00
Heiko Stuebner	e690d1b0dd	Merge branch 'v4.21-shared/clkids' into v4.21-clk/next	2018-11-26 14:20:55 +01:00
Katsuhiro Suzuki	02bee9e545	clk: rockchip: add clock ID of ACODEC for rk3328 ... This patch adds clock ID of audio CODEC (ACODEC) for rk3328. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de>	2018-11-26 14:20:37 +01:00
Linus Walleij	84d49fff23	pinctrl: sh-pfc: Updates for v4.21 ... - Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W, - Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C, - Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3, - Add QSPI pin groups on R-Car V3M and V3H, - Add VIN and CAN(FD) pin groups on R-Car M3-N, - Add I2C[035] pin groups on R-Car H3 and M3-W, - Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC, - Small cleanups, - Maintainership updates. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCW/fATQAKCRCKwlD9ZEnx cEcRAPoCtfqfL82fb4Yj6zTrwD8dpy2TVpRYT95YRNuPegcWZwEAxpv4bUNVAMQJ Wj6GYkhMTuGBaaUJzNGJclD7u7nJcgc= =YGuc -----END PGP SIGNATURE----- Merge tag 'sh-pfc-for-v4.21-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.21 - Fix VIN (Video IN) versioned groups on R-Car V2H, H3, and M3-W, - Add I2C[0-3], DU1, VIN, QSPI1, and SDHI pin groups on RZ/G1C, - Add audio, SDHI, VIN, HSCIF, and CAN(FD) support on R-Car E3, - Add QSPI pin groups on R-Car V3M and V3H, - Add VIN and CAN(FD) pin groups on R-Car M3-N, - Add I2C[035] pin groups on R-Car H3 and M3-W, - Add pinctrl and GPIO support for the new RZ/A2M (R7S9210) SoC, - Small cleanups, - Maintainership updates.	2018-11-25 23:53:01 +01:00
Christian Lamparter	538098281c	dt-bindings: dmaengine: dw-dmac: add protection control property ... This patch for the DesignWare AHB Central Direct Memory Access Controller adds the dma protection control property: "snps,dma-protection-control" as well as the properties specific values defines into a new include file: include/dt-bindings/dma/dw-dmac.h Note: The protection control signals are one-to-one mapped to the AHB HPROT[1:3] signals for this controller. The HPROT0 (Data Access) is always hardwired to 1. Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Signed-off-by: Vinod Koul <vkoul@kernel.org>	2018-11-24 20:07:22 +05:30
Neil Armstrong	f95e6ca628	dt-bindings: clk: meson-gxbb: Add Video clock bindings ... Add the video clock bindings covering all the video graphics pipeline and the HDMI controller. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: http://lkml.kernel.org/r/1541516257-16157-4-git-send-email-narmstrong@baylibre.com	2018-11-23 15:11:56 +01:00
Martin Blumenstingl	8e1dd17c8b	dt-bindings: clock: meson8b: export the CPU post dividers ... There are four CPU clock post dividers: - ABP - PERIPH (used as input for the ARM global timer and ARM TWD timer) - AXI - L2 DRAM Export these so we can use them in .dts files. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lkml.kernel.org/r/20181122214017.25643-2-martin.blumenstingl@googlemail.com	2018-11-23 15:11:55 +01:00
Chris Brandt	94693b7b83	dt-bindings: pinctrl: Add RZ/A2 pinctrl and GPIO ... Add device tree binding documentation and header file for Renesas R7S9210 (RZ/A2) SoCs. Signed-off-by: Chris Brandt <chris.brandt@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>	2018-11-23 09:29:24 +01:00
Katsuhiro Suzuki	df7b1f2e0a	clk: rockchip: fix ID of 8ch clock of I2S1 for rk3328 ... This patch fixes mistakes in HCLK_I2S1_8CH for running I2S1 successfully. Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de>	2018-11-19 14:42:04 +01:00
Stefan Wahren	a62c36775b	pinctrl: bcm2835: Switch to SPDX identifier ... Adopt the SPDX license identifier headers to ease license compliance management. Cc: Simon Arlott <simon@arlott.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2018-11-16 23:13:03 +01:00
Lubomir Rintel	e8a2c77914	dt-bindings: marvell,mmp2: Add clock id for the SP clock ... This is the clock for the "security processor" core. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>	2018-11-15 11:14:35 -08:00
Manivannan Sadhasivam	95d2f00657	dt-bindings: pinctrl: Add devicetree bindings for MT6797 SoC Pinctrl ... Add devicetree bindings for Mediatek MT6797 SoC Pin Controller. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2018-11-15 11:03:56 +01:00
Stefan Wahren	e1098e5915	clk: bcm2835: Switch to SPDX identifier ... Adopt the SPDX license identifier headers to ease license compliance management. Cc: Simon Arlott <simon@arlott.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-11-14 14:42:45 -08:00
Stefan Wahren	bb661b7088	soc: bcm: Switch raspberrypi-power to SPDX identifier ... Adopt the SPDX license identifier headers to ease license compliance management. Cc: Alexander Aring <aring@mojatatu.com> Cc: Eric Anholt <eric@anholt.net> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Reviewed-by: Eric Anholt <eric@anholt.net>	2018-11-14 21:04:47 +01:00
A.s. Dong	d4ea45e8a6	dt-bindings: imx: add scu resource id headfile ... SCU firmware uses resource id to provide services. Every device on a SCU based system has a resource id. Exported it in device tree to allow service bindings to use it. e.g. power domain. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>	2018-11-14 09:20:34 +08:00
Taniya Das	eaeee28db2	clk: qcom: smd: Add support for QCS404 rpm clocks ... Add rpm smd clocks, PMIC and bus clocks which are required on QCS404 for clients to vote on. Signed-off-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> [bjorn: Dropped cxo, voter clocks and static initialization] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-11-06 09:47:37 -08:00
Jernej Skrabec	b9f9e9b8e4	dt-bindings: clock: sun8i-de2: Add H6 DE3 clock description ... This commit adds necessary description and dt includes for H6 DE3 clock. It is very similar to others, but memory region has some additional registers not found in DE2. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>	2018-11-05 10:22:02 +01:00
Heiko Stuebner	2e99be2874	dt-bindings: add power-domain header for RK3066 SoCs ... Add rk3066 power-domains as described by the TRM. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Rob Herring <robh@kernel.org>	2018-11-05 09:39:29 +01:00
Heiko Stuebner	a9beb0a21c	dt-bindings: add power-domain header for RK3188 SoCs ... Add rk3188 power-domains as described by the TRM. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Rob Herring <robh@kernel.org>	2018-11-05 09:39:26 +01:00
A.s. Dong	623f788d0e	pinctrl: imx: add imx8qxp driver ... MX8QXP contains a system controller that is responsible for controlling the pad setting of the IPs that are present. Communication between the host processor running an OS and the system controller happens through a SCU protocol. This patch adds the SCU based MX8QXP pinctrl driver. Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Pengutronix Kernel Team <kernel@pengutronix.de> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2018-11-05 09:33:32 +01:00
Linus Torvalds	519f64bf15	This time it looks like a quieter release cycle in the clk tree. I guess that's ... because of summer time holidays/vacations. The biggest change in the diffstat is in the Qualcomm clk driver, where they got support for CPUs and handful of SoCs. After that, the at91 driver got a major rewrite for newer DT bindings that should make things easier going forward and the TI code moved to a clockdomain based design. The long tail is mostly small driver updates for newer clks and some simpler SoC clock drivers such as the Hisilicon and imx support. In the core framework, we only have two small changes this time. One is a new clk API to get all clks for a device with the bulk clk APIs. This allows drivers that don't care about doing anything besides turning on all the clks to just clk_get() them all and turn them on. The other change is the beginning of a way to support save and restore of clk settings in the clk framework. TI is the only user right now, but we will want to expand upon this design in the future to support more save and restore of clk registers. At least this gets us started and works well enough for one SoC, but there's more work in the future. Core: - clk_bulk_get_all() API and friends to get all the clks for a device - Basic clk state save/restore hooks New Drivers: - Renesas RZ/A2 (R7S9210) SoC, including early clocks - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs - Rensas RZ/G2M (r8a774a1) SoC - Qualcomm Krait CPU clk support - Qualcomm QCS404 GCC support - Qualcomm SDM660 GCC support - Qualcomm SDM845 camera clock controller - Ingenic jz4725b CGU - Hisilicon 3670 SoC support - TI SCI clks on K3 SoCs - iMX6 MMDC clks - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs Updates: - Rework at91 PMC clock driver for new DT bindings - Nvidia Tegra clk driver MBIST workaround fix - S2RAM support for Marvell mvebu periph clks - Use updated printk format for OF node names - Fix TI code to only search DT subnodes - Various static analysis finds - Tag various drivers with SPDX license tags - Support dynamic frequency switching (DFS) on qcom SDM845 GCC - Only use s2mps11 dt-binding defines instead of redefining them in the driver - Add some more missing clks to qcom MSM8996 GCC - Quad SPI clks on qcom SDM845 - Add support for CMT timer clocks on R-Car V3H - Add support for SHDI and various timer clocks on R-Car V3M - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs - Amlogic clk-pll driver improvements and updates - Amlogic axg audio controller system clocks - Register Amlogic meson8b clock controller early - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC - Remove obsoleted Exynos4212 ISP clock definitions - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design - TI RTC+DDR sleep mode support for clock save/restore - Allwinner A64 display engine support and fixes - Allwinner A83t display engine support and fixes -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAlvY4ysRHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSVaDBAA3Wv/rsCn4FJ2ZgIWYWQqr69lAWDcBVVe 4nNbFqzEmRoml8e+XOfVFwnbsai4B5ALVxyMnRlkDyxQ5TFQtF957U12Pf8upPa5 R447YBt4tw40NCj8u5KNAaBmYYHdmXXDvsBPXyQn+1iy/9R8Is8AcDmv+D2ucuJF PPBXOwb+2CstUQhuwlXyvsAw/tqq/rJDVyAZVJUoqXJwlNMjr76V0m0ZXHN6NcyC F2SfnzIO4srRteTeKXVFcMU/3uHC3zofEfammSJjGZkk4WHULuPpkD17RMEyBul1 Ju1S1nzGiKvYME/mmbIcRPNcpry65EVo/wn6IjAcG2m4GaWSq3F6qIttnoc6dnra R2VylIEy7HnNcAf8fkQdkd/l+h/TDp3iVrXg0p/rRxRk4Jlc86n2PWO6jtsZv4S+ NySeRhTb51KrTl72J76LP+dfDWdbeZfkAqr0Qx6QM04OznVYSTHlnQaeM1Nx2SZR 5+k126NdxDp7xgoJNfq18wzufrlefjuRTg2Kck1YuFuhV4Fjmq7ZC81bSSaakYPh /t073TcSZ+VfEYP5hVsl/pjMdFzHcj8pbavhs0UNIYLQNXe494Bm9PyYJOzQKnwz Zpbf7V6eplh8J1I03VI8RHviNp340iv2hhz9vp4mNP1vIhgdNiz7R2gn5sLSoFt+ vei0J0vEzCA= =V5aK -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This time it looks like a quieter release cycle in the clk tree. I guess that's because of summer time holidays/vacations. The biggest change in the diffstat is in the Qualcomm clk driver, where they got support for CPUs and handful of SoCs. After that, the at91 driver got a major rewrite for newer DT bindings that should make things easier going forward and the TI code moved to a clockdomain based design. The long tail is mostly small driver updates for newer clks and some simpler SoC clock drivers such as the Hisilicon and imx support. In the core framework, we only have two small changes this time. One is a new clk API to get all clks for a device with the bulk clk APIs. This allows drivers that don't care about doing anything besides turning on all the clks to just clk_get() them all and turn them on. The other change is the beginning of a way to support save and restore of clk settings in the clk framework. TI is the only user right now, but we will want to expand upon this design in the future to support more save and restore of clk registers. At least this gets us started and works well enough for one SoC, but there's more work in the future. Core: - clk_bulk_get_all() API and friends to get all the clks for a device - Basic clk state save/restore hooks New Drivers: - Renesas RZ/A2 (R7S9210) SoC, including early clocks - Rensas RZ/G1N (R8A7744) and RZ/G2E (R8A774C0) SoCs - Rensas RZ/G2M (r8a774a1) SoC - Qualcomm Krait CPU clk support - Qualcomm QCS404 GCC support - Qualcomm SDM660 GCC support - Qualcomm SDM845 camera clock controller - Ingenic jz4725b CGU - Hisilicon 3670 SoC support - TI SCI clks on K3 SoCs - iMX6 MMDC clks - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs Updates: - Rework at91 PMC clock driver for new DT bindings - Nvidia Tegra clk driver MBIST workaround fix - S2RAM support for Marvell mvebu periph clks - Use updated printk format for OF node names - Fix TI code to only search DT subnodes - Various static analysis finds - Tag various drivers with SPDX license tags - Support dynamic frequency switching (DFS) on qcom SDM845 GCC - Only use s2mps11 dt-binding defines instead of redefining them in the driver - Add some more missing clks to qcom MSM8996 GCC - Quad SPI clks on qcom SDM845 - Add support for CMT timer clocks on R-Car V3H - Add support for SHDI and various timer clocks on R-Car V3M - Improve OSC and RCLK (watchdog) handling on R-Car Gen3 SoCs - Amlogic clk-pll driver improvements and updates - Amlogic axg audio controller system clocks - Register Amlogic meson8b clock controller early - Add support for SATA and Fine Display Processor (FDP) clocks on R-Car M3-N - Consolidation of system suspend related code in Exynos, S5P, S3C SoC clk drivers - Fixes for system suspend support on Exynos542x (Odroid boards) and Exynos5433 SoC - Remove obsoleted Exynos4212 ISP clock definitions - Migrated TI am3/4/5 and dra7 SoCs to clockdomain based design - TI RTC+DDR sleep mode support for clock save/restore - Allwinner A64 display engine support and fixes - Allwinner A83t display engine support and fixes" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (186 commits) clk: qcom: Remove unused arrays in SDM845 GCC clk: fixed-rate: fix of_node_get-put imbalance clk: s2mps11: Add used attribute to s2mps11_dt_match clk: qcom: gcc-sdm660: Add MODULE_LICENSE clk: qcom: Add safe switch hook for krait mux clocks dt-bindings: clock: Document qcom,krait-cc clk: qcom: Add Krait clock controller driver dt-bindings: arm: Document qcom,kpss-gcc clk: qcom: Add KPSS ACC/GCC driver clk: qcom: Add support for Krait clocks clk: qcom: Add IPQ806X's HFPLLs clk: qcom: Add MSM8960/APQ8064's HFPLLs dt-bindings: clock: Document qcom,hfpll clk: qcom: Add HFPLL driver clk: qcom: Add support for High-Frequency PLLs (HFPLLs) ARM: Add Krait L2 register accessor functions clk: imx6q: add mmdc0 ipg clock clk: imx6sl: add mmdc ipg clocks clk: imx6sll: add mmdc1 ipg clock clk: imx6sx: add mmdc1 ipg clock ...	2018-10-31 11:08:30 -07:00
Linus Torvalds	b22b6beae6	ARM: SoC driver updates for 4.17 ... The most noteworthy SoC driver changes this time include: - The TEE subsystem gains an in-kernel interface to access the TEE from device drivers. - The reset controller subsystem gains a driver for the Qualcomm Snapdragon 845 Power Domain Controller. - The Xilinx Zynq platform now has a firmware interface for its platform management unit. This contains a firmware "ioctl" interface that was a little controversial at first, but the version we merged solved that by not exposing arbitrary firmware calls to user space. - The Amlogic Meson platform gains a "canvas" driver that is used for video processing and shared between different high-level drivers. The rest is more of the usual, mostly related to SoC specific power management support and core drivers in drivers/soc: - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new features related to power and reset control. - The Mediatek mt8183 and mt6765 SoC platforms gain support for their respective power management chips. - A new driver for NXP i.MX8, which need a firmware interface for power management. - The SCPI firmware interface now contains support estimating power usage of performance states - The NVIDIA Tegra "pmc" driver gains a few new features, in particular a pinctrl interface for configuring the pads. - Lots of small changes for Qualcomm, in particular the "smem" device driver. - Some cleanups for the TI OMAP series related to their sysc controller. Additional cleanups and bugfixes in SoC specific drivers include the Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJb1zEhAAoJEGCrR//JCVInnYQP/1pPXWsR/DV4COf4kGJFSAFn EfHXJM1vKtb7AWl6SClpHFlUMt+fvL+dzDNJ9aeRr2GjcuWfzKDcrBM1ZvM70I31 C1Oc3b6OXEERCozDpRg/Vt8OpIvvWnVpaVffS9E5y6KqF8KZ0UbpWIxUJ87ik44D UvNXYOU/LUGPxR1UFm5rm2zWF4i+rBvqnpVaXbeOsXsLElzxXVfv2ymhhqIpo2ws o6e00DSjUImg8hLL4HCGFs2EX1KSD+oFzYaOHIE0/DEaiOnxVOpMSRhX2tZ+tRRb DekbjL+wz5gOAKJTQfQ2sNNkOuK8WFqmE5G0RJ0iYPXuNsB/17UNb2bhTJeqGdcD dqCQBLQuDUD2iHJ/d4RK5Kx3a8h2X63n5bdefgF5UX/2RBpXwFk1QtHr8X0DuY8c o/dPGFNBOn3egzMyXrD5VEtnaTwK1Y6/h09qfuOOF1ZuYDmELKRkWMV9l8dIsvd8 ANjaw5B8MOUAf8DccBmPgUGu0XLCDyuFGqNVd9Kj5u3az+tyggIsgkEjWg1pxTv0 7dDDyv4Ara1V1HVDZ23l3CgmYCZQx2R/vdpX/DjuDPGEHGjZ5s2TW8P6oegdxtIh LcTonNoTsRYzMrGD/aqhG/8fYsAScXePa3CLKl1Hrl+wFVV0XcaggH23GwD/k+7S eDBrEzLkOTxM+WXvsvKY =c/PQ -----END PGP SIGNATURE----- Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "The most noteworthy SoC driver changes this time include: - The TEE subsystem gains an in-kernel interface to access the TEE from device drivers. - The reset controller subsystem gains a driver for the Qualcomm Snapdragon 845 Power Domain Controller. - The Xilinx Zynq platform now has a firmware interface for its platform management unit. This contains a firmware "ioctl" interface that was a little controversial at first, but the version we merged solved that by not exposing arbitrary firmware calls to user space. - The Amlogic Meson platform gains a "canvas" driver that is used for video processing and shared between different high-level drivers. The rest is more of the usual, mostly related to SoC specific power management support and core drivers in drivers/soc: - Several Renesas SoCs (RZ/G1N, RZ/G2M, R-Car V3M, RZ/A2M) gain new features related to power and reset control. - The Mediatek mt8183 and mt6765 SoC platforms gain support for their respective power management chips. - A new driver for NXP i.MX8, which need a firmware interface for power management. - The SCPI firmware interface now contains support estimating power usage of performance states - The NVIDIA Tegra "pmc" driver gains a few new features, in particular a pinctrl interface for configuring the pads. - Lots of small changes for Qualcomm, in particular the "smem" device driver. - Some cleanups for the TI OMAP series related to their sysc controller. Additional cleanups and bugfixes in SoC specific drivers include the Meson, Keystone, NXP, AT91, Sunxi, Actions, and Tegra platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (129 commits) firmware: tegra: bpmp: Implement suspend/resume support drivers: clk: Add ZynqMP clock driver dt-bindings: clock: Add bindings for ZynqMP clock driver firmware: xilinx: Add zynqmp IOCTL API for device control Documentation: xilinx: Add documentation for eemi APIs MAINTAINERS: imx: include drivers/firmware/imx path firmware: imx: add misc svc support firmware: imx: add SCU firmware driver support reset: Fix potential use-after-free in __of_reset_control_get() dt-bindings: arm: fsl: add scu binding doc soc: fsl: qbman: add interrupt coalesce changing APIs soc: fsl: bman_portals: defer probe after bman's probe soc: fsl: qbman: Use last response to determine valid bit soc: fsl: qbman: Add 64 bit DMA addressing requirement to QBMan soc: fsl: qbman: replace CPU 0 with any online CPU in hotplug handlers soc: fsl: qbman: Check if CPU is offline when initializing portals reset: qcom: PDC Global (Power Domain Controller) reset controller dt-bindings: reset: Add PDC Global binding for SDM845 SoCs reset: Grammar s/more then once/more than once/ bus: ti-sysc: Just use SET_NOIRQ_SYSTEM_SLEEP_PM_OPS ...	2018-10-29 15:16:01 -07:00
Linus Torvalds	93335e5911	ARM: SoC device tree updates for 4.20 ... There are close to 800 indivudal changesets in this branch again, which feels like a lot. There are particularly many changes for the NVIDIA Tegra platform this time, in fact more than it has seen in the two years since the v4.9 merge window. Aside from this, it's been fairly normal, with lots of changes going into Renesas R-CAR, NXP i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP. Most of the changes are for adding new features into existing boards, for brevity I'm only mentioning completely new machines and SoCs here. For the first time I think we have (slightly) more new 64-bit hardware than 32-bit: Two boards get added for TI OMAP: Moxa UC-2101 is an industrial computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a minor variation of the motherboards of the GTA04 phone, see https://shop.goldelico.com/wiki.php?page=GTA04A5 Clearfog is a nice little board for quad-core Marvell Armada 8040 network processor, see https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/ Two additional server boards come with the Aspeed baseboard management controllers: Stardragon4800 is an arm64 reference platform made by HXT (based on Qualcomm's server chips), and TiogaPass is an Open Compute mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the BMC. NXP i.MX usually sees a lot of new boards each release. This time there we only add one minor variant: ConnectCore 6UL SBC Pro uses the same SoM design as the ConnectCore 6UL SBC Express added later. However, there is a new chip, the i.MX6ULZ, which is an even smaller variant of the i.MX6ULL, with features removed. There is also support for the reference board design, the i.MX6ULZ 14x14 EVK. A new Raspberry Pi variant gets added, this one is the CM3 compute module based on bcm2837, it was launched in early 2017 but only now added to the kernel, both as 32-bit and as 64-bit files, as we tend to do for Raspberry Pi. On the Allwinner side, everything is again about cheap development boards, usually of the "Fruit Pi" variety. The new ones this time are: Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/ Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/ Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html The last one of these is now a 64-bit version of the earlier Banana Pi M2+ H3, with the same board layout. Similarly, for Rockchips, get get another variant of the 32-bit Asus Tinker board, the model 'S' based on rk3288, and three now boards based on the popular RK3399 chip: ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/ Rock960: https://www.96boards.org/product/rock960/ RockPro64: https://www.pine64.org/?page_id=61454 These are all quite powerful boards with lots of RAM and I/O, and the RK3399 is the same chip used in several Chromebooks. Finally, we get support for the PX30 (aka rk3326) chip, which is based on the low-end 64-bit Cortex-A35 CPU core. So far, only the evaluation board is supported. One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is based on the MT7622 WiFi router platform, and the first product I've seen with a 64-bit Mediatek chip in that market: http://www.banana-pi.org/r64.html For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370 development board, which are similar to the Hi3660 and Hikey 360 respectively, but add support for an NPU. Amlogic gets initial support for the Meson-G12A chip (S905D2), another quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit side, we gain support for an actual end-user product, the Endless Computers Endless Mini based on Meson8b (S805), see https://endlessos.com/computers/ Qualcomm adds support for their MSM8998 SoC and evaluation platform. This chip is commonly known as the Snapdragon 835, and is used in high-end phones as well as low-end laptops. For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added, but no boards for this one. However, we do add boards for the previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the M3NULCB Starter Kit Pro. While we have lots of DT changes for NVIDIA to update the existing files, the only board that gets added is the Toradex Colibri T20 on Colibri Evaluation Board for the old Tegra2. Synaptics add support for their AS370 SoC, which is part of the (formerly Marvell) Berlin line of set-top-box chips used e.g. in the various Google Chromecast. Only the .dtsi gets added at this point, no actual machines. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJb1224AAoJEGCrR//JCVIn9uYP/jLMoGkVQRS5L9sRjOci1l5b EHl8veJ+uNJaTStp5XAZk90MoBcSdXtnISSEiR7a3qKJw1mYfgAWyPtQCttRFUCo rDp4GJpJ96TBg1tyt5Lop3V9eIYbCh9epf2foKTTdpRiX022AFk1031jvnh2Teuy fKA2VNeoyyOZqxh0ysJq7G8kWt8PTQTKXDebYPWEbsu0AFmqQ84lz7oGNdPk0GPm krtQIO6rh+sJR/8wWGYfnTYAIOk6jNrPhiyjEcyu+x2525rwKxJNKVY8P9PuNhrl hzqld1dPtb3gfdcxWxZUznHmVUGkVEIa1QNC6csSmLzuxqJJE0/J5u2P8lIfrhVI c5C8r3eaTxFM0s5uKhNhhewlJ6uiDhUQy13AG0JXteujP23BGObYstnV10pJrH75 xq7uSUiU04v95MocPjodJ2I7dIlAoFCd6ELnsmD/mz743gY9AZ6DHaOBMMwIzK3H EQifF5E/4PWOjBx7fonumBm0LebPjWGmv4CNyCK5Q93ylK7U/kFDdjiNjNhyks5E CVQBFhA7sshKJQRDOiaofMxOfKJHeKGU2PR7yGRpT3YWQD/apIL/elG4qUNjLX46 2Dwdgq8nDdbY2SzPwwy7ncTtyDRYcsFCtScT5slu1I1UxIhwEYJurzCKDM4jJNZb Cg2D7a+AlZ8N5Vsr1ldV =yaED -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device tree updates from Arnd Bergmann: "There are close to 800 indivudal changesets in this branch again, which feels like a lot. There are particularly many changes for the NVIDIA Tegra platform this time, in fact more than it has seen in the two years since the v4.9 merge window. Aside from this, it's been fairly normal, with lots of changes going into Renesas R-CAR, NXP i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP. Most of the changes are for adding new features into existing boards, for brevity I'm only mentioning completely new machines and SoCs here. For the first time I think we have (slightly) more new 64-bit hardware than 32-bit: Two boards get added for TI OMAP: Moxa UC-2101 is an industrial computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a minor variation of the motherboards of the GTA04 phone, see https://shop.goldelico.com/wiki.php?page=GTA04A5 Clearfog is a nice little board for quad-core Marvell Armada 8040 network processor, see https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/ Two additional server boards come with the Aspeed baseboard management controllers: Stardragon4800 is an arm64 reference platform made by HXT (based on Qualcomm's server chips), and TiogaPass is an Open Compute mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the BMC. NXP i.MX usually sees a lot of new boards each release. This time there we only add one minor variant: ConnectCore 6UL SBC Pro uses the same SoM design as the ConnectCore 6UL SBC Express added later. However, there is a new chip, the i.MX6ULZ, which is an even smaller variant of the i.MX6ULL, with features removed. There is also support for the reference board design, the i.MX6ULZ 14x14 EVK. A new Raspberry Pi variant gets added, this one is the CM3 compute module based on bcm2837, it was launched in early 2017 but only now added to the kernel, both as 32-bit and as 64-bit files, as we tend to do for Raspberry Pi. On the Allwinner side, everything is again about cheap development boards, usually of the "Fruit Pi" variety. The new ones this time are: - Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/ - Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/ - Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts - Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html The last one of these is now a 64-bit version of the earlier Banana Pi M2+ H3, with the same board layout. Similarly, for Rockchips, get get another variant of the 32-bit Asus Tinker board, the model 'S' based on rk3288, and three now boards based on the popular RK3399 chip: - ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/ - Rock960: https://www.96boards.org/product/rock960/ - RockPro64: https://www.pine64.org/?page_id=61454 These are all quite powerful boards with lots of RAM and I/O, and the RK3399 is the same chip used in several Chromebooks. Finally, we get support for the PX30 (aka rk3326) chip, which is based on the low-end 64-bit Cortex-A35 CPU core. So far, only the evaluation board is supported. One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is based on the MT7622 WiFi router platform, and the first product I've seen with a 64-bit Mediatek chip in that market: http://www.banana-pi.org/r64.html For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370 development board, which are similar to the Hi3660 and Hikey 360 respectively, but add support for an NPU. Amlogic gets initial support for the Meson-G12A chip (S905D2), another quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit side, we gain support for an actual end-user product, the Endless Computers Endless Mini based on Meson8b (S805), see https://endlessos.com/computers/ Qualcomm adds support for their MSM8998 SoC and evaluation platform. This chip is commonly known as the Snapdragon 835, and is used in high-end phones as well as low-end laptops. For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added, but no boards for this one. However, we do add boards for the previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the M3NULCB Starter Kit Pro. While we have lots of DT changes for NVIDIA to update the existing files, the only board that gets added is the Toradex Colibri T20 on Colibri Evaluation Board for the old Tegra2. Synaptics add support for their AS370 SoC, which is part of the (formerly Marvell) Berlin line of set-top-box chips used e.g. in the various Google Chromecast. Only the .dtsi gets added at this point, no actual machines" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (721 commits) ARM: dts: socfgpa: remove ethernet aliases from dtsi arm64: dts: stratix10: add ethernet aliases dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI dt-bindings: mediatek: Add JPEG Decoder binding for MT7623 dt-bindings: iommu: mediatek: Add binding for MT7623 dt-bindings: clock: mediatek: add support for MT7623 ARM: dts: mvebu: armada-385-db-88f6820-amc: auto-detect nand ECC properites ARM: dts: da850-lego-ev3: slow down A/DC as much as possible ARM: dts: da850-evm: Enable tca6416 on baseboard arm64: dts: uniphier: Add USB2 PHY nodes arm64: dts: uniphier: Add USB3 controller nodes ARM: dts: uniphier: Add USB2 PHY nodes ARM: dts: uniphier: Add USB3 controller nodes arm64: dts: meson-axg: s400: disable emmc arm64: dts: meson-axg: s400: add missing emmc pwrseq arm64: dts: clearfog-gt-8k: add PCIe slot description ARM: dts: at91: sama5d4_xplained: even nand memory partitions ARM: dts: at91: sama5d3_xplained: even nand memory partitions ARM: dts: at91: at91sam9x5cm: even nand memory partitions ARM: dts: at91: sama5d2_ptc_ek: fix bootloader env offsets ...	2018-10-29 15:05:20 -07:00
Linus Torvalds	738b04fba1	Staging/IIO patches for 4.20-rc1 ... Here is the big staging and IIO driver pull request for 4.20-rc1. There are lots of things here, we ended up adding more lines than removing, thanks to a large influx of Comedi National Instrument device support. Someday soon we need to get comedi out of staging... Other than the comedi drivers, the "big" things here are: - new iio drivers - delete dgnc driver (no one used it and no one had the hardware anymore) - vbox driver updates and fixes - erofs fixes - tons and tons of tiny checkpatch fixes for almost all staging drivers All of these have been in linux-next, with the last few happening a bit "late" due to them getting stuck on my laptop during travel to the Mantainers summit. When merging with your tree, there will be 2 merge conflicts, both files will be simple to resolve, just delete them :) Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCW9bSGA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+yk5eACfYp73m9tLO22rnBcXJ73bWAYSTOMAn2GEL4Nc LZBXs8QvvJIwfqmi7ofn =UWJn -----END PGP SIGNATURE----- Merge tag 'staging-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging/IIO driver updates from Greg KH: "Here is the big staging and IIO driver pull request for 4.20-rc1. There are lots of things here, we ended up adding more lines than removing, thanks to a large influx of Comedi National Instrument device support. Someday soon we need to get comedi out of staging... Other than the comedi drivers, the "big" things here are: - new iio drivers - delete dgnc driver (no one used it and no one had the hardware anymore) - vbox driver updates and fixes - erofs fixes - tons and tons of tiny checkpatch fixes for almost all staging drivers All of these have been in linux-next, with the last few happening a bit "late" due to them getting stuck on my laptop during travel to the Mantainers summit" * tag 'staging-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (690 commits) staging: gasket: Fix sparse "incorrect type in assignment" warnings. staging: gasket: remove debug logs for callback invocation staging: gasket: remove debug logs in page table mapping calls staging: rtl8188eu: core: Use sizeof(*p) instead of sizeof(struct P) for memory allocation staging: ks7010: Remove extra blank line staging: gasket: Remove extra blank line staging: media: davinci_vpfe: Fix spelling mistake in enum staging: speakup: Add a pair of braces staging: wlan-ng: Replace long int with long staging: MAINTAINERS: remove obsolete IPX staging directory staging: MAINTAINERS: remove NCP filesystem entry staging: rtl8188eu: cleanup comparsions to false staging: gasket: Update device virtual address comment staging: gasket: sysfs: fix attribute release comment staging: gasket: apex: fix sysfs_show staging: gasket: page_table: simplify gasket_components_to_dev_address staging: gasket: page_table: fix comment in components_to_dev_address staging: gasket: page table: fixup error path allocating coherent mem staging: gasket: page_table: rearrange gasket_page_table_entry staging: gasket: page_table: remove unnecessary PTE status set to free ...	2018-10-29 10:38:10 -07:00
Linus Torvalds	b27186abb3	Devicetree updates for 4.20: ... - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4 - Work to get rid of direct accesses to struct device_node name and type pointers in preparation for removing them. New helpers for parsing DT cpu nodes and conversions to use the helpers. printk conversions to %pOFn for printing DT node names. Most went thru subystem trees, so this is the remainder. - Fixes to DT child node lookups to actually be restricted to child nodes instead of treewide. - Refactoring of dtb targets out of arch code. This makes the support more uniform and enables building all dtbs on c6x, microblaze, and powerpc. - Various DT binding updates for Renesas r8a7744 SoC - Vendor prefixes for Facebook, OLPC - Restructuring of some ARM binding docs moving some peripheral bindings out of board/SoC binding files - New "secure-chosen" binding for secure world settings on ARM - Dual licensing of 2 DT IRQ binding headers -----BEGIN PGP SIGNATURE----- iQJEBAABCgAuFiEEktVUI4SxYhzZyEuo+vtdtY28YcMFAlvTKWYQHHJvYmhAa2Vy bmVsLm9yZwAKCRD6+121jbxhw8J5EACMAnrTxWQmXfQXOZEVxztcFavH6LP8mh2e 7FZIZ38jzHXXvl81tAg1nBhzFUU/qtvqW8NDCZ9OBxKvp6PFDNhWu241ZodSB1Kw MZWy2A9QC+qbHYCC+SB5gOT0+Py3v7LNCBa5/TxhbFd35THJM8X0FP7gmcCGX593 9Ml1rqawT4mK5XmCpczT0cXxyC4TgVtpfDWZH2KgJTR/kwXVQlOQOGZ8a1y/wrt7 8TLIe7Qy4SFRzjhwbSta1PUehyYfe4uTSsXIJ84kMvNMxinLXQtvd7t9TfsK8p/R WjYUneJskVjtxVrMQfdV4MxyFL1YEt2mYcr0PMKIWxMCgGDAZsHPoUZmjyh/PrCI uiZtEHn3fXpUZAV/xEHHNirJxYyQfHGiksAT+lPrUXYYLCcZ3ZmqiTEYhGoQAfH5 CQPMuxA6yXxp6bov6zJwZSTZtkXciju8aQRhUhlxIfHTqezmGYeql/bnWd+InNuR upANLZBh6D2jTWzDyobconkCCLlVkSqDoqOx725mMl6hIcdH9d2jVX7hwRf077VI 5i3CyPSJOkSOLSdB8bAPYfBoaDtH2bthxieUrkkSbIjbwHO1H6a2lxPeG/zah0a3 ePMGhi7J84UM4VpJEi000cP+bhPumJtJrG7zxP7ldXdfAF436sQ6KRptlcpLpj5i IwMhUQNH+g== =335v -----END PGP SIGNATURE----- Merge tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull Devicetree updates from Rob Herring: "A bit bigger than normal as I've been busy this cycle. There's a few things with dependencies and a few things subsystem maintainers didn't pick up, so I'm taking them thru my tree. The fixes from Johan didn't get into linux-next, but they've been waiting for some time now and they are what's left of what subsystem maintainers didn't pick up. Summary: - Sync dtc with upstream version v1.4.7-14-gc86da84d30e4 - Work to get rid of direct accesses to struct device_node name and type pointers in preparation for removing them. New helpers for parsing DT cpu nodes and conversions to use the helpers. printk conversions to %pOFn for printing DT node names. Most went thru subystem trees, so this is the remainder. - Fixes to DT child node lookups to actually be restricted to child nodes instead of treewide. - Refactoring of dtb targets out of arch code. This makes the support more uniform and enables building all dtbs on c6x, microblaze, and powerpc. - Various DT binding updates for Renesas r8a7744 SoC - Vendor prefixes for Facebook, OLPC - Restructuring of some ARM binding docs moving some peripheral bindings out of board/SoC binding files - New "secure-chosen" binding for secure world settings on ARM - Dual licensing of 2 DT IRQ binding headers" * tag 'devicetree-for-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits) ARM: dt: relicense two DT binding IRQ headers power: supply: twl4030-charger: fix OF sibling-node lookup NFC: nfcmrvl_uart: fix OF child-node lookup net: stmmac: dwmac-sun8i: fix OF child-node lookup net: bcmgenet: fix OF child-node lookup drm/msm: fix OF child-node lookup drm/mediatek: fix OF sibling-node lookup of: Add missing exports of node name compare functions dt-bindings: Add OLPC vendor prefix dt-bindings: misc: bk4: Add device tree binding for Liebherr's BK4 SPI bus dt-bindings: thermal: samsung: Add SPDX license identifier dt-bindings: clock: samsung: Add SPDX license identifiers dt-bindings: timer: ostm: Add R7S9210 support dt-bindings: phy: rcar-gen2: Add r8a7744 support dt-bindings: can: rcar_can: Add r8a7744 support dt-bindings: timer: renesas, cmt: Document r8a7744 CMT support dt-bindings: watchdog: renesas-wdt: Document r8a7744 support dt-bindings: thermal: rcar: Add device tree support for r8a7744 Documentation: dt: Add binding for /secure-chosen/stdout-path dt-bindings: arm: zte: Move sysctrl bindings to their own doc ...	2018-10-26 12:09:58 -07:00
Linus Torvalds	9703fc8caf	USB/PHY patches for 4.20-rc1 ... Here is the big USB/PHY driver patches for 4.20-rc1 Lots of USB changes in here, primarily in these areas: - typec updates and new drivers - new PHY drivers - dwc2 driver updates and additions (this old core keeps getting added to new devices.) - usbtmc major update based on the industry group coming together and working to add new features and performance to the driver. - USB gadget additions for new features - USB gadget configfs updates - chipidea driver updates - other USB gadget updates - USB serial driver updates - renesas driver updates - xhci driver updates - other tiny USB driver updates All of these have been in linux-next for a while with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCW9LlHw8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymnvwCffYmMWyMG9zSOw1oSzFPl7TVN1hYAoMyJqzLg umyLwWxC9ZWWkrpc3iD8 =ux+Y -----END PGP SIGNATURE----- Merge tag 'usb-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY updates from Greg KH: "Here is the big USB/PHY driver patches for 4.20-rc1 Lots of USB changes in here, primarily in these areas: - typec updates and new drivers - new PHY drivers - dwc2 driver updates and additions (this old core keeps getting added to new devices.) - usbtmc major update based on the industry group coming together and working to add new features and performance to the driver. - USB gadget additions for new features - USB gadget configfs updates - chipidea driver updates - other USB gadget updates - USB serial driver updates - renesas driver updates - xhci driver updates - other tiny USB driver updates All of these have been in linux-next for a while with no reported issues" * tag 'usb-4.20-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (229 commits) usb: phy: ab8500: silence some uninitialized variable warnings usb: xhci: tegra: Add genpd support usb: xhci: tegra: Power-off power-domains on removal usbip:vudc: BUG kmalloc-2048 (Not tainted): Poison overwritten usbip: tools: fix atoi() on non-null terminated string USB: misc: appledisplay: fix backlight update_status return code phy: phy-pxa-usb: add a new driver usb: host: add DT bindings for faraday fotg2 usb: host: ohci-at91: fix request of irq for optional gpio usb/early: remove set but not used variable 'remain_length' usb: typec: Fix copy/paste on typec_set_vconn_role() kerneldoc usb: typec: tcpm: Report back negotiated PPS voltage and current USB: core: remove set but not used variable 'udev' usb: core: fix memory leak on port_dev_path allocation USB: net2280: Remove ->disconnect() callback from net2280_pullup() usb: dwc2: disable power_down on rockchip devices usb: gadget: udc: renesas_usb3: add support for r8a77990 dt-bindings: usb: renesas_usb3: add bindings for r8a77990 usb: gadget: udc: renesas_usb3: Add r8a774a1 support USB: serial: cypress_m8: remove set but not used variable 'iflag' ...	2018-10-26 08:14:13 -07:00
Stephen Warren	d061864b89	ARM: dt: relicense two DT binding IRQ headers ... Files in include/dt-bindings/ may be useful to any OS that uses DT, when building the OS binary itself, not just when building DTB files. Since some OSs are not GPL, they need non-GPL headers. This change relicenses two of the useful files so that they can be used under the MIT license when desired. I wrote these files and NVIDIA legal has approved this change. Geert also ack'd the change; he fixed some spelling issues in the comments. Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>	2018-10-26 07:46:32 -05:00
Linus Torvalds	bd6bf7c104	pci-v4.20-changes ... -----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAlvPV7IUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vyaUg//WnCaRIu2oKOp8c/bplZJDW5eT10d oYAN9qeyptU9RYrg4KBNbZL9UKGFTk3AoN5AUjrk8njxc/dY2ra/79esOvZyyYQy qLXBvrXKg3yZnlNlnyBneGSnUVwv/kl2hZS+kmYby2YOa8AH/mhU0FIFvsnfRK2I XvwABFm2ZYvXCqh3e5HXaHhOsR88NQ9In0AXVC7zHGqv1r/bMVn2YzPZHL/zzMrF mS79tdBTH+shSvchH9zvfgIs+UEKvvjEJsG2liwMkcQaV41i5dZjSKTdJ3EaD/Y2 BreLxXRnRYGUkBqfcon16Yx+P6VCefDRLa+RhwYO3dxFF2N4ZpblbkIdBATwKLjL npiGc6R8yFjTmZU0/7olMyMCm7igIBmDvWPcsKEE8R4PezwoQv6YKHBMwEaflIbl Rv4IUqjJzmQPaA0KkRoAVgAKHxldaNqno/6G1FR2gwz+fr68p5WSYFlQ3axhvTjc bBMJpB/fbp9WmpGJieTt6iMOI6V1pnCVjibM5ZON59WCFfytHGGpbYW05gtZEod4 d/3yRuU53JRSj3jQAQuF1B6qYhyxvv5YEtAQqIFeHaPZ67nL6agw09hE+TlXjWbE rTQRShflQ+ydnzIfKicFgy6/53D5hq7iH2l7HwJVXbXRQ104T5DB/XHUUTr+UWQn /Nkhov32/n6GjxQ= =58I4 -----END PGP SIGNATURE----- Merge tag 'pci-v4.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: - Fix ASPM link_state teardown on removal (Lukas Wunner) - Fix misleading _OSC ASPM message (Sinan Kaya) - Make _OSC optional for PCI (Sinan Kaya) - Don't initialize ASPM link state when ACPI_FADT_NO_ASPM is set (Patrick Talbert) - Remove x86 and arm64 node-local allocation for host bridge structures (Punit Agrawal) - Pay attention to device-specific _PXM node values (Jonathan Cameron) - Support new Immediate Readiness bit (Felipe Balbi) - Differentiate between pciehp surprise and safe removal (Lukas Wunner) - Remove unnecessary pciehp includes (Lukas Wunner) - Drop pciehp hotplug_slot_ops wrappers (Lukas Wunner) - Tolerate PCIe Slot Presence Detect being hardwired to zero to workaround broken hardware, e.g., the Wilocity switch/wireless device (Lukas Wunner) - Unify pciehp controller & slot structs (Lukas Wunner) - Constify hotplug_slot_ops (Lukas Wunner) - Drop hotplug_slot_info (Lukas Wunner) - Embed hotplug_slot struct into users instead of allocating it separately (Lukas Wunner) - Initialize PCIe port service drivers directly instead of relying on initcall ordering (Keith Busch) - Restore PCI config state after a slot reset (Keith Busch) - Save/restore DPC config state along with other PCI config state (Keith Busch) - Reference count devices during AER handling to avoid race issue with concurrent hot removal (Keith Busch) - If an Upstream Port reports ERR_FATAL, don't try to read the Port's config space because it is probably unreachable (Keith Busch) - During error handling, use slot-specific reset instead of secondary bus reset to avoid link up/down issues on hotplug ports (Keith Busch) - Restore previous AER/DPC handling that does not remove and re-enumerate devices on ERR_FATAL (Keith Busch) - Notify all drivers that may be affected by error recovery resets (Keith Busch) - Always generate error recovery uevents, even if a driver doesn't have error callbacks (Keith Busch) - Make PCIe link active reporting detection generic (Keith Busch) - Support D3cold in PCIe hierarchies during system sleep and runtime, including hotplug and Thunderbolt ports (Mika Westerberg) - Handle hpmemsize/hpiosize kernel parameters uniformly, whether slots are empty or occupied (Jon Derrick) - Remove duplicated include from pci/pcie/err.c and unused variable from cpqphp (YueHaibing) - Remove driver pci_cleanup_aer_uncorrect_error_status() calls (Oza Pawandeep) - Uninline PCI bus accessors for better ftracing (Keith Busch) - Remove unused AER Root Port .error_resume method (Keith Busch) - Use kfifo in AER instead of a local version (Keith Busch) - Use threaded IRQ in AER bottom half (Keith Busch) - Use managed resources in AER core (Keith Busch) - Reuse pcie_port_find_device() for AER injection (Keith Busch) - Abstract AER interrupt handling to disconnect error injection (Keith Busch) - Refactor AER injection callbacks to simplify future improvments (Keith Busch) - Remove unused Netronome NFP32xx Device IDs (Jakub Kicinski) - Use bitmap_zalloc() for dma_alias_mask (Andy Shevchenko) - Add switch fall-through annotations (Gustavo A. R. Silva) - Remove unused Switchtec quirk variable (Joshua Abraham) - Fix pci.c kernel-doc warning (Randy Dunlap) - Remove trivial PCI wrappers for DMA APIs (Christoph Hellwig) - Add Intel GPU device IDs to spurious interrupt quirk (Bin Meng) - Run Switchtec DMA aliasing quirk only on NTB endpoints to avoid useless dmesg errors (Logan Gunthorpe) - Update Switchtec NTB documentation (Wesley Yung) - Remove redundant "default n" from Kconfig (Bartlomiej Zolnierkiewicz) - Avoid panic when drivers enable MSI/MSI-X twice (Tonghao Zhang) - Add PCI support for peer-to-peer DMA (Logan Gunthorpe) - Add sysfs group for PCI peer-to-peer memory statistics (Logan Gunthorpe) - Add PCI peer-to-peer DMA scatterlist mapping interface (Logan Gunthorpe) - Add PCI configfs/sysfs helpers for use by peer-to-peer users (Logan Gunthorpe) - Add PCI peer-to-peer DMA driver writer's documentation (Logan Gunthorpe) - Add block layer flag to indicate driver support for PCI peer-to-peer DMA (Logan Gunthorpe) - Map Infiniband scatterlists for peer-to-peer DMA if they contain P2P memory (Logan Gunthorpe) - Register nvme-pci CMB buffer as PCI peer-to-peer memory (Logan Gunthorpe) - Add nvme-pci support for PCI peer-to-peer memory in requests (Logan Gunthorpe) - Use PCI peer-to-peer memory in nvme (Stephen Bates, Steve Wise, Christoph Hellwig, Logan Gunthorpe) - Cache VF config space size to optimize enumeration of many VFs (KarimAllah Ahmed) - Remove unnecessary <linux/pci-ats.h> include (Bjorn Helgaas) - Fix VMD AERSID quirk Device ID matching (Jon Derrick) - Fix Cadence PHY handling during probe (Alan Douglas) - Signal Cadence Endpoint interrupts via AXI region 0 instead of last region (Alan Douglas) - Write Cadence Endpoint MSI interrupts with 32 bits of data (Alan Douglas) - Remove redundant controller tests for "device_type == pci" (Rob Herring) - Document R-Car E3 (R8A77990) bindings (Tho Vu) - Add device tree support for R-Car r8a7744 (Biju Das) - Drop unused mvebu PCIe capability code (Thomas Petazzoni) - Add shared PCI bridge emulation code (Thomas Petazzoni) - Convert mvebu to use shared PCI bridge emulation (Thomas Petazzoni) - Add aardvark Root Port emulation (Thomas Petazzoni) - Support 100MHz/200MHz refclocks for i.MX6 (Lucas Stach) - Add initial power management for i.MX7 (Leonard Crestez) - Add PME_Turn_Off support for i.MX7 (Leonard Crestez) - Fix qcom runtime power management error handling (Bjorn Andersson) - Update TI dra7xx unaligned access errata workaround for host mode as well as endpoint mode (Vignesh R) - Fix kirin section mismatch warning (Nathan Chancellor) - Remove iproc PAXC slot check to allow VF support (Jitendra Bhivare) - Quirk Keystone K2G to limit MRRS to 256 (Kishon Vijay Abraham I) - Update Keystone to use MRRS quirk for host bridge instead of open coding (Kishon Vijay Abraham I) - Refactor Keystone link establishment (Kishon Vijay Abraham I) - Simplify and speed up Keystone link training (Kishon Vijay Abraham I) - Remove unused Keystone host_init argument (Kishon Vijay Abraham I) - Merge Keystone driver files into one (Kishon Vijay Abraham I) - Remove redundant Keystone platform_set_drvdata() (Kishon Vijay Abraham I) - Rename Keystone functions for uniformity (Kishon Vijay Abraham I) - Add Keystone device control module DT binding (Kishon Vijay Abraham I) - Use SYSCON API to get Keystone control module device IDs (Kishon Vijay Abraham I) - Clean up Keystone PHY handling (Kishon Vijay Abraham I) - Use runtime PM APIs to enable Keystone clock (Kishon Vijay Abraham I) - Clean up Keystone config space access checks (Kishon Vijay Abraham I) - Get Keystone outbound window count from DT (Kishon Vijay Abraham I) - Clean up Keystone outbound window configuration (Kishon Vijay Abraham I) - Clean up Keystone DBI setup (Kishon Vijay Abraham I) - Clean up Keystone ks_pcie_link_up() (Kishon Vijay Abraham I) - Fix Keystone IRQ status checking (Kishon Vijay Abraham I) - Add debug messages for all Keystone errors (Kishon Vijay Abraham I) - Clean up Keystone includes and macros (Kishon Vijay Abraham I) - Fix Mediatek unchecked return value from devm_pci_remap_iospace() (Gustavo A. R. Silva) - Fix Mediatek endpoint/port matching logic (Honghui Zhang) - Change Mediatek Root Port Class Code to PCI_CLASS_BRIDGE_PCI (Honghui Zhang) - Remove redundant Mediatek PM domain check (Honghui Zhang) - Convert Mediatek to pci_host_probe() (Honghui Zhang) - Fix Mediatek MSI enablement (Honghui Zhang) - Add Mediatek system PM support for MT2712 and MT7622 (Honghui Zhang) - Add Mediatek loadable module support (Honghui Zhang) - Detach VMD resources after stopping root bus to prevent orphan resources (Jon Derrick) - Convert pcitest build process to that used by other tools (iio, perf, etc) (Gustavo Pimentel) * tag 'pci-v4.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (140 commits) PCI/AER: Refactor error injection fallbacks PCI/AER: Abstract AER interrupt handling PCI/AER: Reuse existing pcie_port_find_device() interface PCI/AER: Use managed resource allocations PCI: pcie: Remove redundant 'default n' from Kconfig PCI: aardvark: Implement emulated root PCI bridge config space PCI: mvebu: Convert to PCI emulated bridge config space PCI: mvebu: Drop unused PCI express capability code PCI: Introduce PCI bridge emulated config space common logic PCI: vmd: Detach resources after stopping root bus nvmet: Optionally use PCI P2P memory nvmet: Introduce helper functions to allocate and free request SGLs nvme-pci: Add support for P2P memory in requests nvme-pci: Use PCI p2pmem subsystem to manage the CMB IB/core: Ensure we map P2P memory correctly in rdma_rw_ctx_[init|destroy]() block: Add PCI P2P flag for request queue PCI/P2PDMA: Add P2P DMA driver writer's documentation docs-rst: Add a new directory for PCI documentation PCI/P2PDMA: Introduce configfs/sysfs enable attribute helpers PCI/P2PDMA: Add PCI p2pmem DMA mappings to adjust the bus offset ...	2018-10-25 06:50:48 -07:00
Linus Torvalds	3ea172c84d	- New Drivers ... - Add support for USART SPI to AT91* - New Functionality - Add support for Audio CODECs to motorola-cpcap - Fix-ups - DT documentation fix-ups; atmel-usart - Staticise functions/structs; spi-at91-usart, arizona-core - Constify; ti-lmu - Fix memory leaks; menelaus - Change device 'wake-up' status; ti_am335x_tscadc, max8997 - Power Management (suspend/resume) semantic changes; ti_am335x_adc, cros_ec, max8997 - SPDX churn; sec-core (+ headers), max* (+ headers), intel* (+ headers), - Trivial (whitespace, email addresses, alphabetisise); Kconfig, adp5520, intel_soc_pmic_* - Build as module; sec-irq - Use new %pOFn printk format for device_node.name; max77620 - Remove unused code; madera - Use generic MACROs; intel_msic, intel_soc_pmic_crc - Move to GPIOD; ti-lmu - Use managed resources; ti-lmu - Bug Fixes - Add missing headers; at91-usart - Prevent device from entering low-power mode; arizona-core - Poll for BOOT_DONE to avoid still-booting NACK; madera-core - Prevent ADC read from shutting down device; mc13xxx-core -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEdrbJNaO+IJqU8IdIUa+KL4f8d2EFAlvO94AACgkQUa+KL4f8 d2GCaQ//XKJZ14EVT8gHVWekwUCJoqqLDDZH5Y+MDZkyq8ZnWZ3Iz2DeQ/g7KIAv EwtmWm4+TmfBMHziZSK3lZc/VBdhOWsFqi7/B1vQQ3n7RWHvhRcvFWASSzqCPpQP L7WbUtZWaeHx/26OKz1okbQbMuHEv11z8seXEX6axtSXlCbAF72fUaHDTAY0dCHD LAkomYee6wF3ohSwaPEH5FsgGRJ5ihnFmK8uGML+vBMq9IfrFOmOitrJmpOwPHud wKSEsKmVALeX/fP0kqcvaYOWTpNQecKEnJXH4uw0CC3QOIpL5nMmfKOjMfMF6wAq m76s5ZBt0UUMDZSiex+mzYQyfEXaP6bExtiUIfkXOii9uuaIIJ2J8rRLzoUrwpLy qTuGiIoUr3aoUFNx1uzmzeYVNLcQ2JeIrRw+MKlP60RiYDYyk8Ip96/ay+vLZXOl WTGFr9T5CnfjaHkoSgVcBu+F5q0v6qbvv0tBpjgYaRe9OClEEFqCSHqLo0oYwyeQ L4Y+tmGaDtUeRFdRyLp45X0y/DiThVkkDdOfRi3Fxn3PW4OxMOsU/GLCMQrbGXOr q5pJuSFjimu+JDZ2ibmMOtWrgtJ2EjTiBYLcDZNP2sujSWFE8azoEqGMXcQFDw/a Ltc6b474UNp9SGB4IC97f/B6EFUJ/TQWjo4WJXVEHdCRilRWBgM= =7B+Y -----END PGP SIGNATURE----- Merge tag 'mfd-next-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd Pull MFD updates from Lee Jones: "New Drivers - Add support for USART SPI to AT91* New Functionality - Add support for Audio CODECs to motorola-cpcap Fix-ups - DT documentation fix-ups; atmel-usart - Staticise functions/structs; spi-at91-usart, arizona-core - Constify; ti-lmu - Fix memory leaks; menelaus - Change device 'wake-up' status; ti_am335x_tscadc, max8997 - Power Management (suspend/resume) semantic changes; ti_am335x_adc, cros_ec, max8997 - SPDX churn; sec-core (+ headers), max* (+ headers), intel* (+ headers), - Trivial (whitespace, email addresses, alphabetisise); Kconfig, adp5520, intel_soc_pmic_* - Build as module; sec-irq - Use new %pOFn printk format for device_node.name; max77620 - Remove unused code; madera - Use generic MACROs; intel_msic, intel_soc_pmic_crc - Move to GPIOD; ti-lmu - Use managed resources; ti-lmu Bug Fixes - Add missing headers; at91-usart - Prevent device from entering low-power mode; arizona-core - Poll for BOOT_DONE to avoid still-booting NACK; madera-core - Prevent ADC read from shutting down device; mc13xxx-core" * tag 'mfd-next-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (45 commits) mfd: cros_ec: Avoid unneeded internal declaration warning mfd: ti-lmu: Use of_device_get_match_data() helper mfd: ti-lmu: Use managed resource for everything mfd: ti-lmu: Switch to GPIOD mfd: ti-lmu: constify mfd_cell tables mfd: max8997: Disable interrupt handling for suspend/resume cycle mfd: max8997: Enale irq-wakeup unconditionally mfd: arizona: Make array mclk_name static, shrinks object size MAINTAINERS: Add myself as designated reviewer of Intel MFD PMIC mfd: Convert Intel PMIC drivers to use SPDX identifier 1;5201;0c Reduce size of duplicated comments by switching to use SPDX identifier. mfd: Sort headers alphabetically for Intel PMIC drivers mfd: intel_soc_pmic_bxtwc: Chain power button IRQs as well mfd: intel_soc_pmic_crc: Use REGMAP_IRQ_REG() macro mfd: intel_soc_pmic_crc: Use DEFINE_RES_IRQ_NAMED() macro mfd: intel_msic: Use DEFINE_RES_IRQ() macro mfd: motorola-cpcap: Add audio-codec support mfd: mc13xxx-core: Fix PMIC shutdown when reading ADC values mfd: madera: Remove unused forward reference mfd: max77620: Convert to using %pOFn instead of device_node.name mfd: madera: Don't use regmap_read_poll_timeout to poll for BOOT_DONE ...	2018-10-25 06:19:15 -07:00
Linus Torvalds	50b825d7e8	Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next ... Pull networking updates from David Miller: 1) Add VF IPSEC offload support in ixgbe, from Shannon Nelson. 2) Add zero-copy AF_XDP support to i40e, from Björn Töpel. 3) All in-tree drivers are converted to {g,s}et_link_ksettings() so we can get rid of the {g,s}et_settings ethtool callbacks, from Michal Kubecek. 4) Add software timestamping to veth driver, from Michael Walle. 5) More work to make packet classifiers and actions lockless, from Vlad Buslov. 6) Support sticky FDB entries in bridge, from Nikolay Aleksandrov. 7) Add ipv6 version of IP_MULTICAST_ALL sockopt, from Andre Naujoks. 8) Support batching of XDP buffers in vhost_net, from Jason Wang. 9) Add flow dissector BPF hook, from Petar Penkov. 10) i40e vf --> generic iavf conversion, from Jesse Brandeburg. 11) Add NLA_REJECT netlink attribute policy type, to signal when users provide attributes in situations which don't make sense. From Johannes Berg. 12) Switch TCP and fair-queue scheduler over to earliest departure time model. From Eric Dumazet. 13) Improve guest receive performance by doing rx busy polling in tx path of vhost networking driver, from Tonghao Zhang. 14) Add per-cgroup local storage to bpf 15) Add reference tracking to BPF, from Joe Stringer. The verifier can now make sure that references taken to objects are properly released by the program. 16) Support in-place encryption in TLS, from Vakul Garg. 17) Add new taprio packet scheduler, from Vinicius Costa Gomes. 18) Lots of selftests additions, too numerous to mention one by one here but all of which are very much appreciated. 19) Support offloading of eBPF programs containing BPF to BPF calls in nfp driver, frm Quentin Monnet. 20) Move dpaa2_ptp driver out of staging, from Yangbo Lu. 21) Lots of u32 classifier cleanups and simplifications, from Al Viro. 22) Add new strict versions of netlink message parsers, and enable them for some situations. From David Ahern. 23) Evict neighbour entries on carrier down, also from David Ahern. 24) Support BPF sk_msg verdict programs with kTLS, from Daniel Borkmann and John Fastabend. 25) Add support for filtering route dumps, from David Ahern. 26) New igc Intel driver for 2.5G parts, from Sasha Neftin et al. 27) Allow vxlan enslavement to bridges in mlxsw driver, from Ido Schimmel. 28) Add queue and stack map types to eBPF, from Mauricio Vasquez B. 29) Add back byte-queue-limit support to r8169, with all the bug fixes in other areas of the driver it works now! From Florian Westphal and Heiner Kallweit. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (2147 commits) tcp: add tcp_reset_xmit_timer() helper qed: Fix static checker warning Revert "be2net: remove desc field from be_eq_obj" Revert "net: simplify sock_poll_wait" net: socionext: Reset tx queue in ndo_stop net: socionext: Add dummy PHY register read in phy_write() net: socionext: Stop PHY before resetting netsec net: stmmac: Set OWN bit for jumbo frames arm64: dts: stratix10: Support Ethernet Jumbo frame tls: Add maintainers net: ethernet: ti: cpsw: unsync mcast entries while switch promisc mode octeontx2-af: Support for NIXLF's UCAST/PROMISC/ALLMULTI modes octeontx2-af: Support for setting MAC address octeontx2-af: Support for changing RSS algorithm octeontx2-af: NIX Rx flowkey configuration for RSS octeontx2-af: Install ucast and bcast pkt forwarding rules octeontx2-af: Add LMAC channel info to NIXLF_ALLOC response octeontx2-af: NPC MCAM and LDATA extract minimal configuration octeontx2-af: Enable packet length and csum validation octeontx2-af: Support for VTAG strip and capture ...	2018-10-24 06:47:44 +01:00
Gustavo A. R. Silva	81fa7a69c2	dt-bindings: phy: Update SERDES_MAX to be SERDES_MAX + 1 ... SERDES_MAX is a valid value to index ctrl->phys in drivers/phy/mscc/phy-ocelot-serdes.c. But, currently, there is an out-of-bounds bug in the mentioned driver when reading from ctrl->phys, because the size of array ctrl->phys is SERDES_MAX. Partially fix this by updating SERDES_MAX to be SERDES6G_MAX + 1. Notice that this is the first part of the solution to the out-of-bounds bug mentioned above. Although this change is not dependent on any other one. Suggested-by: Quentin Schulz <quentin.schulz@bootlin.com> Reviewed-by: Quentin Schulz <quentin.schulz@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: David S. Miller <davem@davemloft.net>	2018-10-22 19:27:14 -07:00
Stephen Boyd	1578968f77	Merge branches 'clk-imx6-mmdc', 'clk-qcom-krait', 'clk-rockchip' and 'clk-smp2s11-match' into clk-next ... - iMX6 MMDC clks - Qualcomm Krait CPU clk support * clk-imx6-mmdc: clk: imx6q: add mmdc0 ipg clock clk: imx6sl: add mmdc ipg clocks clk: imx6sll: add mmdc1 ipg clock clk: imx6sx: add mmdc1 ipg clock clk: imx6ul: add mmdc1 ipg clock * clk-qcom-krait: clk: qcom: Add safe switch hook for krait mux clocks dt-bindings: clock: Document qcom,krait-cc clk: qcom: Add Krait clock controller driver dt-bindings: arm: Document qcom,kpss-gcc clk: qcom: Add KPSS ACC/GCC driver clk: qcom: Add support for Krait clocks clk: qcom: Add IPQ806X's HFPLLs clk: qcom: Add MSM8960/APQ8064's HFPLLs dt-bindings: clock: Document qcom,hfpll clk: qcom: Add HFPLL driver clk: qcom: Add support for High-Frequency PLLs (HFPLLs) ARM: Add Krait L2 register accessor functions * clk-rockchip: clk: rockchip: Fix static checker warning in rockchip_ddrclk_get_parent call clk: rockchip: use the newly added clock-id for hdmi on RK3066 clk: rockchip: add clock-id for HCLK_HDMI on rk3066 clk: rockchip: fix wrong mmc sample phase shift for rk3328 clk: rockchip: improve rk3288 pll rates for better hdmi output * clk-smp2s11-match: clk: s2mps11: Add used attribute to s2mps11_dt_match clk: s2mps11: Fix matching when built as module and DT node contains compatible	2018-10-18 15:44:01 -07:00
Stephen Boyd	1fe7c040b6	Merge branches 'clk-actions-reset', 'clk-imx7-init-critical', 'clk-mmp2-ids' and 'clk-at91-pmc-rework' into clk-next ... - Reset Controller (RMU) support for Actions Semi Owl S900 and S700 SoCs - Rework at91 PMC clock driver for new DT bindings * clk-actions-reset: clk: actions: Add Actions Semi S900 SoC Reset Management Unit support clk: actions: Add Actions Semi S700 SoC Reset Management Unit support clk: actions: Add Actions Semi Owl SoCs Reset Management Unit support dt-bindings: reset: Add binding constants for Actions Semi S900 RMU dt-bindings: reset: Add binding constants for Actions Semi S700 RMU dt-bindings: clock: Add reset controller bindings for Actions Semi Owl SoCs clk: actions: Cache regmap info in private clock descriptor * clk-imx7-init-critical: clk: imx7d: remove CLK_IS_CRITICAL flag for arm_a7_root_clk clk: imx: cpu clock should be always critical clk: imx: imx7d: remove clks_init_on array clk: imx: imx7d: remove unnecessary clocks from clks_init_on array * clk-mmp2-ids: clk: mmp2: fix the clock id for sdh2_clk and sdh3_clk * clk-at91-pmc-rework: clk: at91: move DT compatibility code to its own file clk: at91: add at91sam9rl PMC driver clk: at91: add at91sam9x5 PMCs driver clk: at91: add at91sam9260 PMC driver clk: at91: add sama5d2 PMC driver clk: at91: add sama5d4 pmc driver clk: at91: add new DT lookup function dt-bindings: clk: at91: Document new PMC binding clk: at91: add pmc_data struct and helpers clk: at91: allow clock registration from C code clk: at91: generated: set audio_pll_allowed in at91_clk_register_generated() clk: at91: audio-pll: separate registration from DT parsing clk: at91: h32mx: separate registration from DT parsing clk: at91: generated: SSCs don't have a gclk clk: at91: audio-pll: fix audio pmc type	2018-10-18 15:43:48 -07:00
Stephen Boyd	19ef24654f	Merge branch 'clk-ingenic-jz4725b' into clk-next ... - Ingenic jz4725b CGU * clk-ingenic-jz4725b: clk: Add Ingenic jz4725b CGU driver dt-bindings: clock: Add jz4725b-cgu.h header dt-bindings: clock: ingenic: Explicitly list compatible strings clk: ingenic: Add proper Kconfig entries	2018-10-18 15:43:24 -07:00
Stephen Boyd	fa4c0e4903	Merge branch 'clk-qcom-qcs404' into clk-next ... - Qualcomm QCS404 GCC support * clk-qcom-qcs404: clk: qcom: gcc: Add global clock controller driver for QCS404 clk: qcom: Export clk_alpha_pll_configure()	2018-10-18 15:42:42 -07:00
Stephen Boyd	37163726e1	Merge branch 'clk-qcom-sdm660' into clk-next ... - Qualcomm SDM660 GCC support * clk-qcom-sdm660: clk: qcom: gcc-sdm660: Add MODULE_LICENSE clk: qcom: Add Global Clock controller (GCC) driver for SDM660	2018-10-18 15:41:51 -07:00
Stephen Boyd	ffd3b1c880	Merge branches 'clk-samsung', 'clk-hisi3670' and 'clk-at91-div-0' into clk-next ... - Hisilicon 3670 SoC support * clk-samsung: dt-bindings: clock: samsung: Add SPDX license identifiers clk: samsung: Use clk_hw API for calling clk framework from clk notifiers clk: samsung: exynos5420: Enable PERIS clocks for suspend clk: samsung: exynos5420: Define CLK_SECKEY gate clock only or Exynos5420 clk: samsung: exynos5433: Keep sclk_uart clocks enabled in suspend clk: samsung: Remove obsolete code for Exynos4412 ISP clocks clk: samsung: exynos5433: Add suspend state for TOP, CPIF & PERIC CMUs clk: samsung: Use NOIRQ stage for Exynos5433 clocks suspend/resume clk: samsung: exynos5420: Use generic helper for handling suspend/resume clk: samsung: exynos4: Use generic helper for handling suspend/resume clk: samsung: Add support for setting registers state before suspend clk: samsung: exynos5250: Use generic helper for handling suspend/resume clk: samsung: s5pv210: Use generic helper for handling suspend/resume clk: samsung: s3c64xx: Use generic helper for handling suspend/resume clk: samsung: s3c2443: Use generic helper for handling suspend/resume clk: samsung: s3c2412: Use generic helper for handling suspend/resume clk: samsung: s3c2410: Use generic helper for handling suspend/resume clk: samsung: Remove excessive include * clk-hisi3670: clk: hisilicon: Add clock driver for Hi3670 SoC dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk * clk-at91-div-0: clk: at91: Fix division by zero in PLL recalc_rate()	2018-10-18 15:41:36 -07:00
Stephen Boyd	8a69f1d470	Merge branch 'clk-ti' into clk-next ... * clk-ti: clk: ti: Prepare for remove of OF node name clk: Clean up suspend/resume coding style clk: ti: Add functions to save/restore clk context clk: clk: Add clk_gate_restore_context function clk: Add functions to save/restore clock context en-masse clk: ti: dra7: add new clkctrl data clk: ti: dra7xx: rename existing clkctrl data as compat data clk: ti: am43xx: add new clkctrl data for am43xx clk: ti: am43xx: rename existing clkctrl data as compat data clk: ti: am33xx: add new clkctrl data for am33xx clk: ti: am33xx: rename existing clkctrl data as compat data clk: ti: clkctrl: replace dashes from clkdm name with underscore clk: ti: clkctrl: support multiple clkctrl nodes under a cm node dt-bindings: clock: dra7xx: add clkctrl indices for new data layout dt-bindings: clock: am43xx: add clkctrl indices for new data layout dt-bindings: clock: am33xx: add clkctrl indices for new data layout	2018-10-18 15:41:21 -07:00
Stephen Boyd	cd8ca30052	Merge branches 'clk-mvebu-periph-pm', 'clk-meson', 'clk-allwinner', 'clk-mvebu-dup' and 'clk-davinci' into clk-next ... - S2RAM support for Marvell mvebu periph clks * clk-mvebu-periph-pm: clk: mvebu: armada-37xx-periph: add suspend/resume support clk: mvebu: armada-37xx-periph: save the IP base address in the driver data * clk-meson: clk: meson: meson8b: use the regmap in the internal reset controller clk: meson: meson8b: register the clock controller early clk: meson-axg: pcie: drop the mpll3 clock parent clk: meson: axg: round audio system master clocks down clk: meson: clk-pll: drop hard-coded rates from pll tables clk: meson: clk-pll: remove od parameters clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary clk: meson: clk-pll: add enable bit * clk-allwinner: dt-bindings: clock: sun50i-a64-ccu: Add PLL_VIDEO0 macro clk: sunxi-ng: a64: Add max. rate constraint to video PLLs clk: sunxi-ng: a64: Add minimal rate for video PLLs clk: sunxi-ng: sun50i: h6: Add 2x fixed post-divider to MMC module clocks clk: sunxi-ng: a83t: Add max. rate constraint to video PLLs clk: sunxi-ng: nkmp: Add constraint for maximum rate clk: sunxi-ng: r40: Add max. rate constraint to video PLLs clk: sunxi-ng: h3/h5: Add max. rate constraint to pll-video clk: sunxi-ng: Add maximum rate constraint to NM PLLs clk: sunxi-ng: h6: fix PWM gate/reset offset clk: sunxi-ng: h6: fix bus clocks' divider position * clk-mvebu-dup: clk: mvebu: ap806: Remove superfluous of_clk_add_provider * clk-davinci: clk: davinci: kill davinci_clk_reset_assert/deassert()	2018-10-18 15:39:08 -07:00
Stephen Boyd	5d3a48fe2c	Merge branches 'clk-qcom-sdm845-camcc' and 'clk-mtk-unused' into clk-next ... - Qualcomm SDM845 camera clock controller * clk-qcom-sdm845-camcc: clk: qcom: Add camera clock controller driver for SDM845 dt-bindings: clock: Introduce QCOM Camera clock bindings * clk-mtk-unused: clk: mediatek: remove unused array audio_parents	2018-10-18 15:39:01 -07:00
Stephen Boyd	faff3d8e85	Merge branch 'clk-renesas' into clk-next ... * clk-renesas: (36 commits) clk: renesas: r7s9210: Add SPI clocks clk: renesas: r7s9210: Move table update to separate function clk: renesas: r7s9210: Convert some clocks to early clk: renesas: cpg-mssr: Add early clock support clk: renesas: r8a77970: Add TPU clock clk: renesas: r8a77990: Fix incorrect PLL0 divider in comment dt-bindings: clock: renesas: cpg-mssr: Document r8a774c0 clk: renesas: cpg-mssr: Add r8a774c0 support clk: renesas: Add r8a774c0 CPG Core Clock Definitions clk: renesas: r8a7743: Add r8a7744 support clk: renesas: Add r8a7744 CPG Core Clock Definitions dt-bindings: clock: renesas: cpg-mssr: Document r8a7744 binding dt-bindings: clock: renesas: Convert to SPDX identifiers clk: renesas: cpg-mssr: Add R7S9210 support clk: renesas: r8a77970: Add TMU clocks clk: renesas: r8a77970: Add CMT clocks clk: renesas: r9a06g032: Fix UART34567 clock rate clk: renesas: r8a77970: Add SD0H/SD0 clocks for SDHI clk: renesas: r8a77980: Add CMT clocks clk: renesas: r8a77990: Add missing I2C7 clock ...	2018-10-18 15:38:51 -07:00
Stephen Boyd	1affdc35e0	Merge branches 'clk-spdx', 'clk-qcom-dfs', 'clk-smp2s11-include', 'clk-qcom-8996-missing' and 'clk-qcom-qspi' into clk-next ... - Tag various drivers with SPDX license tags - Support dynamic frequency switching (DFS) on qcom SDM845 GCC - Only use s2mps11 dt-binding defines instead of redefining them in the driver - Add some more missing clks to qcom MSM8996 GCC - Quad SPI clks on qcom SDM845 * clk-spdx: clk: mvebu: use SPDX-License-Identifier clk: renesas: Convert to SPDX identifiers clk: renesas: use SPDX identifier for Renesas drivers clk: s2mps11,s3c64xx: Add SPDX license identifiers clk: max77686: Add SPDX license identifiers * clk-qcom-dfs: clk: qcom: Allocate space for NULL terimation in DFS table clk: qcom: gcc: Register QUPv3 RCGs for DFS on SDM845 clk: qcom: Add support for RCG to register for DFS * clk-smp2s11-include: clk: s2mps11: Use existing defines from bindings for clock IDs * clk-qcom-8996-missing: clk: qcom: Add some missing gcc clks for msm8996 * clk-qcom-qspi: clk: qcom: Add qspi (Quad SPI) clocks for sdm845 clk: qcom: Add qspi (Quad SPI) clock defines for sdm845 to header	2018-10-18 15:33:28 -07:00
Stephen Boyd	72ad720795	clk: qcom: Add MSM8960/APQ8064's HFPLLs ... Describe the HFPLLs present on MSM8960 and APQ8064 devices. Acked-by: Rob Herring <robh@kernel.org> (bindings) Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Tested-by: Craig Tatlor <ctatlor97@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-17 13:14:45 -07:00
Anson Huang	341ce3563e	clk: imx6q: add mmdc0 ipg clock ... i.MX6Q has MMDC0 ipg clock in CCM CCGR, add it into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-17 11:16:02 -07:00
Anson Huang	09d47620d0	clk: imx6sl: add mmdc ipg clocks ... i.MX6SL has MMDC0 and MMDC1 ipg clock in CCM CCGR, add them into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-17 11:15:51 -07:00
Anson Huang	aac7ff2048	clk: imx6sll: add mmdc1 ipg clock ... i.MX6SLL has MMDC1 ipg clock in CCM CCGR, add it into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-17 11:15:44 -07:00
Anson Huang	891f30bf60	clk: imx6sx: add mmdc1 ipg clock ... i.MX6SX has MMDC1 ipg clock in CCM CCGR, add it into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-17 11:15:32 -07:00
Anson Huang	acc4f98d44	clk: imx6ul: add mmdc1 ipg clock ... i.MX6UL has MMDC1 ipg clock in CCM CCGR, add it into clock tree for clock management. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-17 11:15:20 -07:00
Alexandre Belloni	d387ff5427	clk: at91: add new DT lookup function ... Add a new DT lookup function to lookup for PMC clocks. Note that the #ifndef AT91_PMC_MOSCS section will be removed once all the platforms are converted. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-17 10:44:33 -07:00
Paul Cercueil	2fdecde775	dt-bindings: clock: Add jz4725b-cgu.h header ... This will be used from the devicetree bindings to specify the clocks that should be obtained from the jz4725b-cgu driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-16 15:19:43 -07:00
Shefali Jain	652f1813c1	clk: qcom: gcc: Add global clock controller driver for QCS404 ... Add the clocks supported in global clock controller which clock the peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks to the clock framework for the clients to be able to request for them. Signed-off-by: Shefali Jain <shefjain@codeaurora.org> Signed-off-by: Taniya Das <tdas@codeaurora.org> Co-developed-by: Taniya Das <tdas@codeaurora.org> Signed-off-by: Anu Ramanathan <anur@codeaurora.org> [bamse, vkoul: rebase and tidyup for upstream] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Lowercase hex] Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-16 15:13:54 -07:00
Taniya Das	f2a76a2955	clk: qcom: Add Global Clock controller (GCC) driver for SDM660 ... Add support for the global clock controller found on SDM660 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Based on CAF implementation. Signed-off-by: Taniya Das <tdas@codeaurora.org> [craig: rename parents to fit upstream, and other cleanups] Signed-off-by: Craig Tatlor <ctatlor97@gmail.com> Acked-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Rename gcc_660 to gcc_sdm660 and fix numbering of defines to avoid duplicates] Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-16 15:06:43 -07:00
Manivannan Sadhasivam	3b6b13ede0	dt-bindings: clk: hisilicon: Add bindings for Hi3670 clk ... Add devicetree bindings for HiSilicon Hi3670 clock controller. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-16 14:46:56 -07:00
Manivannan Sadhasivam	a35bcf7c7f	dt-bindings: reset: Add binding constants for Actions Semi S900 RMU ... Add device tree binding constants for Actions Semi S900 SoC Reset Management Unit (RMU). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-16 14:41:15 -07:00
Manivannan Sadhasivam	73a5e67efa	dt-bindings: reset: Add binding constants for Actions Semi S700 RMU ... Add device tree binding constants for Actions Semi S700 SoC Reset Management Unit (RMU). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-10-16 14:41:01 -07:00
Krzysztof Kozlowski	40970f7a43	dt-bindings: thermal: samsung: Add SPDX license identifier ... Replace GPL license statement with SPDX license identifier (GPL-2.0+). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>	2018-10-15 13:35:45 -05:00
Krzysztof Kozlowski	cd9102e9ad	dt-bindings: clock: samsung: Add SPDX license identifiers ... Replace GPL license statements with SPDX license identifiers (GPL-2.0). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>	2018-10-15 13:35:00 -05:00
Heiko Stuebner	5f697a0e31	clk: rockchip: add clock-id for HCLK_HDMI on rk3066 ... RK3066 and RK3188 share most of the clock controller but the rk3066 does have an internal hdmi encoder and associated clock. Therefore add a clock-id so that this clock can be used. Signed-off-by: Heiko Stuebner <heiko@sntech.de>	2018-10-11 14:57:25 +02:00
Arnd Bergmann	e4c080a10a	arm64: zynqmp: SoC CLK changes for v4.20 ... This patchset adds CCF compliant clock driver for ZynqMP. Clock driver queries supported clock information from firmware and regiters pll and output clocks with CCF. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlu8k7oACgkQykllyylKDCFmPACfewJHUsKUhaX77Ew+Pup5tFzC GHgAn1Xb2fJF+9D4CSB+iwdQNPltuhBg =QShK -----END PGP SIGNATURE----- Merge tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx into next/drivers arm64: zynqmp: SoC CLK changes for v4.20 This patchset adds CCF compliant clock driver for ZynqMP. Clock driver queries supported clock information from firmware and regiters pll and output clocks with CCF. * tag 'zynqmp-soc-clk-for-v4.20' of https://github.com/Xilinx/linux-xlnx: drivers: clk: Add ZynqMP clock driver dt-bindings: clock: Add bindings for ZynqMP clock driver firmware: xilinx: Add zynqmp IOCTL API for device control Documentation: xilinx: Add documentation for eemi APIs Signed-off-by: Arnd Bergmann <arnd@arndb.de>	2018-10-10 13:47:06 +02:00
Arnd Bergmann	f7d87826fe	Reset controller changes for v4.20 ... This adds a new driver for the PDC Global (Power Domain Controller) reset controller found on Qualcomm SDM845 SoCs, fixes a potential use-after-free issue in reset_controller_dev.of_xlate() callbacks from __of_reset_control_get(), and trivially fixes a documentation grammar issue. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCW7x5rhcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwDy9AP9Z7aMOwFUB0ie3RtL3TVdKq0dg ayIYm+iKAlWjiwvr5wD/XuHhygmuY3uDyvTaQP3yoWsQe5+/ugg606Shcxe4EQE= =+kaf -----END PGP SIGNATURE----- Merge tag 'reset-for-4.20' of git://git.pengutronix.de/git/pza/linux into next/drivers Reset controller changes for v4.20 This adds a new driver for the PDC Global (Power Domain Controller) reset controller found on Qualcomm SDM845 SoCs, fixes a potential use-after-free issue in reset_controller_dev.of_xlate() callbacks from __of_reset_control_get(), and trivially fixes a documentation grammar issue. * tag 'reset-for-4.20' of git://git.pengutronix.de/git/pza/linux: reset: Fix potential use-after-free in __of_reset_control_get() reset: qcom: PDC Global (Power Domain Controller) reset controller dt-bindings: reset: Add PDC Global binding for SDM845 SoCs reset: Grammar s/more then once/more than once/ Signed-off-by: Arnd Bergmann <arnd@arndb.de>	2018-10-10 13:41:22 +02:00
Linus Walleij	b0b378acde	pinctrl: sh-pfc: Updates for v4.20 (take three) ... - Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033) SoCs, - Add INTC-EX pin groups on R-Car E3. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCW7dQmQAKCRCKwlD9ZEnx cB04AQCj1PoCEotqH9TGaGeVXal35LUMP279vz3HoJweY0DF2AD/QKd/jC2mHz/c EypfJAvBvckw9AsdfNSacrCIdMNg7gE= =gtgr -----END PGP SIGNATURE----- Merge tag 'sh-pfc-for-v4.20-tag3' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v4.20 (take three) - Add support for the new RZ/N1D (R9A06G032) and RZ/N1S (R9A06G033) SoCs, - Add INTC-EX pin groups on R-Car E3.	2018-10-10 11:15:33 +02:00
Rajan Vaja	26372d0973	dt-bindings: clock: Add bindings for ZynqMP clock driver ... Add documentation to describe Xilinx ZynqMP clock driver bindings. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2018-10-09 13:26:34 +02:00