Commit Graph

119 Commits

Author SHA1 Message Date
Adam Jackson f2b115e69d drm/i915: Fix product names and #defines
IGD* isn't a useful name.  Replace with the codenames, as sourced from
pci.ids.

Signed-off-by: Adam Jackson <ajax@redhat.com>
[anholt: Fixed up for merge with pineview/ironlake changes]
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-12-07 14:55:56 -08:00
Eric Anholt f0217c42c9 drm/i915: Fix DDC on some systems by clearing BIOS GMBUS setup.
This is a sync of a fix I made in the old UMS code.  If the BIOS uses
the GMBUS and doesn't clear that setup, then our bit-banging I2C can
fail, leading to monitors not being detected.

Signed-off-by: Eric Anholt <eric@anholt.net>
2009-12-01 11:56:30 -08:00
Zhenyu Wang 5586c8bc93 drm/i915: Add more registers save/restore for Ironlake suspend
Add more display registers save/restore to fix unstable issues
during S4 testing on Ironlake. And DPLL_B_MD should not be restored
on Ironlake.

Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-11-12 11:21:14 -08:00
Jesse Barnes 97f5ab6651 drm/i915: add render standby support
Render standy allows the GPU to power down the render unit when idle.
In order for this to work, it needs a page of graphics memory to save
state.  This patch allocates that page and enables the feature on
supported chipsets.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-11-05 14:47:06 -08:00
Zhenyu Wang 4204878179 drm/i915: Ironlake suspend/resume support
This adds registers save/restore for Ironlake to make suspend work.

Signed-off-by: Guo, Chaohong <chaohong.guo@intel.com>
[zhenyuw: some code re-orgnization, and add more save/restore for
FDI link and transcoder registers, also fix palette register for Ironlake]
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-23 11:31:26 -07:00
Jesse Barnes 0eb96d6ed3 drm/i915: save/restore BLC histogram control reg across suspend/resume
Turns out some machines, like the ThinkPad X40 don't come back if you
don't save/restore this register.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-15 09:20:48 -07:00
Jesse Barnes 06027f9111 drm/i915: Save and restore the GM45 FBC regs on suspend and resume.
This hasn't fixed the regressions we were testing against, but clearly
should be required.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-10-13 10:36:20 -07:00
Ben Gamari 1341d655dd drm/i915: Refactor save/restore code
We move the display-specific code into it's own functions, called
from the general GPU state save/restore functions. This will be needed
later by the GPU reset code.

Signed-off-by: Ben Gamari <bgamari.foss@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-17 14:34:27 -07:00
Jesse Barnes 652c393a33 drm/i915: add dynamic clock frequency control
There are several sources of unnecessary power consumption on Intel
graphics systems. The first is the LVDS clock. TFTs don't suffer from
persistence issues like CRTs, and so we can reduce the LVDS refresh rate
when the screen is idle. It will be automatically upclocked when
userspace triggers graphical activity. Beyond that, we can enable memory
self refresh. This allows the memory to go into a lower power state when
the graphics are idle. Finally, we can drop some clocks on the gpu
itself. All of these things can be reenabled between frames when GPU
activity is triggered, and so there should be no user visible graphical
changes.

Signed-off-by: Jesse Barnes <jesse.barnes@intel.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-04 13:05:38 -07:00
Roel Kluin 819e006463 drm/i915: Fix read outside array bounds in restoring the SWF10 range.
dev_priv->saveSWF1 is a 16 element array, but this reads up to index 22,
and restored values from the wrong registers.

Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-08-05 11:21:29 -07:00
Zhao Yakui fccdaba431 drm/i915: Avoid saving/restore the modesetting registers twice in KMS mode
In KMS mode we now use the normal mode-setting paths to set the modes
back to the current configuration, so we don't need to also run the more
limited non-KMS implementation of modesetting for resume.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-07-10 12:40:36 -07:00
Keith Packard a4fc5ed698 drm/i915: Add Display Port support
Signed-off-by: Keith Packard <keithp@keithp.com>
2009-06-18 15:54:07 -07:00
Eric Anholt 1fd1c62436 drm/i915: Save/restore cursor state on suspend/resume.
This may fix cursor corruption in X on resume, which would persist until
the cursor was hidden and then shown again.

V2: Also include the cursor control regs.

Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-04 11:43:11 +00:00
Keith Packard 79f11c19a3 drm/i915: save/restore fence registers across suspend/resume
This makes software fallbacks not do tiling wrong on i965 and later after
resume. It also should fix 945 performance reduction after resume which
would have disabled tiling without causing any visible effect.

Signed-off-by: Keith Packard <keithp@keithp.com>
[anholt: Fixed up the 915 case to not save/restore the new regs]
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-04-30 16:04:40 -07:00
Pierre Willenbrock 66824bd7b5 drm/i915: Don't restore palettes through VGA registers.
The VGA registers just hit the pipe registers that we already set through
MMIO.  This fixes strange colors on resume.

Signed-off-by: Pierre Willenbrock <pierre@pirsoft.de>
Signed-off-by: Eric Anholt <eric@anholt.net>
2009-03-10 13:11:12 -07:00
Peng Li 461cba2d29 drm/i915: Save/restore HWS_PGA on suspend/resume
It fixes suspend/resume failure of xf86-video-intel dri2
branch. As dri2 branch doesn't call I830DRIResume() to restore
hardware status page anymore, we need to preserve
this register across suspend/resume.

Signed-off-by: Peng Li <peng.li@intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-11-26 15:47:25 +10:00
Keith Packard 881ee9889c i915: Save/restore MCHBAR_RENDER_STANDBY on GM965/GM45
This register is set by the 2D driver to prevent lockups, and so it needs to
be preserved across suspend/resume too. This makes my X200s work.

Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-11-11 17:42:19 +10:00
Jesse Barnes b9bfdfe670 new chip name is GM45
Author: Zhenyu Wang <zhenyu.z.wang@intel.com>

i915: official name for GM45 chipset

Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18 07:10:11 +10:00
Jesse Barnes 317c35d144 separate i915 suspend/resume functions into their own file
[Patch against drm-next.  Consider this a trial balloon for our new Linux
development model.]

This is a big chunk of code.  Separating it out makes it easier to change
without churn on the main i915_drv.c file (and there will be churn as we
fix bugs and add things like kernel mode setting).  Also makes it easier
to share this file with BSD.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-18 07:10:11 +10:00