Commit Graph

10194 Commits

Author SHA1 Message Date
Alex Deucher c696e53f78 drm/radeon/kms: fix up dce6 display watermark calc for dpm
Calculate the low and high watermarks based on the low and high
clocks for the current power state.  The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:23 -04:00
Alex Deucher cf0cfdd7a7 drm/radeon/kms: fix up dce4/5 display watermark calc for dpm
Calculate the low and high watermarks based on the low and high
clocks for the current power state.  The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:22 -04:00
Alex Deucher 7d99e51774 drm/radeon/kms: fix up 6xx/7xx display watermark calc for dpm
Calculate the low and high watermarks based on the low and high
clocks for the current power state.  The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:22 -04:00
Alex Deucher 3a4d8f7b61 drm/radeon/kms: fix up rs780/rs880 display watermark calc for dpm
calculate the low and high watermarks based on the low and high
clocks for the current power state.  The dynamic pm hw will select
the appropriate watermark based on the internal dpm state.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:21 -04:00
Alex Deucher da321c8a6a drm/radeon/kms: add common dpm infrastructure
This adds the common dpm (dynamic power management)
infrastructure:
- dpm callbacks
- dpm init/fini/suspend/resume
- dpm power state selection

No device specific code is enabled yet.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:20 -04:00
Alex Deucher ca361b6538 drm/radeon/kms: add new asic struct for rv6xx (v4)
Has a different dpm controller than r600.

v2: rebase on gpu reset changes
v3: rebase on get_xclk changes
v4: update rptr/wtpr callbacks

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:20 -04:00
Alex Deucher ae5b0abbb6 drm/radeon/kms: add atom helper functions for dpm (v3)
dpm needs access to atombios data and command tables
for setup and calculation of a number of parameters.

v2: endian fix
v3: fix mc reg table bug

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:19 -04:00
Alex Deucher 2948f5e6c2 drm/radeon: properly set up the RLC on ON/LN/TN (v3)
This is required for certain advanced functionality.

v2: save/restore list takes dword offsets
v3: rebase on gpu reset changes

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:18 -04:00
Alex Deucher 138e4e16f0 drm/radeon/kms: move ucode defines to a separate header
Avoids confusion and duplication.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:17 -04:00
Alex Deucher 29a1522189 drm/radeon: add support for thermal sensor on tn
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:17 -04:00
Alex Deucher 6bd1c38532 drm/radeon: make get_temperature functions a callback
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:16 -04:00
Alex Deucher 46f9564ab0 drm/radeon/evergreen: add indirect register accessors for CG registers
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:15 -04:00
Alex Deucher ff82bbc4d5 drm/radeon/kms: add accessors for RCU indirect space
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:14 -04:00
Alex Deucher 39aee49028 drm/radeon: add cik tile mode array query
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:12 -04:00
Alex Deucher 0672e27bea drm/radeon: add radeon_asic struct for CIK (v12)
v2: fix up for latest reset changes
v3: use CP for pt updates for now
v4: update for 2 level PTs
v5: update for ib_parse removal
v6: vm_flush api change
v7: rebase
v8: fix gfx ring function pointers
v9: fix vm_set_page function params
v10: update for compute changes
v11: cleanup for release
v12: update rptr/wptr callbacks

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:12 -04:00
Alex Deucher 0aafd3133f drm/radeon/cik: add support for golden register init
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:11 -04:00
Alex Deucher 2b0781a60e drm/radeon/cik: add support for compute interrupts
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:10 -04:00
Alex Deucher b07fdd3832 drm/radeon: fix up ring functions for compute rings
The compute rings use RELEASE_MEM rather then EOP
packets for writing fences and there is no SYNC_PFP_ME
packet on the compute rings.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:09 -04:00
Alex Deucher 2615b53ace drm/radeon/cik: switch to type3 nop packet for compute rings (v2)
Type 2 packets are deprecated on CIK MEC and we should use
type 3 nop packets.  Setting the count field to the max value
(0x3fff) indicates that only one dword should be skipped
like a type 2 packet.

v2: add comment to code

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-06-27 10:49:09 -04:00
Alex Deucher 963e81f9e0 drm/radeon/cik: Add support for compute queues (v4)
On CIK, the compute rings work slightly differently than
on previous asics, however the basic concepts are the same.

The main differences:
- New MEC engines for compute queues
- Multiple queues per MEC:
  - CI/KB: 1 MEC, 4 pipes per MEC, 8 queues per pipe = 32 queues
  -    KV: 2 MEC, 4 pipes per MEC, 8 queues per pipe = 64 queues
- Queues can be allocated and scheduled by another queue
- New doorbell aperture allows you to assign space in the aperture
  for the wptr which allows for userspace access to queues

v2: add wptr shadow, fix eop setup
v3: fix comment
v4: switch to new callback method

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jerome Glisse <jglisse@redhat.com>
2013-06-27 10:49:08 -04:00
Alex Deucher 75efdee11b drm/radeon: implement simple doorbell page allocator
The doorbell aperture is a PCI BAR whose pages can be
mapped to compute resources for things like wptrs
for userspace queues.

This patch maps the BAR and sets up a simple allocator
to allocate pages from the BAR.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:07 -04:00
Alex Deucher f93bdefe62 drm/radeon: use callbacks for ring pointer handling (v3)
Add callbacks to the radeon_asic struct to handle
rptr/wptr fetchs and wptr updates.
We currently use one version for all rings, but this
allows us to override with a ring specific versions.

Needed for compute rings on CIK.

v2: udpate as per Christian's comments
v3: fix some rebase cruft

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-27 10:49:07 -04:00
Alex Deucher b556b12e82 drm/radeon/cik: add srbm_select function
Allows us to select instanced registers based on:
- ME (micro engine
- Pipe
- Queue
- VMID

Switch MC setup to use this new function.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:51 -04:00
Christian König 87167bb16d drm/radeon: add UVD support for CIK (v3)
v2: agd5f: fix clock dividers setup for bonaire
v3: agd5f: rebase

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:50 -04:00
Alex Deucher 9219ed65d3 drm/radeon: update radeon_atom_get_clock_dividers for CIK
CIK uses a slightly different variant of the table structs
and params.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:50 -04:00
Alex Deucher 360b1f5e62 drm/radeon: update radeon_atom_get_clock_dividers() for SI
SI uses v5 of the command table and uses a different table
for memory PLLs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:49 -04:00
Alex Deucher 6e2c3c0ae7 drm/radeon/cik: add pcie_port indirect register accessors
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:48 -04:00
Alex Deucher 2c67912c43 drm/radeon: add get_xclk() callback for CIK
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:48 -04:00
Alex Deucher 1d5d0c3497 drm/radeon: add indirect register accessors for SMC registers
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:47 -04:00
Alex Deucher cc066715e6 drm/radeon: update CIK soft reset
Update to the newer programming model.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:46 -04:00
Alex Deucher 44fa346f7a drm/radeon: add get_gpu_clock_counter() callback for cik
Used for GPU clock counter snapshots.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:45 -04:00
Alex Deucher 64f759cc6a drm/radeon: Update radeon_info_ioctl for CIK (v2)
v2: rebase changes, fix a couple missed cases

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:45 -04:00
Alex Deucher c2037ad1e1 drm/radeon: add SS override support for KB/KV
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:44 -04:00
Alex Deucher c7d2f227e3 drm/radeon: use frac fb div on DCE8
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:43 -04:00
Alex Deucher 2f0047b2ba drm/radeon: Handle PPLL0 powerdown on DCE8
Only Bonaire has PPLL0.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:43 -04:00
Alex Deucher 0331f6749e drm/radeon: add support pll selection for DCE8 (v4)
v2: make PPLL0 is available for non-DP on CI
v3: rebase changes, update documentation
v4: fix kabini

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:42 -04:00
Alex Deucher 8542c12b4c drm/radeon: update DISPCLK programming for DCE8
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:41 -04:00
Alex Deucher aea6564133 drm/radeon/atom: add support for new DVO tables
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:41 -04:00
Alex Deucher e68adef824 drm/radeon/atom: add DCE8 encoder support
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:40 -04:00
Alex Deucher 8da0e50092 drm/radeon/dce8: crtc_set_base updates
Some new fields and DESKTOP_HEIGHT register moved.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:39 -04:00
Alex Deucher d798f2f2c3 drm/radeon/dce8: properly handle interlaced timing
The register bits changed on DCE8 compared to previous
families.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:39 -04:00
Alex Deucher 9e05fa1d24 drm/radeon/cik: add hw cursor support (v2)
CIK (DCE8) hw cursors are programmed the same as evergreen
(DCE4) with the following caveats:
- cursors are now 128x128 pixels
- new alpha blend enable bit

v2: rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:38 -04:00
Alex Deucher cd84a27d18 drm/radeon/dce8: add support for display watermark setup
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:37 -04:00
Alex Deucher bc19f59704 drm/radeon: update power state parsing for CI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:36 -04:00
Alex Deucher 5115020714 drm/radeon: handle the integrated thermal controller on CI
No support for reading the temperature yet.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:36 -04:00
Alex Deucher 9ae94be523 drm/radeon: atombios power table updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:35 -04:00
Alex Deucher 1da8f5fbb1 drm/radeon: upstream atombios.h updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:34 -04:00
Alex Deucher b7aa4cda22 drm/radeon: upstream ObjectID.h updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:34 -04:00
Alex Deucher 7bf94a2c18 drm/radeon/cik: fill in startup/shutdown callbacks (v5)
v2: update to latest driver changes
v3: properly tear down vm on suspend
v4: fix up irq init ordering
v5: remove outdated comment

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-06-26 16:11:33 -04:00
Alex Deucher d0e092d969 drm/radeon/cik: add support for doing async VM pt updates (v5)
Async page table updates using the sDMA engine.  sDMA has a
special packet for updating entries for contiguous pages
that reduces overhead.

v2: add support for and use the CP for now.
v3: update for 2 level PTs
v4: rebase, fix DMA packet
v5: switch to using an IB

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:34 -04:00