Commit Graph

4 Commits

Author SHA1 Message Date
Stefan Roese b3c195b3a7 spi: orion: Add direct access mode
This patch adds support for the direct access mode to the Orion SPI
driver which is used on the Marvell Armada based SoCs. In this direct
mode, all data written to (or read from) a specifically mapped MBus
window (linked to one SPI chip-select on one of the SPI controllers)
will be transferred directly to the SPI bus. Without the need to control
the SPI registers in between. This can improve the SPI transfer rate in
such cases.

Both, direct-read and -write mode are supported. But only the write
mode has been tested. This mode especially benefits from the SPI direct
mode, as the data bytes are written head-to-head to the SPI bus,
without any additional addresses.

One use-case for this direct write mode is, programming a FPGA bitstream
image into the FPGA connected to the SPI bus at maximum speed.

This mode is described in chapter "22.5.2 Direct Write to SPI" in the
Marvell Armada XP Functional Spec Datasheet.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-30 17:01:20 +01:00
Gregory CLEMENT 4dacccfac6 spi: orion: Fix extended baud rates for each Armada SoCs
The commit df59fa7f4b "spi: orion: support armada extended baud
rates" made the assumptions that all the Armada SoCs supported the
same maximum frequency. However, according the hardware datasheet, the
maximum frequency supported by the Armada 370 SoC is tclk/4, for the
Armada XP, Armada 38x and Armada 39x SoCs the limitation is 50MHz and
for the Armada 375 it is tclk/15.

This patch introduces new compatible strings to handle all these
case. In order to be future proof a compatible was created for each
SoC even if currently some SoCs seem using the same IP.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-05-27 18:44:57 +01:00
Greg Ungerer df59fa7f4b spi: orion: support armada extended baud rates
The Armada SoC family implementation of this SPI hardware module has
extended the configuration register to allow for a wider range of SPI
clock rates. Specifically the Serial Baud Rate Pre-selection bits in the
SPI Interface Configuration Register now also use bits 6 and 7 as well.

Modify the baud rate calculation to handle these differences for the
Armada case. Potentially a baud rate can be setup using a number of
different pre-scalar and scalar combinations. This code tries all
possible pre-scalar divisors (8 in total) to try and find the most
accurate set.

This change introduces (and documents) a new device tree compatible
device name "armada-370-spi" to support this.

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-01 19:21:51 +01:00
Andrew Lunn f814f9ac5a spi/orion: add device tree binding
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2012-07-23 11:43:39 +01:00