Commit Graph

271 Commits

Author SHA1 Message Date
Brian Norris 5cb1327172 mtd: nand: fix memory leak in ONFI extended parameter page
This fixes a memory leak in the ONFI support code for detecting the
required ECC levels from this commit:

  commit 6dcbe0cdd8
  Author: Huang Shijie <b32955@freescale.com>
  Date:   Wed May 22 10:28:27 2013 +0800

      mtd: get the ECC info from the Extended Parameter Page

In the success case, we never freed the 'ep' buffer.

Also, this fixes an oversight in the same commit where we (harmlessly)
freed the NULL pointer.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-09-27 05:48:02 -05:00
Brian Norris d6a95080a2 mtd: nand: fixup kerneldoc, rename parameter
First, the function argument is 'offset' not 'column'.

Second, the 'data_buf' name is inconsistent with the rest of this file.
Just use 'buf'.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Gupta, Pekon <pekon@ti.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 21:40:49 +01:00
Huang Shijie 4204cccde5 mtd: set ONFI nand's default hooks in nand_set_defaults()
We may do some ONFI get/set features operations before we call the
nand_scan_tail().

So move the default ONFI nand hooks into nand_set_defaults().

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 21:38:12 +01:00
Huang Shijie bdf69c47ac mtd: set the ecc step size for master/slave mtd_info
Set the ecc step size for master/slave mtd_info{}.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 21:38:02 +01:00
Dan Carpenter daae74cad4 mtd: nand: silence some shift wrap warnings
There are static checkers which complain when we declare variables as
64 bit bitfields but only use the lower 32 bits because of shift
wrapping.  In this case "len" is declared as u64 as opposed to unsigned
long or something which might be 32 bits.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 21:36:35 +01:00
Huang Shijie 5721934206 mtd: parse out the ECC info for the full-id nand chips
Parse out the ECC information for the full-id nand chips.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 21:34:46 +01:00
Huang Shijie e2985fc1d6 mtd: replace the hardcode with the onfi_feature()
The current code uses the hardcode to detect the 16-bit bus width.
Use the onfi_feature() to replace it.

Signed-off-by: Huang Shijie <b32955@freescale.com>
[Brian: small fixup]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 21:34:44 +01:00
Huang Shijie 6dcbe0cdd8 mtd: get the ECC info from the Extended Parameter Page
Since the ONFI 2.1, the onfi spec adds the Extended Parameter Page
to store the ECC info.

The onfi spec tells us that if the nand chip's recommended ECC codeword
size is not 512 bytes, then the @ecc_bits is 0xff. The host _SHOULD_ then
read the Extended ECC information that is part of the extended parameter
page to retrieve the ECC requirements for this device.

This patch implement the reading of the Extended Parameter Page, and parses
the sections for ECC type, and get the ECC info from the ECC section.

Tested this patch with Micron MT29F64G08CBABAWP.

Acked-by: Pekon Gupta <pekon@ti.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
Reviewed-and-tested-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 21:34:42 +01:00
Huang Shijie 10c86babfb mtd: get the ECC info from the parameter page for ONFI nand
From the ONFI spec, we can just get the ECC info from the @ecc_bits field of
the parameter page.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Reviewed-and-tested-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 21:34:38 +01:00
Brian Norris b32843b772 mtd: nand: hide in-memory BBT implementation details
nand_base.c shouldn't have to know the implementation details of
nand_bbt's in-memory BBT. Specifically, nand_base shouldn't perform the
bit masking and shifting to isolate a BBT entry.

Instead, just move some of the BBT code into a new nand_markbad_bbt()
interface. This interface allows external users (i.e., nand_base) to
mark a single block as bad in the BBT. Then nand_bbt will take care of
modifying the in-memory BBT and updating the flash-based BBT (if
applicable).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 16:48:17 +01:00
Brian Norris 5a0edb251a mtd: nand: refactor chip->block_markbad interface
The chip->block_markbad pointer should really only be responsible for
writing a bad block marker for new bad blocks. It should not take care
of BBT-related functionality, nor should it handle bookkeeping of bad
block stats.

This patch refactors the 3 users of the block_markbad interface (plus
the default nand_base implementation) so that the common code is kept in
nand_block_markbad_lowlevel(). It removes some inconsistencies between
the various implementations and should allow for more centralized
improvements in the future.

Because gpmi-nand no longer needs the nand_update_bbt() function, let's
stop exporting it as well.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Acked-by: Huang Shijie <b32955@freescale.com> (for gpmi-nand parts)
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-30 16:47:52 +01:00
Brian Norris 60c6738245 mtd: nand: detect OOB size for Toshiba 24nm raw SLC
Toshiba NAND datasheets have not been very forthcoming on OOB size
information; they do not provide any bitfields in the ID string for
spare area. In their 24nm technology flash, however, Toshiba migrated
their NAND to have 32 bytes spare per 512 bytes of page area (up from
the traditional 16 bytes), as they now require 8-bit ECC or higher.

I have discussed this issue directly with Toshiba representatives, and
they acknowledge this problem. They recommend detecting these flash
based on their technology node as follows:

  For 24nm Toshiba SLC raw NAND (not BENAND -- Built-in Ecc NAND), there
  are 32 bytes of spare area for every 512 bytes of in-band data area.

We can implement this rule with the following snippet of a device ID
decode table, which applies to all their 43nm, 32nm, and 24nm SLC NAND
(this table is not fully in the NAND datasheets, but it was provided
directly by Toshiba representatives):

  - ID byte 5, bit[7]:
          1    -> BENAND
          0    -> raw SLC

  - ID byte 6, bits[2:0]:
          100b -> 43nm
          101b -> 32nm
          110b -> 24nm
          111b -> Reserved

I'm also working with Toshiba on including this bitfield description for
their 5th and 6th ID bytes in their public data sheets.

I will provide the 8-byte ID strings from the two 24nm Toshiba samples I
have; their first 6 bytes match the documentation I received from
Toshiba:

  24nm SLC 1Gbit TC58NVG0S3HTA00
  0x98 0xf1 0x80 0x15 0x72 0x16 0x08 0x00

  24nm SLC 2Gbit TC58NVG1S3HTA00
  0x98 0xda 0x90 0x15 0x76 0x16 0x08 0x00

I have also tested for regressions with:

  43nm SLC 4Gbit TC58NVG2S3ETA00
  0x98 0xdc 0x90 0x15 0x76 0x14 0x03 0x10

  32nm SLC 8Gbit TC58NVG3SOFA00
  0x98 0xd3 0x90 0x26 0x76 0x15 0x02 0x08

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-05 21:05:10 +01:00
Brian Norris 68e8078072 mtd: nand: fix NAND_BUSWIDTH_AUTO for x16 devices
The code for NAND_BUSWIDTH_AUTO is broken. According to Alexander:

  "I have a problem with attach NAND UBI in 16 bit mode.
   NAND works fine if I specify NAND_BUSWIDTH_16 option, but not
   working with NAND_BUSWIDTH_AUTO option. In second case NAND
   chip is identifyed with ONFI."

See his report for the rest of the details:

  http://lists.infradead.org/pipermail/linux-mtd/2013-July/047515.html

Anyway, the problem is that nand_set_defaults() is called twice, we
intend it to reset the chip functions to their x16 buswidth verions
if the buswidth changed from x8 to x16; however, nand_set_defaults()
does exactly nothing if called a second time.

Fix this by hacking nand_set_defaults() to reset the buswidth-dependent
functions if they were set to the x8 version the first time. Note that
this does not do anything to reset from x16 to x8, but that's not the
supported use case for NAND_BUSWIDTH_AUTO anyway.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reported-by: Alexander Shiyan <shc_work@mail.ru>
Tested-by: Alexander Shiyan <shc_work@mail.ru>
Cc: Matthieu Castet <matthieu.castet@parrot.com>
Cc: <stable@vger.kernel.org> # v3.8+
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-05 21:02:31 +01:00
David Mosberger d914c932d7 mtd: nand_base: Only use GET/SET FEATURES command on chips that support them.
Spansion's S34MLx chips support ONFI but not the GET/SET FEATURES calls.

Signed-off-by: David Mosberger <dmosberger@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-05 20:49:04 +01:00
Alexander Shiyan 76413839db mtd: nand_base: Use io{read, write}*_rep functions for transfer
This patch replaces the usage of loops in the nand_base code with
io{read,write}{8,16}_rep calls instead.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-08-05 20:46:39 +01:00
Gupta, Pekon 837a6ba4f3 mtd: nand: subpage write support for hardware based ECC schemes
This patch adds support for subpage (partial-page) writes when using
hardware based ECC schemes.
Advantages:
(1) reduces storage overhead when using file-systems like UBIFS, which
store LEB header at page-size granularity.
(2) allows independent subpage writes, thereby increasing NAND storage
efficiency for non-page aligned data.
+ updated cafe_nand and lpc32xx_mlc NAND drivers for change in
chip->write_page interface.

Signed-off-by: Gupta, Pekon <pekon@ti.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 13:22:59 +01:00
Huang Shijie ec6e87e378 mtd: add the support to parse out the full-id nand type
When we meet a full-id nand type whose @id_len is not zero, we can use
the find_full_id_nand() to parse out the necessary information for a
nand chip.

If we meet a non full-id nand type, we can handle it in the legacy way.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 13:20:42 +01:00
Alexander Shiyan 0cca9fbf5d mtd: nand_base: Removed unnecessary cleaning "onfi_version" variable
Variable "onfi_version" is already set to zero before nand_flash_detect_onfi()
call, so additional cleaning is not necessary.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 12:56:53 +01:00
Alexander Shiyan fb066adadd mtd: nand_base: Removed unnecessary command masking
NAND command, passed to cmd_ctrl(), is masked with 0xff. This patch
removes this since masking is not necessary and masking is not performed
in other places for same call.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 12:56:44 +01:00
Artem Bityutskiy 51148f1fb0 mtd: nand: remove few tiny page NAND bits
NAND flashes with 256 bytes NAND pages are so old that probably do not exist
any more. Let's remove few related pieces of code and forget about them
forever. The assumption will be that 512 bytes NAND page size is the minimum
possible.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 12:03:16 +01:00
Artem Bityutskiy 68aa352de2 mtd: nand: rename the id field of 'struct nand_flash_dev'
The 'id' is a bit confusing name because NAND IDs are multi-byte. Re-name
it to 'dev_id' to make it clear that this is the "device ID" part (the second
byte).

While on it, clean-up the commentary for 'struct nand_flash_dev'.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 12:02:41 +01:00
Artem Bityutskiy 3239a6cdef mtd: nand: use NAND_HAS_CACHEPROG
We have this unused macro, let's use it and justify its existence.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 12:02:19 +01:00
Artem Bityutskiy 0be718e552 mtd: nand: remove a bunch of unused commands
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 12:01:33 +01:00
Artem Bityutskiy 14c6578683 mtd: nand: remove AG-AND support
We have only one AG-AND driver and it was not touched since 2005. It looks
like AG-AND was not really make it to mass-production and can be considered
a dead technology.

Along with the AG-AND support, this patch removes the BBT_AUTO_REFRESH feature,
because the only user of this feature is AG-AND. And even though it is
implemented as a generic feature, I prefer to remove it because NAND flashes do
not really need it in this form.

Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-04-05 12:00:50 +01:00
Brian Norris 5bc7c33ca9 mtd: nand: reintroduce NAND_NO_READRDY as NAND_NEED_READRDY
This partially reverts commit 1696e6bc2a
("mtd: nand: kill NAND_NO_READRDY").

In that patch I overlooked a few things.

The original documentation for NAND_NO_READRDY included "True for all
large page devices, as they do not support autoincrement." I was
conflating "not support autoincrement" with the NAND_NO_AUTOINCR option,
which was in fact doing nothing. So, when I dropped NAND_NO_AUTOINCR, I
concluded that I then could harmlessly drop NAND_NO_READRDY. But of
course the fact the NAND_NO_AUTOINCR was doing nothing didn't mean
NAND_NO_READRDY was doing nothing...

So, NAND_NO_READRDY is re-introduced as NAND_NEED_READRDY and applied
only to those few remaining small-page NAND which needed it in the first
place.

Cc: stable@kernel.org [3.5+]
Reported-by: Alexander Shiyan <shc_work@mail.ru>
Tested-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-03-14 12:48:54 +00:00
Linus Torvalds 48476df998 Fairly unexciting MTD merge for 3.9:
* misc clean-ups in the MTD command-line partitioning parser (cmdlinepart)
  * add flash locking support for STmicro chips serial flash chips, as well as
    for CFI command set 2 chips.
  * new driver for the ELM error correction HW module found in various TI chips,
    enable the OMAP NAND driver to use the ELM HW error correction
  * added number of new serial flash IDs
  * various fixes and improvements in the gpmi NAND driver
  * bcm47xx NAND driver improvements
  * make the mtdpart module actually removable
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Merge tag 'for-linus-20130301' of git://git.infradead.org/linux-mtd

Pull MTD update from David Woodhouse:
 "Fairly unexciting MTD merge for 3.9:

   - misc clean-ups in the MTD command-line partitioning parser
     (cmdlinepart)
   - add flash locking support for STmicro chips serial flash chips, as
     well as for CFI command set 2 chips.
   - new driver for the ELM error correction HW module found in various
     TI chips, enable the OMAP NAND driver to use the ELM HW error
     correction
   - added number of new serial flash IDs
   - various fixes and improvements in the gpmi NAND driver
   - bcm47xx NAND driver improvements
   - make the mtdpart module actually removable"

* tag 'for-linus-20130301' of git://git.infradead.org/linux-mtd: (45 commits)
  mtd: map: BUG() in non handled cases
  mtd: bcm47xxnflash: use pr_fmt for module prefix in messages
  mtd: davinci_nand: Use managed resources
  mtd: mtd_torturetest can cause stack overflows
  mtd: physmap_of: Convert device allocation to managed devm_kzalloc()
  mtd: at91: atmel_nand: for PMECC, add code to check the ONFI parameter ECC requirement.
  mtd: atmel_nand: make pmecc-cap, pmecc-sector-size in dts is optional.
  mtd: atmel_nand: avoid to report an error when lookup table offset is 0.
  mtd: bcm47xxsflash: adjust names of bus-specific functions
  mtd: bcm47xxpart: improve probing of nvram partition
  mtd: bcm47xxpart: add support for other erase sizes
  mtd: bcm47xxnflash: register this as normal driver
  mtd: bcm47xxnflash: fix message
  mtd: bcm47xxsflash: register this as normal driver
  mtd: bcm47xxsflash: write number of written bytes
  mtd: gpmi: add sanity check for the ECC
  mtd: gpmi: set the Golois Field bit for mx6q's BCH
  mtd: devices: elm: Removes <xx> literals in elm DT node
  mtd: gpmi: fix a dereferencing freed memory error
  mtd: fix the wrong timeo for panic_nand_wait()
  ...
2013-03-02 16:33:54 -08:00
Huang Shijie 6d2559f8bc mtd: fix the wrong timeo for panic_nand_wait()
The panic_nand_wait() expects the timeo in ms and not in jiffies.
But in nand_wait(), the timeo for panic_nand_wait() is assigned with
wrong value(jiffies + some delay). The timeo should be set like the
panic_nand_write() does.

This patch passes timeo in ms to panic_nand_wait().
And this patch also passes timeo in jiffies(converted by msecs_to_jiffies)
to time_before() which makes the code more readable.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2013-02-04 09:36:39 +02:00
Matthieu CASTET 0ce82b7f7b mtd: nand: onfi don't WARN if we are in 16 bits mode
Commit ff3206b245 ('mtd: nand: onfi need 
to be probed in 8 bits mode') adds a WARN if the onfi probe is in 16 
bits mode. This allows to detect driver that need to be fixed, but this 
is a bit noisy¹. Transform the WARN in a pr_err.

¹ http://article.gmane.org/gmane.linux.ports.arm.omap/91317

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2013-01-19 09:58:33 +00:00
Brian Norris d4d4f1bf6a mtd: nand: typo in nand_id_has_period() comments
The simple example provided in the comments for nand_id_has_period()
actually has a period of 3, not 2. Silly mistake...

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-12-13 13:39:45 +02:00
Matthieu CASTET ff3206b245 mtd: nand: onfi need to be probed in 8 bits mode
- NAND_CMD_READID want an address that it is not scaled on x16 device (it is always 0x20)
- NAND_CMD_PARAM want 8 bits data

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-12-03 16:36:52 +02:00
Matthieu CASTET 64b37b2a63 mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
The driver call nand_scan_ident in 8 bit mode, then
readid or onfi detection are done (and detect bus width).
The driver should update its bus width before calling nand_scan_tail.

This work because readid and onfi are read work 8 byte mode.

Note that nand_scan_ident send command (NAND_CMD_RESET, NAND_CMD_READID, NAND_CMD_PARAM), address and read data
The ONFI specificication is not very clear for x16 device if high byte of address should be driven to 0,
but according to [1] it should be ok to not drive it during autodetection.

[1]
3.3.2. Target Initialization

[...]
The Read ID and Read Parameter Page commands only use the lower 8-bits of the data bus.
The host shall not issue commands that use a word data width on x16 devices until the host
determines the device supports a 16-bit data bus width in the parameter page.

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-12-03 16:36:52 +02:00
Matthieu CASTET 2fd71a294a mtd: nand: print flash size during detection
This help to detect bad flash identification in case the size is not present
on the name (ONFI).

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-12-03 16:36:52 +02:00
Matthieu CASTET ca6a248930 mted: nand_wait_ready timeout fix
nand_wait_ready timeout should not assume HZ=100.
Make it independent of HZ value by using msecs_to_jiffies.

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-12-03 16:36:52 +02:00
Huang Shijie 6a8214aa3d mtd: remove the "chip" parameter in nand_get_device()
There are two reasons to remove the "chip" parameter in nand_get_device():

[1] The nand_release_device() does not have the "chip" parameter.
[2] We can get the nand_chip by the mtd->priv field.

This patch removes the "chip" parameter in nand_get_device().

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-12-03 16:36:51 +02:00
Huang Shijie b0bb6903c8 mtd: remove the de-select chip code in nand_release_device()
The nand_get_device() does not select the chip, but nand_release_device()
does de-select the chip. It is really strange.

With the current code, nand_sync() will de-select the chip, even if the chip
has never been selected.

To make the balance of select/de-select chip, it's better to remove the
de-select chip code in nand_release_device() which makes the code more
clear.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-12-03 16:36:51 +02:00
Masanari Iida 064a7694b5 mtd: Fix typo mtd/tests
Correct spelling typo in printk within drivers/mtd/tests.

Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-18 16:03:37 +02:00
Huang Shijie 0730016465 mtd: de-select the chip when it is not used
When we scan several nand chips with nand_scan(), such as
     .......................
      nand_scan(*, 2);
     .......................

In nand_scan_ident(), the maxchips will become 2, so the current code
will select chip 1 to read the device ID. But the chip 0 is still
selected in this case.

To make the logic clear, we'd better de-select the chip when it is not used.

This patch de-select the nand chip if it is not used any more.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-18 16:02:31 +02:00
Matthieu CASTET f251b8dfdd mtd: nand_wait: warn if the nand is busy on exit
This patch allow to detect buggy driver/hardware with
bad RnB (dev_ready) management or when timeout occurs in polling mode.

This works when dev_ready is set or not set.
There are 2 methods to wait for an erase/program command completion:

1. Wait until nand RnB pin goes high (that's what chip->dev_ready usually does)
2. Poll the device: send a status (0x70) command and read status byte in a loop
   until bit NAND_STATUS_READY is set

In all cases, you should send a status command after completion, to check if
the operation was successful. And if the operation completed, the status should
have bit NAND_STATUS_READY set.

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15 19:50:30 +02:00
Huang Shijie 7483096665 mtd: use the NAND_STATUS_FAIL to replace the hardcode
Use the NAND_STATUS_FAIL to replace the hardcode "0x01",
which make the code more readable.

Signed-off-by: Huang Shijie <shijie8@gmail.com>
Acked-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15 15:37:50 +02:00
Brian Norris 6924d99fcd mtd: nand: fix Samsung SLC detection regression
This patch fixes errors seen in identifying old Samsung SLC, due to the
following commits:

    commit e2d3a35ee4
    mtd: nand: detect Samsung K9GBG08U0A, K9GAG08U0F ID

    commit e3b88bd604
    mtd: nand: add generic READ ID length calculation functions

Some Samsung NAND with "5-byte" ID really appear to have 6-byte IDs, with
wraparound like:

  Samsung K9K8G08U0D
  ec d3 51 95 58 ec ec d3

  Samsung K9F1G08U0C
  ec f1 00 95 40 ec ec f1

  Samsung K9F2G08U0B
  ec da 10 95 44 00 ec da

This bad wraparound makes it hard to reliably detect the difference
between Samsung SLC with 5-byte ID and Samsung SLC with 6-byte ID.

The fix is to, for now, only use the new Samsung table for MLC. We
cannot support the new SLC (K9FAG08U0M) until Samsung gives better ID
decode information.

Note that this applies in addition to the previous regression fix:

    commit bc86cf7af2
    mtd: nand: fix Samsung SLC NAND identification regression

Together, these patches completely restore the previous detection
behavior so that we cannot see any more regressions in Samsung SLC NAND
(finger crossed). With luck, I can get a hold of a Samsung
representative and stop having to cross my fingers eventually.

Reported-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15 15:37:43 +02:00
Brian Norris af451af4e0 mtd: nand: fix Samsung SLC NAND identification regression
A combination of the following two commits caused a regression in 3.7-rc1
when identifying some Samsung NAND, so that some previously working NAND
were no longer detected properly:

    commit e3b88bd604
    mtd: nand: add generic READ ID length calculation functions

    commit e2d3a35ee4
    mtd: nand: detect Samsung K9GBG08U0A, K9GAG08U0F ID

Particularly, a regression was seen on Samsung K9F2G08U0B, with the
following full 8-byte READ ID string:

    ec da 10 95 44 00 ec da

The basic problem is that Samsung manufactures both SLC and MLC NAND
that use a non-standard decoding table for deriving information from
their IDs. I have heuristically determined that all the chips that use
the new table have ID strings which wrap around after the 6th byte.
Unfortunately, I overlooked the fact that some older Samsung SLC (which
use a different decoding table) have "5 byte ID strings" which also wrap
around after the 6th byte.

This patch re-introduces a distinction between these old and new Samsung
NAND by checking that the 6th byte is non-zero, allowing both old and
new Samsung NAND to be detected properly.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Tested-by: Brian Norris <computersforpeace@gmail.com>
Reported-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
2012-11-15 15:37:16 +02:00
Brian Norris e2d3a35ee4 mtd: nand: detect Samsung K9GBG08U0A, K9GAG08U0F ID
Datasheets for the following Samsung NAND parts (both MLC and SLC) describe
extensions to the Samsung 6-byte extended ID decoding table:

K9GBG08U0A (MLC, 6-byte ID)
K9GAG08U0F (MLC, 6-byte ID)
K9FAG08U0M (SLC, 6-byte ID)

The table found in K9GAG08U0F, p.44, contains a superset of the information
found in other previous datasheets.

This patch adds support for all of these chips, with 512B and 640B OOB sizes.
It also changes the detection pattern such that this table applies to all
Samsung 6-byte ID NAND, not just MLC. This is safe, according to the NAND
parameter data I have collected:

Note that nand_base.c does not yet support the bad block marker scheme defined
for these chips (i.e., scan 1st and last page for BB markers).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:58:28 +01:00
Brian Norris 73ca392f7d mtd: nand: decode Hynix MLC, 6-byte ID length
Hynix has introduced a new ID decoding scheme for their newer MLC, some of
which don't support ONFI. The following devices all follow the pattern given in
the datasheet for Hynix H27UBG8T2B, p.22:

Hynix H27UAG8T2A
Hynix H27UBG8T2A
Hynix H27UBG8T2B

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:58:15 +01:00
Brian Norris e3b88bd604 mtd: nand: add generic READ ID length calculation functions
When decoding the extended ID bytes of a NAND chip, we have to calculate the ID
length according to some heuristic patterns (e.g., Does the ID wrap around?
Does it end in trailing zeros?). Currently, these heuristics are built into
complicated if/else blocks that can be hard to understand.

Now, these checks can be done generically in a function, making them more
robust and reusable. In fact, this sort of calculation is needed in future
additions to nand_base.c. And with this advancement, we get the added benefit
of a more readable "extended ID decode".

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:57:58 +01:00
Brian Norris f23a481c4e mtd: nand: split simple ID decode into its own function
When detecting NAND parameters, the code gets a little ugly so that the
logic is obscured. Try to remedy that by moving code to separate functions
that have well-defined purposes.

This patch splits out the simple ID decode functionality, where all the
information regarding NAND size/blocksize/pagesize/oobsize/busw is encoded in
the first two bytes of the ID string.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:57:42 +01:00
Brian Norris fc09bbc04c mtd: nand: split extended ID decoding into its own function
When detecting NAND parameters, the code gets a little ugly so that the
logic is obscured. Try to remedy that by moving code to separate functions
that have well-defined purposes.

This patch splits out the extended ID decode functionality, which handles
decoding the 3rd-8th ID bytes to determine NAND device parameters.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:57:38 +01:00
Brian Norris 7e74c2d714 mtd: nand: split BB marker options decoding into its own function
When detecting NAND parameters, the code gets a little ugly so that the
logic is obscured. Try to remedy that by moving code to separate functions
that have well-defined purposes.

This patch splits the bad block marker options detection into its own function,
away from the other parameters (e.g., chip size, page size, etc.).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:57:33 +01:00
Brian Norris 4aef9b78de mtd: nand: remove redundant ID read
Instead of reading 2 bytes then later 8 bytes, we can simply read all 8
bytes from the start.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:57:22 +01:00
Brian Norris 47450b3591 mtd: nand: remove unnecessary variable
We don't actually use the 'ret' variable; we set it, test it, and then it dies.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:57:08 +01:00
Huang Shijie 7db03eccfc mtd: add helpers to set/get features for ONFI nand
Add the set-features(0xef)/get-features(0xee) helpers for ONFI nand.
Also add the necessary macros.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-29 15:54:19 +01:00