Kevin Cernekee
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96983ffefc
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MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.
This extends commit a8ca8b64e3 to cover
MIPSxx-style board cache code.
Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2009-09-30 21:47:00 +02:00 |
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Ralf Baechle
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234fcd1484
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[MIPS] Fix loads of section missmatches
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2008-03-12 14:14:41 +00:00 |
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Ralf Baechle
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49a89efbbb
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[MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2007-10-11 23:46:15 +01:00 |
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Atsushi Nemoto
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a2c2bc4b26
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[MIPS] MIPS32/MIPS64 S-cache fix and cleanup
Use blast_scache_range, blast_inv_scache_range for mips32/mips64 scache
routine. Also initialize waybit for MIPS32/MIPS64 S-cache.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2006-06-29 21:10:54 +01:00 |
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Chris Dearman
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9318c51acd
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[MIPS] MIPS32/MIPS64 secondary cache management
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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2006-06-29 21:10:52 +01:00 |