/*
 * at91sam9g20.dtsi - Device Tree Include file for AT91SAM9G20 family SoC
 *
 *  Copyright (C) 2011 Atmel,
 *                2011 Nicolas Ferre <nicolas.ferre@atmel.com>,
 *                2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
 *
 * Licensed under GPLv2 or later.
 */

/include/ "skeleton.dtsi"

/ {
	model = "Atmel AT91SAM9G20 family SoC";
	compatible = "atmel,at91sam9g20";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		serial4 = &usart3;
		serial5 = &usart4;
		serial6 = &usart5;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		tcb0 = &tcb0;
		tcb1 = &tcb1;
	};
	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory@20000000 {
		reg = <0x20000000 0x08000000>;
	};

	ahb {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		apb {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			aic: interrupt-controller@fffff000 {
				#interrupt-cells = <2>;
				compatible = "atmel,at91rm9200-aic";
				interrupt-controller;
				interrupt-parent;
				reg = <0xfffff000 0x200>;
			};

			pit: timer@fffffd30 {
				compatible = "atmel,at91sam9260-pit";
				reg = <0xfffffd30 0xf>;
				interrupts = <1 4>;
			};

			tcb0: timer@fffa0000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffa0000 0x100>;
				interrupts = <17 4 18 4 19 4>;
			};

			tcb1: timer@fffdc000 {
				compatible = "atmel,at91rm9200-tcb";
				reg = <0xfffdc000 0x100>;
				interrupts = <26 4 27 4 28 4>;
			};

			pioA: gpio@fffff400 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff400 0x100>;
				interrupts = <2 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioB: gpio@fffff600 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff600 0x100>;
				interrupts = <3 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			pioC: gpio@fffff800 {
				compatible = "atmel,at91rm9200-gpio";
				reg = <0xfffff800 0x100>;
				interrupts = <4 4>;
				#gpio-cells = <2>;
				gpio-controller;
				interrupt-controller;
			};

			dbgu: serial@fffff200 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffff200 0x200>;
				interrupts = <1 4>;
				status = "disabled";
			};

			usart0: serial@fffb0000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb0000 0x200>;
				interrupts = <6 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart1: serial@fffb4000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb4000 0x200>;
				interrupts = <7 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart2: serial@fffb8000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffb8000 0x200>;
				interrupts = <8 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart3: serial@fffd0000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd0000 0x200>;
				interrupts = <23 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart4: serial@fffd4000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd4000 0x200>;
				interrupts = <24 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			usart5: serial@fffd8000 {
				compatible = "atmel,at91sam9260-usart";
				reg = <0xfffd8000 0x200>;
				interrupts = <25 4>;
				atmel,use-dma-rx;
				atmel,use-dma-tx;
				status = "disabled";
			};

			macb0: ethernet@fffc4000 {
				compatible = "cdns,at32ap7000-macb", "cdns,macb";
				reg = <0xfffc4000 0x100>;
				interrupts = <21 4>;
				status = "disabled";
			};
		};

		nand0: nand@40000000 {
			compatible = "atmel,at91rm9200-nand";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x40000000 0x10000000
			       0xffffe800 0x200
			      >;
			atmel,nand-addr-offset = <21>;
			atmel,nand-cmd-offset = <22>;
			gpios = <&pioC 13 0
				 &pioC 14 0
				 0
				>;
			status = "disabled";
		};
	};
};