371 lines
11 KiB
C
371 lines
11 KiB
C
/*
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* linux/drivers/video/omap2/dss/dss.h
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*
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* Copyright (C) 2009 Nokia Corporation
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* Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
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*
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* Some code and ideas taken from drivers/video/omap/ driver
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* by Imre Deak.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __OMAP2_DSS_H
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#define __OMAP2_DSS_H
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#ifdef CONFIG_OMAP2_DSS_DEBUG_SUPPORT
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#define DEBUG
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#endif
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#ifdef DEBUG
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extern unsigned int dss_debug;
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#ifdef DSS_SUBSYS_NAME
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#define DSSDBG(format, ...) \
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if (dss_debug) \
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printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME ": " format, \
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## __VA_ARGS__)
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#else
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#define DSSDBG(format, ...) \
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if (dss_debug) \
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printk(KERN_DEBUG "omapdss: " format, ## __VA_ARGS__)
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#endif
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#ifdef DSS_SUBSYS_NAME
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#define DSSDBGF(format, ...) \
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if (dss_debug) \
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printk(KERN_DEBUG "omapdss " DSS_SUBSYS_NAME \
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": %s(" format ")\n", \
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__func__, \
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## __VA_ARGS__)
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#else
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#define DSSDBGF(format, ...) \
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if (dss_debug) \
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printk(KERN_DEBUG "omapdss: " \
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": %s(" format ")\n", \
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__func__, \
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## __VA_ARGS__)
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#endif
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#else /* DEBUG */
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#define DSSDBG(format, ...)
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#define DSSDBGF(format, ...)
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#endif
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#ifdef DSS_SUBSYS_NAME
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#define DSSERR(format, ...) \
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printk(KERN_ERR "omapdss " DSS_SUBSYS_NAME " error: " format, \
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## __VA_ARGS__)
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#else
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#define DSSERR(format, ...) \
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printk(KERN_ERR "omapdss error: " format, ## __VA_ARGS__)
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#endif
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#ifdef DSS_SUBSYS_NAME
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#define DSSINFO(format, ...) \
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printk(KERN_INFO "omapdss " DSS_SUBSYS_NAME ": " format, \
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## __VA_ARGS__)
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#else
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#define DSSINFO(format, ...) \
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printk(KERN_INFO "omapdss: " format, ## __VA_ARGS__)
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#endif
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#ifdef DSS_SUBSYS_NAME
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#define DSSWARN(format, ...) \
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printk(KERN_WARNING "omapdss " DSS_SUBSYS_NAME ": " format, \
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## __VA_ARGS__)
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#else
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#define DSSWARN(format, ...) \
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printk(KERN_WARNING "omapdss: " format, ## __VA_ARGS__)
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#endif
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/* OMAP TRM gives bitfields as start:end, where start is the higher bit
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number. For example 7:0 */
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#define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
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#define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
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#define FLD_GET(val, start, end) (((val) & FLD_MASK(start, end)) >> (end))
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#define FLD_MOD(orig, val, start, end) \
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(((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end))
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#define DISPC_MAX_FCK 173000000
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enum omap_burst_size {
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OMAP_DSS_BURST_4x32 = 0,
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OMAP_DSS_BURST_8x32 = 1,
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OMAP_DSS_BURST_16x32 = 2,
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};
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enum omap_parallel_interface_mode {
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OMAP_DSS_PARALLELMODE_BYPASS, /* MIPI DPI */
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OMAP_DSS_PARALLELMODE_RFBI, /* MIPI DBI */
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OMAP_DSS_PARALLELMODE_DSI,
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};
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enum dss_clock {
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DSS_CLK_ICK = 1 << 0,
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DSS_CLK_FCK1 = 1 << 1,
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DSS_CLK_FCK2 = 1 << 2,
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DSS_CLK_54M = 1 << 3,
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DSS_CLK_96M = 1 << 4,
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};
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struct dss_clock_info {
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/* rates that we get with dividers below */
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unsigned long fck;
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/* dividers */
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u16 fck_div;
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};
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struct dispc_clock_info {
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/* rates that we get with dividers below */
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unsigned long lck;
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unsigned long pck;
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/* dividers */
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u16 lck_div;
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u16 pck_div;
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};
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struct dsi_clock_info {
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/* rates that we get with dividers below */
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unsigned long fint;
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unsigned long clkin4ddr;
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unsigned long clkin;
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unsigned long dsi1_pll_fclk;
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unsigned long dsi2_pll_fclk;
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unsigned long lp_clk;
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/* dividers */
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u16 regn;
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u16 regm;
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u16 regm3;
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u16 regm4;
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u16 lp_clk_div;
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u8 highfreq;
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bool use_dss2_fck;
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};
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struct seq_file;
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struct platform_device;
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/* core */
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void dss_clk_enable(enum dss_clock clks);
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void dss_clk_disable(enum dss_clock clks);
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unsigned long dss_clk_get_rate(enum dss_clock clk);
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int dss_need_ctx_restore(void);
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void dss_dump_clocks(struct seq_file *s);
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struct bus_type *dss_get_bus(void);
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/* display */
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int dss_suspend_all_devices(void);
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int dss_resume_all_devices(void);
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void dss_disable_all_devices(void);
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void dss_init_device(struct platform_device *pdev,
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struct omap_dss_device *dssdev);
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void dss_uninit_device(struct platform_device *pdev,
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struct omap_dss_device *dssdev);
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bool dss_use_replication(struct omap_dss_device *dssdev,
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enum omap_color_mode mode);
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void default_get_overlay_fifo_thresholds(enum omap_plane plane,
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u32 fifo_size, enum omap_burst_size *burst_size,
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u32 *fifo_low, u32 *fifo_high);
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/* manager */
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int dss_init_overlay_managers(struct platform_device *pdev);
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void dss_uninit_overlay_managers(struct platform_device *pdev);
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int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl);
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void dss_setup_partial_planes(struct omap_dss_device *dssdev,
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u16 *x, u16 *y, u16 *w, u16 *h);
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void dss_start_update(struct omap_dss_device *dssdev);
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/* overlay */
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void dss_init_overlays(struct platform_device *pdev);
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void dss_uninit_overlays(struct platform_device *pdev);
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int dss_check_overlay(struct omap_overlay *ovl, struct omap_dss_device *dssdev);
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void dss_overlay_setup_dispc_manager(struct omap_overlay_manager *mgr);
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#ifdef L4_EXAMPLE
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void dss_overlay_setup_l4_manager(struct omap_overlay_manager *mgr);
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#endif
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void dss_recheck_connections(struct omap_dss_device *dssdev, bool force);
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/* DSS */
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int dss_init(bool skip_init);
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void dss_exit(void);
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void dss_save_context(void);
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void dss_restore_context(void);
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void dss_dump_regs(struct seq_file *s);
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void dss_sdi_init(u8 datapairs);
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int dss_sdi_enable(void);
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void dss_sdi_disable(void);
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void dss_select_clk_source(bool dsi, bool dispc);
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int dss_get_dsi_clk_source(void);
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int dss_get_dispc_clk_source(void);
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void dss_set_venc_output(enum omap_dss_venc_type type);
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void dss_set_dac_pwrdn_bgz(bool enable);
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unsigned long dss_get_dpll4_rate(void);
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int dss_calc_clock_rates(struct dss_clock_info *cinfo);
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int dss_set_clock_div(struct dss_clock_info *cinfo);
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int dss_get_clock_div(struct dss_clock_info *cinfo);
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int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
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struct dss_clock_info *dss_cinfo,
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struct dispc_clock_info *dispc_cinfo);
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/* SDI */
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int sdi_init(bool skip_init);
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void sdi_exit(void);
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int sdi_init_display(struct omap_dss_device *display);
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/* DSI */
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int dsi_init(struct platform_device *pdev);
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void dsi_exit(void);
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void dsi_dump_clocks(struct seq_file *s);
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void dsi_dump_regs(struct seq_file *s);
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void dsi_save_context(void);
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void dsi_restore_context(void);
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int dsi_init_display(struct omap_dss_device *display);
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void dsi_irq_handler(void);
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unsigned long dsi_get_dsi1_pll_rate(void);
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int dsi_pll_set_clock_div(struct dsi_clock_info *cinfo);
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int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck,
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struct dsi_clock_info *cinfo,
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struct dispc_clock_info *dispc_cinfo);
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int dsi_pll_init(struct omap_dss_device *dssdev, bool enable_hsclk,
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bool enable_hsdiv);
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void dsi_pll_uninit(void);
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void dsi_get_overlay_fifo_thresholds(enum omap_plane plane,
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u32 fifo_size, enum omap_burst_size *burst_size,
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u32 *fifo_low, u32 *fifo_high);
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/* DPI */
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int dpi_init(void);
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void dpi_exit(void);
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int dpi_init_display(struct omap_dss_device *dssdev);
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/* DISPC */
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int dispc_init(void);
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void dispc_exit(void);
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void dispc_dump_clocks(struct seq_file *s);
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void dispc_dump_regs(struct seq_file *s);
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void dispc_irq_handler(void);
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void dispc_fake_vsync_irq(void);
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void dispc_save_context(void);
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void dispc_restore_context(void);
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void dispc_enable_sidle(void);
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void dispc_disable_sidle(void);
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void dispc_lcd_enable_signal_polarity(bool act_high);
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void dispc_lcd_enable_signal(bool enable);
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void dispc_pck_free_enable(bool enable);
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void dispc_enable_fifohandcheck(bool enable);
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void dispc_set_lcd_size(u16 width, u16 height);
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void dispc_set_digit_size(u16 width, u16 height);
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u32 dispc_get_plane_fifo_size(enum omap_plane plane);
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void dispc_setup_plane_fifo(enum omap_plane plane, u32 low, u32 high);
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void dispc_enable_fifomerge(bool enable);
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void dispc_set_burst_size(enum omap_plane plane,
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enum omap_burst_size burst_size);
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void dispc_set_plane_ba0(enum omap_plane plane, u32 paddr);
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void dispc_set_plane_ba1(enum omap_plane plane, u32 paddr);
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void dispc_set_plane_pos(enum omap_plane plane, u16 x, u16 y);
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void dispc_set_plane_size(enum omap_plane plane, u16 width, u16 height);
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void dispc_set_channel_out(enum omap_plane plane,
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enum omap_channel channel_out);
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int dispc_setup_plane(enum omap_plane plane,
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u32 paddr, u16 screen_width,
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u16 pos_x, u16 pos_y,
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u16 width, u16 height,
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u16 out_width, u16 out_height,
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enum omap_color_mode color_mode,
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bool ilace,
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enum omap_dss_rotation_type rotation_type,
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u8 rotation, bool mirror,
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u8 global_alpha);
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bool dispc_go_busy(enum omap_channel channel);
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void dispc_go(enum omap_channel channel);
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void dispc_enable_lcd_out(bool enable);
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void dispc_enable_digit_out(bool enable);
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int dispc_enable_plane(enum omap_plane plane, bool enable);
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void dispc_enable_replication(enum omap_plane plane, bool enable);
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void dispc_set_parallel_interface_mode(enum omap_parallel_interface_mode mode);
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void dispc_set_tft_data_lines(u8 data_lines);
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void dispc_set_lcd_display_type(enum omap_lcd_display_type type);
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void dispc_set_loadmode(enum omap_dss_load_mode mode);
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void dispc_set_default_color(enum omap_channel channel, u32 color);
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u32 dispc_get_default_color(enum omap_channel channel);
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void dispc_set_trans_key(enum omap_channel ch,
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enum omap_dss_trans_key_type type,
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u32 trans_key);
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void dispc_get_trans_key(enum omap_channel ch,
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enum omap_dss_trans_key_type *type,
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u32 *trans_key);
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void dispc_enable_trans_key(enum omap_channel ch, bool enable);
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void dispc_enable_alpha_blending(enum omap_channel ch, bool enable);
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bool dispc_trans_key_enabled(enum omap_channel ch);
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bool dispc_alpha_blending_enabled(enum omap_channel ch);
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bool dispc_lcd_timings_ok(struct omap_video_timings *timings);
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void dispc_set_lcd_timings(struct omap_video_timings *timings);
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unsigned long dispc_fclk_rate(void);
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unsigned long dispc_lclk_rate(void);
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unsigned long dispc_pclk_rate(void);
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void dispc_set_pol_freq(enum omap_panel_config config, u8 acbi, u8 acb);
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void dispc_find_clk_divs(bool is_tft, unsigned long req_pck, unsigned long fck,
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struct dispc_clock_info *cinfo);
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int dispc_calc_clock_rates(unsigned long dispc_fclk_rate,
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struct dispc_clock_info *cinfo);
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int dispc_set_clock_div(struct dispc_clock_info *cinfo);
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int dispc_get_clock_div(struct dispc_clock_info *cinfo);
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/* VENC */
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int venc_init(struct platform_device *pdev);
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void venc_exit(void);
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void venc_dump_regs(struct seq_file *s);
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int venc_init_display(struct omap_dss_device *display);
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/* RFBI */
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int rfbi_init(void);
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void rfbi_exit(void);
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void rfbi_dump_regs(struct seq_file *s);
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int rfbi_configure(int rfbi_module, int bpp, int lines);
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void rfbi_enable_rfbi(bool enable);
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void rfbi_transfer_area(u16 width, u16 height,
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void (callback)(void *data), void *data);
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void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t);
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unsigned long rfbi_get_max_tx_rate(void);
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int rfbi_init_display(struct omap_dss_device *display);
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#endif
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