267 lines
6.0 KiB
C
267 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Sharp QM1D1B0004 satellite tuner
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*
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* Copyright (C) 2014 Akihiro Tsukada <tskd08@gmail.com>
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*
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* based on (former) drivers/media/pci/pt1/va1j5jf8007s.c.
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*/
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/*
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* Note:
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* Since the data-sheet of this tuner chip is not available,
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* this driver lacks some tuner_ops and config options.
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* In addition, the implementation might be dependent on the specific use
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* in the FE module: VA1J5JF8007S and/or in the product: Earthsoft PT1/PT2.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <media/dvb_frontend.h>
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#include "qm1d1b0004.h"
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/*
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* Tuner I/F (copied from the former va1j5jf8007s.c)
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* b[0] I2C addr
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* b[1] "0":1, BG:2, divider_quotient[7:3]:5
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* b[2] divider_quotient[2:0]:3, divider_remainder:5
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* b[3] "111":3, LPF[3:2]:2, TM:1, "0":1, REF:1
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* b[4] BANDX, PSC:1, LPF[1:0]:2, DIV:1, "0":1
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*
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* PLL frequency step :=
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* REF == 0 -> PLL XTL frequency(4MHz) / 8
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* REF == 1 -> PLL XTL frequency(4MHz) / 4
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*
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* PreScaler :=
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* PSC == 0 -> x32
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* PSC == 1 -> x16
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*
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* divider_quotient := (frequency / PLL frequency step) / PreScaler
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* divider_remainder := (frequency / PLL frequency step) % PreScaler
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*
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* LPF := LPF Frequency / 1000 / 2 - 2
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* LPF Frequency @ baudrate=28.86Mbps = 30000
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*
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* band (1..9)
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* band 1 (freq < 986000) -> DIV:1, BANDX:5, PSC:1
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* band 2 (freq < 1072000) -> DIV:1, BANDX:6, PSC:1
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* band 3 (freq < 1154000) -> DIV:1, BANDX:7, PSC:0
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* band 4 (freq < 1291000) -> DIV:0, BANDX:1, PSC:0
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* band 5 (freq < 1447000) -> DIV:0, BANDX:2, PSC:0
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* band 6 (freq < 1615000) -> DIV:0, BANDX:3, PSC:0
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* band 7 (freq < 1791000) -> DIV:0, BANDX:4, PSC:0
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* band 8 (freq < 1972000) -> DIV:0, BANDX:5, PSC:0
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* band 9 (freq < 2150000) -> DIV:0, BANDX:6, PSC:0
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*/
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#define QM1D1B0004_PSC_MASK (1 << 4)
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#define QM1D1B0004_XTL_FREQ 4000
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#define QM1D1B0004_LPF_FALLBACK 30000
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#if 0 /* Currently unused */
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static const struct qm1d1b0004_config default_cfg = {
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.lpf_freq = QM1D1B0004_CFG_LPF_DFLT,
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.half_step = false,
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};
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#endif
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struct qm1d1b0004_state {
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struct qm1d1b0004_config cfg;
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struct i2c_client *i2c;
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};
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struct qm1d1b0004_cb_map {
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u32 frequency;
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u8 cb;
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};
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static const struct qm1d1b0004_cb_map cb_maps[] = {
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{ 986000, 0xb2 },
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{ 1072000, 0xd2 },
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{ 1154000, 0xe2 },
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{ 1291000, 0x20 },
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{ 1447000, 0x40 },
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{ 1615000, 0x60 },
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{ 1791000, 0x80 },
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{ 1972000, 0xa0 },
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};
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static u8 lookup_cb(u32 frequency)
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{
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int i;
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const struct qm1d1b0004_cb_map *map;
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for (i = 0; i < ARRAY_SIZE(cb_maps); i++) {
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map = &cb_maps[i];
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if (frequency < map->frequency)
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return map->cb;
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}
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return 0xc0;
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}
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static int qm1d1b0004_set_params(struct dvb_frontend *fe)
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{
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struct qm1d1b0004_state *state;
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u32 frequency, pll, lpf_freq;
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u16 word;
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u8 buf[4], cb, lpf;
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int ret;
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state = fe->tuner_priv;
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frequency = fe->dtv_property_cache.frequency;
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pll = QM1D1B0004_XTL_FREQ / 4;
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if (state->cfg.half_step)
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pll /= 2;
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word = DIV_ROUND_CLOSEST(frequency, pll);
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cb = lookup_cb(frequency);
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if (cb & QM1D1B0004_PSC_MASK)
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word = (word << 1 & ~0x1f) | (word & 0x0f);
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/* step.1: set frequency with BG:2, TM:0(4MHZ), LPF:4MHz */
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buf[0] = 0x40 | word >> 8;
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buf[1] = word;
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/* inconsisnten with the above I/F doc. maybe the doc is wrong */
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buf[2] = 0xe0 | state->cfg.half_step;
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buf[3] = cb;
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ret = i2c_master_send(state->i2c, buf, 4);
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if (ret < 0)
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return ret;
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/* step.2: set TM:1 */
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buf[0] = 0xe4 | state->cfg.half_step;
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ret = i2c_master_send(state->i2c, buf, 1);
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if (ret < 0)
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return ret;
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msleep(20);
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/* step.3: set LPF */
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lpf_freq = state->cfg.lpf_freq;
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if (lpf_freq == QM1D1B0004_CFG_LPF_DFLT)
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lpf_freq = fe->dtv_property_cache.symbol_rate / 1000;
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if (lpf_freq == 0)
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lpf_freq = QM1D1B0004_LPF_FALLBACK;
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lpf = DIV_ROUND_UP(lpf_freq, 2000) - 2;
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buf[0] = 0xe4 | ((lpf & 0x0c) << 1) | state->cfg.half_step;
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buf[1] = cb | ((lpf & 0x03) << 2);
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ret = i2c_master_send(state->i2c, buf, 2);
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if (ret < 0)
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return ret;
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/* step.4: read PLL lock? */
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buf[0] = 0;
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ret = i2c_master_recv(state->i2c, buf, 1);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int qm1d1b0004_set_config(struct dvb_frontend *fe, void *priv_cfg)
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{
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struct qm1d1b0004_state *state;
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state = fe->tuner_priv;
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memcpy(&state->cfg, priv_cfg, sizeof(state->cfg));
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return 0;
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}
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static int qm1d1b0004_init(struct dvb_frontend *fe)
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{
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struct qm1d1b0004_state *state;
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u8 buf[2] = {0xf8, 0x04};
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state = fe->tuner_priv;
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if (state->cfg.half_step)
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buf[0] |= 0x01;
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return i2c_master_send(state->i2c, buf, 2);
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}
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static const struct dvb_tuner_ops qm1d1b0004_ops = {
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.info = {
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.name = "Sharp qm1d1b0004",
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.frequency_min_hz = 950 * MHz,
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.frequency_max_hz = 2150 * MHz,
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},
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.init = qm1d1b0004_init,
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.set_params = qm1d1b0004_set_params,
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.set_config = qm1d1b0004_set_config,
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};
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static int
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qm1d1b0004_probe(struct i2c_client *client, const struct i2c_device_id *id)
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{
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struct dvb_frontend *fe;
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struct qm1d1b0004_config *cfg;
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struct qm1d1b0004_state *state;
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int ret;
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cfg = client->dev.platform_data;
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fe = cfg->fe;
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i2c_set_clientdata(client, fe);
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fe->tuner_priv = kzalloc(sizeof(struct qm1d1b0004_state), GFP_KERNEL);
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if (!fe->tuner_priv) {
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ret = -ENOMEM;
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goto err_mem;
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}
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memcpy(&fe->ops.tuner_ops, &qm1d1b0004_ops, sizeof(fe->ops.tuner_ops));
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state = fe->tuner_priv;
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state->i2c = client;
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ret = qm1d1b0004_set_config(fe, cfg);
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if (ret != 0)
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goto err_priv;
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dev_info(&client->dev, "Sharp QM1D1B0004 attached.\n");
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return 0;
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err_priv:
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kfree(fe->tuner_priv);
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err_mem:
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fe->tuner_priv = NULL;
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return ret;
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}
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static int qm1d1b0004_remove(struct i2c_client *client)
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{
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struct dvb_frontend *fe;
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fe = i2c_get_clientdata(client);
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kfree(fe->tuner_priv);
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fe->tuner_priv = NULL;
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return 0;
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}
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static const struct i2c_device_id qm1d1b0004_id[] = {
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{"qm1d1b0004", 0},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, qm1d1b0004_id);
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static struct i2c_driver qm1d1b0004_driver = {
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.driver = {
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.name = "qm1d1b0004",
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},
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.probe = qm1d1b0004_probe,
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.remove = qm1d1b0004_remove,
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.id_table = qm1d1b0004_id,
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};
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module_i2c_driver(qm1d1b0004_driver);
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MODULE_DESCRIPTION("Sharp QM1D1B0004");
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MODULE_AUTHOR("Akihiro Tsukada");
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MODULE_LICENSE("GPL");
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