88 lines
3.1 KiB
C
88 lines
3.1 KiB
C
/*
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* Low-level task switching. This is based on information published in
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* the Processor Abstraction Layer and the System Abstraction Layer
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* manual.
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*
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* Copyright (C) 1998-2003 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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* Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
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* Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
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*/
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#ifndef _ASM_IA64_SWITCH_TO_H
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#define _ASM_IA64_SWITCH_TO_H
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#include <linux/percpu.h>
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struct task_struct;
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/*
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* Context switch from one thread to another. If the two threads have
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* different address spaces, schedule() has already taken care of
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* switching to the new address space by calling switch_mm().
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*
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* Disabling access to the fph partition and the debug-register
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* context switch MUST be done before calling ia64_switch_to() since a
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* newly created thread returns directly to
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* ia64_ret_from_syscall_clear_r8.
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*/
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extern struct task_struct *ia64_switch_to (void *next_task);
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extern void ia64_save_extra (struct task_struct *task);
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extern void ia64_load_extra (struct task_struct *task);
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING
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extern void ia64_account_on_switch (struct task_struct *prev, struct task_struct *next);
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# define IA64_ACCOUNT_ON_SWITCH(p,n) ia64_account_on_switch(p,n)
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#else
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# define IA64_ACCOUNT_ON_SWITCH(p,n)
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#endif
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#ifdef CONFIG_PERFMON
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DECLARE_PER_CPU(unsigned long, pfm_syst_info);
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# define PERFMON_IS_SYSWIDE() (__get_cpu_var(pfm_syst_info) & 0x1)
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#else
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# define PERFMON_IS_SYSWIDE() (0)
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#endif
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#define IA64_HAS_EXTRA_STATE(t) \
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((t)->thread.flags & (IA64_THREAD_DBG_VALID|IA64_THREAD_PM_VALID) \
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|| PERFMON_IS_SYSWIDE())
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#define __switch_to(prev,next,last) do { \
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IA64_ACCOUNT_ON_SWITCH(prev, next); \
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if (IA64_HAS_EXTRA_STATE(prev)) \
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ia64_save_extra(prev); \
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if (IA64_HAS_EXTRA_STATE(next)) \
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ia64_load_extra(next); \
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ia64_psr(task_pt_regs(next))->dfh = !ia64_is_local_fpu_owner(next); \
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(last) = ia64_switch_to((next)); \
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} while (0)
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#ifdef CONFIG_SMP
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/*
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* In the SMP case, we save the fph state when context-switching away from a thread that
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* modified fph. This way, when the thread gets scheduled on another CPU, the CPU can
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* pick up the state from task->thread.fph, avoiding the complication of having to fetch
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* the latest fph state from another CPU. In other words: eager save, lazy restore.
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*/
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# define switch_to(prev,next,last) do { \
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if (ia64_psr(task_pt_regs(prev))->mfh && ia64_is_local_fpu_owner(prev)) { \
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ia64_psr(task_pt_regs(prev))->mfh = 0; \
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(prev)->thread.flags |= IA64_THREAD_FPH_VALID; \
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__ia64_save_fpu((prev)->thread.fph); \
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} \
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__switch_to(prev, next, last); \
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/* "next" in old context is "current" in new context */ \
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if (unlikely((current->thread.flags & IA64_THREAD_MIGRATION) && \
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(task_cpu(current) != \
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task_thread_info(current)->last_cpu))) { \
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platform_migrate(current); \
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task_thread_info(current)->last_cpu = task_cpu(current); \
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} \
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} while (0)
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#else
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# define switch_to(prev,next,last) __switch_to(prev, next, last)
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#endif
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#endif /* _ASM_IA64_SWITCH_TO_H */
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