580 lines
12 KiB
C
580 lines
12 KiB
C
/*
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* Montage M88TS2022 silicon tuner driver
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*
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* Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Some calculations are taken from existing TS2020 driver.
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*/
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#include "m88ts2022_priv.h"
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static int m88ts2022_cmd(struct m88ts2022_dev *dev, int op, int sleep, u8 reg,
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u8 mask, u8 val, u8 *reg_val)
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{
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int ret, i;
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unsigned int utmp;
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struct m88ts2022_reg_val reg_vals[] = {
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{0x51, 0x1f - op},
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{0x51, 0x1f},
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{0x50, 0x00 + op},
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{0x50, 0x00},
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};
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for (i = 0; i < 2; i++) {
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dev_dbg(&dev->client->dev,
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"i=%d op=%02x reg=%02x mask=%02x val=%02x\n",
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i, op, reg, mask, val);
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for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
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ret = regmap_write(dev->regmap, reg_vals[i].reg,
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reg_vals[i].val);
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if (ret)
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goto err;
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}
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usleep_range(sleep * 1000, sleep * 10000);
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ret = regmap_read(dev->regmap, reg, &utmp);
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if (ret)
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goto err;
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if ((utmp & mask) != val)
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break;
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}
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if (reg_val)
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*reg_val = utmp;
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err:
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return ret;
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}
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static int m88ts2022_set_params(struct dvb_frontend *fe)
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{
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struct m88ts2022_dev *dev = fe->tuner_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret;
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unsigned int utmp, frequency_khz, frequency_offset_khz, f_3db_hz;
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unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n, gdiv28;
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u8 buf[3], u8tmp, cap_code, lpf_gm, lpf_mxdiv, div_max, div_min;
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u16 u16tmp;
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dev_dbg(&dev->client->dev,
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"frequency=%d symbol_rate=%d rolloff=%d\n",
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c->frequency, c->symbol_rate, c->rolloff);
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/*
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* Integer-N PLL synthesizer
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* kHz is used for all calculations to keep calculations within 32-bit
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*/
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f_ref_khz = DIV_ROUND_CLOSEST(dev->cfg.clock, 1000);
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div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
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if (c->symbol_rate < 5000000)
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frequency_offset_khz = 3000; /* 3 MHz */
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else
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frequency_offset_khz = 0;
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frequency_khz = c->frequency + frequency_offset_khz;
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if (frequency_khz < 1103000) {
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div_out = 4;
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u8tmp = 0x1b;
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} else {
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div_out = 2;
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u8tmp = 0x0b;
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}
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buf[0] = u8tmp;
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buf[1] = 0x40;
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ret = regmap_bulk_write(dev->regmap, 0x10, buf, 2);
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if (ret)
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goto err;
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f_vco_khz = frequency_khz * div_out;
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pll_n = f_vco_khz * div_ref / f_ref_khz;
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pll_n += pll_n % 2;
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dev->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
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if (pll_n < 4095)
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u16tmp = pll_n - 1024;
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else if (pll_n < 6143)
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u16tmp = pll_n + 1024;
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else
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u16tmp = pll_n + 3072;
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buf[0] = (u16tmp >> 8) & 0x3f;
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buf[1] = (u16tmp >> 0) & 0xff;
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buf[2] = div_ref - 8;
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ret = regmap_bulk_write(dev->regmap, 0x01, buf, 3);
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if (ret)
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goto err;
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dev_dbg(&dev->client->dev,
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"frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
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dev->frequency_khz, dev->frequency_khz - c->frequency,
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f_vco_khz, pll_n, div_ref, div_out);
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ret = m88ts2022_cmd(dev, 0x10, 5, 0x15, 0x40, 0x00, NULL);
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if (ret)
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goto err;
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ret = regmap_read(dev->regmap, 0x14, &utmp);
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if (ret)
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goto err;
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utmp &= 0x7f;
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if (utmp < 64) {
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ret = regmap_update_bits(dev->regmap, 0x10, 0x80, 0x80);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x11, 0x6f);
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if (ret)
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goto err;
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ret = m88ts2022_cmd(dev, 0x10, 5, 0x15, 0x40, 0x00, NULL);
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if (ret)
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goto err;
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}
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ret = regmap_read(dev->regmap, 0x14, &utmp);
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if (ret)
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goto err;
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utmp &= 0x1f;
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if (utmp > 19) {
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ret = regmap_update_bits(dev->regmap, 0x10, 0x02, 0x00);
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if (ret)
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goto err;
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}
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ret = m88ts2022_cmd(dev, 0x08, 5, 0x3c, 0xff, 0x00, NULL);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x25, 0x00);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x27, 0x70);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x41, 0x09);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x08, 0x0b);
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if (ret)
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goto err;
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/* filters */
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gdiv28 = DIV_ROUND_CLOSEST(f_ref_khz * 1694U, 1000000U);
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ret = regmap_write(dev->regmap, 0x04, gdiv28);
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if (ret)
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goto err;
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ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
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if (ret)
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goto err;
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cap_code = u8tmp & 0x3f;
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ret = regmap_write(dev->regmap, 0x41, 0x0d);
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if (ret)
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goto err;
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ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
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if (ret)
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goto err;
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u8tmp &= 0x3f;
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cap_code = (cap_code + u8tmp) / 2;
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gdiv28 = gdiv28 * 207 / (cap_code * 2 + 151);
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div_max = gdiv28 * 135 / 100;
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div_min = gdiv28 * 78 / 100;
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div_max = clamp_val(div_max, 0U, 63U);
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f_3db_hz = mult_frac(c->symbol_rate, 135, 200);
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f_3db_hz += 2000000U + (frequency_offset_khz * 1000U);
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f_3db_hz = clamp(f_3db_hz, 7000000U, 40000000U);
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#define LPF_COEFF 3200U
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lpf_gm = DIV_ROUND_CLOSEST(f_3db_hz * gdiv28, LPF_COEFF * f_ref_khz);
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lpf_gm = clamp_val(lpf_gm, 1U, 23U);
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lpf_mxdiv = DIV_ROUND_CLOSEST(lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
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if (lpf_mxdiv < div_min)
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lpf_mxdiv = DIV_ROUND_CLOSEST(++lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
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lpf_mxdiv = clamp_val(lpf_mxdiv, 0U, div_max);
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ret = regmap_write(dev->regmap, 0x04, lpf_mxdiv);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x06, lpf_gm);
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if (ret)
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goto err;
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ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
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if (ret)
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goto err;
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cap_code = u8tmp & 0x3f;
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ret = regmap_write(dev->regmap, 0x41, 0x09);
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if (ret)
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goto err;
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ret = m88ts2022_cmd(dev, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
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if (ret)
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goto err;
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u8tmp &= 0x3f;
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cap_code = (cap_code + u8tmp) / 2;
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u8tmp = cap_code | 0x80;
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ret = regmap_write(dev->regmap, 0x25, u8tmp);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x27, 0x30);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x08, 0x09);
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if (ret)
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goto err;
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ret = m88ts2022_cmd(dev, 0x01, 20, 0x21, 0xff, 0x00, NULL);
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if (ret)
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goto err;
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err:
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if (ret)
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dev_dbg(&dev->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int m88ts2022_init(struct dvb_frontend *fe)
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{
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struct m88ts2022_dev *dev = fe->tuner_priv;
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int ret, i;
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u8 u8tmp;
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static const struct m88ts2022_reg_val reg_vals[] = {
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{0x7d, 0x9d},
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{0x7c, 0x9a},
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{0x7a, 0x76},
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{0x3b, 0x01},
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{0x63, 0x88},
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{0x61, 0x85},
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{0x22, 0x30},
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{0x30, 0x40},
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{0x20, 0x23},
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{0x24, 0x02},
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{0x12, 0xa0},
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};
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dev_dbg(&dev->client->dev, "\n");
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ret = regmap_write(dev->regmap, 0x00, 0x01);
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if (ret)
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goto err;
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ret = regmap_write(dev->regmap, 0x00, 0x03);
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if (ret)
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goto err;
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switch (dev->cfg.clock_out) {
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case M88TS2022_CLOCK_OUT_DISABLED:
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u8tmp = 0x60;
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break;
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case M88TS2022_CLOCK_OUT_ENABLED:
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u8tmp = 0x70;
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ret = regmap_write(dev->regmap, 0x05, dev->cfg.clock_out_div);
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if (ret)
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goto err;
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break;
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case M88TS2022_CLOCK_OUT_ENABLED_XTALOUT:
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u8tmp = 0x6c;
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break;
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default:
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goto err;
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}
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ret = regmap_write(dev->regmap, 0x42, u8tmp);
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if (ret)
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goto err;
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if (dev->cfg.loop_through)
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u8tmp = 0xec;
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else
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u8tmp = 0x6c;
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ret = regmap_write(dev->regmap, 0x62, u8tmp);
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if (ret)
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goto err;
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for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
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ret = regmap_write(dev->regmap, reg_vals[i].reg, reg_vals[i].val);
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if (ret)
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goto err;
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}
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err:
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if (ret)
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dev_dbg(&dev->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int m88ts2022_sleep(struct dvb_frontend *fe)
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{
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struct m88ts2022_dev *dev = fe->tuner_priv;
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int ret;
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dev_dbg(&dev->client->dev, "\n");
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ret = regmap_write(dev->regmap, 0x00, 0x00);
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if (ret)
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goto err;
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err:
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if (ret)
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dev_dbg(&dev->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static int m88ts2022_get_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct m88ts2022_dev *dev = fe->tuner_priv;
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dev_dbg(&dev->client->dev, "\n");
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*frequency = dev->frequency_khz;
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return 0;
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}
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static int m88ts2022_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct m88ts2022_dev *dev = fe->tuner_priv;
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dev_dbg(&dev->client->dev, "\n");
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*frequency = 0; /* Zero-IF */
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return 0;
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}
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static int m88ts2022_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
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{
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struct m88ts2022_dev *dev = fe->tuner_priv;
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int ret;
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u16 gain, u16tmp;
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unsigned int utmp, gain1, gain2, gain3;
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ret = regmap_read(dev->regmap, 0x3d, &utmp);
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if (ret)
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goto err;
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gain1 = (utmp >> 0) & 0x1f;
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gain1 = clamp(gain1, 0U, 15U);
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ret = regmap_read(dev->regmap, 0x21, &utmp);
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if (ret)
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goto err;
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gain2 = (utmp >> 0) & 0x1f;
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gain2 = clamp(gain2, 2U, 16U);
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ret = regmap_read(dev->regmap, 0x66, &utmp);
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if (ret)
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goto err;
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gain3 = (utmp >> 3) & 0x07;
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gain3 = clamp(gain3, 0U, 6U);
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gain = gain1 * 265 + gain2 * 338 + gain3 * 285;
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/* scale value to 0x0000-0xffff */
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u16tmp = (0xffff - gain);
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u16tmp = clamp_val(u16tmp, 59000U, 61500U);
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*strength = (u16tmp - 59000) * 0xffff / (61500 - 59000);
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err:
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if (ret)
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dev_dbg(&dev->client->dev, "failed=%d\n", ret);
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return ret;
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}
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static const struct dvb_tuner_ops m88ts2022_tuner_ops = {
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.info = {
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.name = "Montage M88TS2022",
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.frequency_min = 950000,
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.frequency_max = 2150000,
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},
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.init = m88ts2022_init,
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.sleep = m88ts2022_sleep,
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.set_params = m88ts2022_set_params,
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.get_frequency = m88ts2022_get_frequency,
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.get_if_frequency = m88ts2022_get_if_frequency,
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.get_rf_strength = m88ts2022_get_rf_strength,
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};
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static int m88ts2022_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct m88ts2022_config *cfg = client->dev.platform_data;
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struct dvb_frontend *fe = cfg->fe;
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struct m88ts2022_dev *dev;
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int ret;
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u8 u8tmp;
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unsigned int utmp;
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static const struct regmap_config regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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};
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dev = kzalloc(sizeof(*dev), GFP_KERNEL);
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if (!dev) {
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ret = -ENOMEM;
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dev_err(&client->dev, "kzalloc() failed\n");
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goto err;
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}
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memcpy(&dev->cfg, cfg, sizeof(struct m88ts2022_config));
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dev->client = client;
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dev->regmap = devm_regmap_init_i2c(client, ®map_config);
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if (IS_ERR(dev->regmap)) {
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ret = PTR_ERR(dev->regmap);
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goto err;
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}
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/* check if the tuner is there */
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ret = regmap_read(dev->regmap, 0x00, &utmp);
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if (ret)
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goto err;
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if ((utmp & 0x03) == 0x00) {
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ret = regmap_write(dev->regmap, 0x00, 0x01);
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if (ret)
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goto err;
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usleep_range(2000, 50000);
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}
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ret = regmap_write(dev->regmap, 0x00, 0x03);
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if (ret)
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goto err;
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usleep_range(2000, 50000);
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ret = regmap_read(dev->regmap, 0x00, &utmp);
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if (ret)
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goto err;
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dev_dbg(&dev->client->dev, "chip_id=%02x\n", utmp);
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switch (utmp) {
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case 0xc3:
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case 0x83:
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break;
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default:
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ret = -ENODEV;
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goto err;
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}
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switch (dev->cfg.clock_out) {
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case M88TS2022_CLOCK_OUT_DISABLED:
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u8tmp = 0x60;
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break;
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case M88TS2022_CLOCK_OUT_ENABLED:
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u8tmp = 0x70;
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ret = regmap_write(dev->regmap, 0x05, dev->cfg.clock_out_div);
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if (ret)
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goto err;
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break;
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|
case M88TS2022_CLOCK_OUT_ENABLED_XTALOUT:
|
|
u8tmp = 0x6c;
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
goto err;
|
|
}
|
|
|
|
ret = regmap_write(dev->regmap, 0x42, u8tmp);
|
|
if (ret)
|
|
goto err;
|
|
|
|
if (dev->cfg.loop_through)
|
|
u8tmp = 0xec;
|
|
else
|
|
u8tmp = 0x6c;
|
|
|
|
ret = regmap_write(dev->regmap, 0x62, u8tmp);
|
|
if (ret)
|
|
goto err;
|
|
|
|
/* sleep */
|
|
ret = regmap_write(dev->regmap, 0x00, 0x00);
|
|
if (ret)
|
|
goto err;
|
|
|
|
dev_info(&dev->client->dev, "Montage M88TS2022 successfully identified\n");
|
|
|
|
fe->tuner_priv = dev;
|
|
memcpy(&fe->ops.tuner_ops, &m88ts2022_tuner_ops,
|
|
sizeof(struct dvb_tuner_ops));
|
|
|
|
i2c_set_clientdata(client, dev);
|
|
return 0;
|
|
err:
|
|
dev_dbg(&client->dev, "failed=%d\n", ret);
|
|
kfree(dev);
|
|
return ret;
|
|
}
|
|
|
|
static int m88ts2022_remove(struct i2c_client *client)
|
|
{
|
|
struct m88ts2022_dev *dev = i2c_get_clientdata(client);
|
|
struct dvb_frontend *fe = dev->cfg.fe;
|
|
|
|
dev_dbg(&client->dev, "\n");
|
|
|
|
memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
|
|
fe->tuner_priv = NULL;
|
|
kfree(dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id m88ts2022_id[] = {
|
|
{"m88ts2022", 0},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, m88ts2022_id);
|
|
|
|
static struct i2c_driver m88ts2022_driver = {
|
|
.driver = {
|
|
.owner = THIS_MODULE,
|
|
.name = "m88ts2022",
|
|
},
|
|
.probe = m88ts2022_probe,
|
|
.remove = m88ts2022_remove,
|
|
.id_table = m88ts2022_id,
|
|
};
|
|
|
|
module_i2c_driver(m88ts2022_driver);
|
|
|
|
MODULE_DESCRIPTION("Montage M88TS2022 silicon tuner driver");
|
|
MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
|
|
MODULE_LICENSE("GPL");
|