f24be42aab
The new Coherent Accelerator Interface Architecture, level 2, for the IBM POWER9 brings new content and features: - POWER9 Service Layer - Registers - Radix mode - Process element entry - Dedicated-Shared Process Programming Model - Translation Fault Handling - CAPP - Memory Context ID If a valid mm_struct is found the memory context id is used for each transaction associated with the process handle. The PSL uses the context ID to find the corresponding process element. Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com> Acked-by: Frederic Barrat <fbarrat@linux.vnet.ibm.com> [mpe: Fixup comment formatting, unsplit long strings] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> |
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00-INDEX | ||
bootwrapper.txt | ||
cpu_families.txt | ||
cpu_features.txt | ||
cxl.txt | ||
cxlflash.txt | ||
dscr.txt | ||
eeh-pci-error-recovery.txt | ||
firmware-assisted-dump.txt | ||
hvcs.txt | ||
mpc52xx.txt | ||
pci_iov_resource_on_powernv.txt | ||
pmu-ebb.txt | ||
ptrace.txt | ||
qe_firmware.txt | ||
syscall64-abi.txt | ||
transactional_memory.txt |