831 lines
20 KiB
C
831 lines
20 KiB
C
/*
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* linux/arch/arm/mach-omap2/board-3430sdp.c
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*
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* Copyright (C) 2007 Texas Instruments
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*
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* Modified from mach-omap2/board-generic.c
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*
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* Initial code: Syed Mohammed Khasim
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/input.h>
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#include <linux/input/matrix_keypad.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/ads7846.h>
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#include <linux/i2c/twl.h>
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#include <linux/regulator/machine.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/mmc/host.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <plat/mcspi.h>
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#include <plat/board.h>
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#include <plat/usb.h>
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#include <plat/common.h>
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#include <plat/dma.h>
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#include <plat/gpmc.h>
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#include <plat/display.h>
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#include <plat/panel-generic-dpi.h>
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#include <plat/gpmc-smc91x.h>
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#include "board-flash.h"
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#include "mux.h"
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#include "sdram-qimonda-hyb18m512160af-6.h"
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#include "hsmmc.h"
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#include "pm.h"
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#include "control.h"
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#define CONFIG_DISABLE_HFCLK 1
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#define SDP3430_TS_GPIO_IRQ_SDPV1 3
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#define SDP3430_TS_GPIO_IRQ_SDPV2 2
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#define ENABLE_VAUX3_DEDICATED 0x03
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#define ENABLE_VAUX3_DEV_GRP 0x20
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#define TWL4030_MSECURE_GPIO 22
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/* FIXME: These values need to be updated based on more profiling on 3430sdp*/
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static struct cpuidle_params omap3_cpuidle_params_table[] = {
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/* C1 */
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{1, 2, 2, 5},
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/* C2 */
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{1, 10, 10, 30},
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/* C3 */
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{1, 50, 50, 300},
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/* C4 */
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{1, 1500, 1800, 4000},
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/* C5 */
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{1, 2500, 7500, 12000},
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/* C6 */
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{1, 3000, 8500, 15000},
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/* C7 */
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{1, 10000, 30000, 300000},
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};
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static uint32_t board_keymap[] = {
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KEY(0, 0, KEY_LEFT),
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KEY(0, 1, KEY_RIGHT),
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KEY(0, 2, KEY_A),
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KEY(0, 3, KEY_B),
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KEY(0, 4, KEY_C),
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KEY(1, 0, KEY_DOWN),
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KEY(1, 1, KEY_UP),
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KEY(1, 2, KEY_E),
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KEY(1, 3, KEY_F),
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KEY(1, 4, KEY_G),
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KEY(2, 0, KEY_ENTER),
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KEY(2, 1, KEY_I),
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KEY(2, 2, KEY_J),
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KEY(2, 3, KEY_K),
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KEY(2, 4, KEY_3),
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KEY(3, 0, KEY_M),
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KEY(3, 1, KEY_N),
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KEY(3, 2, KEY_O),
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KEY(3, 3, KEY_P),
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KEY(3, 4, KEY_Q),
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KEY(4, 0, KEY_R),
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KEY(4, 1, KEY_4),
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KEY(4, 2, KEY_T),
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KEY(4, 3, KEY_U),
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KEY(4, 4, KEY_D),
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KEY(5, 0, KEY_V),
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KEY(5, 1, KEY_W),
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KEY(5, 2, KEY_L),
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KEY(5, 3, KEY_S),
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KEY(5, 4, KEY_H),
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0
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};
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static struct matrix_keymap_data board_map_data = {
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.keymap = board_keymap,
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.keymap_size = ARRAY_SIZE(board_keymap),
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};
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static struct twl4030_keypad_data sdp3430_kp_data = {
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.keymap_data = &board_map_data,
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.rows = 5,
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.cols = 6,
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.rep = 1,
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};
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static int ts_gpio; /* Needed for ads7846_get_pendown_state */
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/**
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* @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
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*
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* @return - void. If request gpio fails then Flag KERN_ERR.
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*/
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static void ads7846_dev_init(void)
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{
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if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
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printk(KERN_ERR "can't get ads746 pen down GPIO\n");
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return;
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}
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gpio_direction_input(ts_gpio);
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gpio_set_debounce(ts_gpio, 310);
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}
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static int ads7846_get_pendown_state(void)
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{
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return !gpio_get_value(ts_gpio);
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}
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static struct ads7846_platform_data tsc2046_config __initdata = {
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.get_pendown_state = ads7846_get_pendown_state,
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.keep_vref_on = 1,
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.wakeup = true,
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};
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static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
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.turbo_mode = 0,
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.single_channel = 1, /* 0: slave, 1: master */
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};
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static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
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[0] = {
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/*
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* TSC2046 operates at a max freqency of 2MHz, so
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* operate slightly below at 1.5MHz
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*/
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.modalias = "ads7846",
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.bus_num = 1,
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.chip_select = 0,
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.max_speed_hz = 1500000,
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.controller_data = &tsc2046_mcspi_config,
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.irq = 0,
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.platform_data = &tsc2046_config,
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},
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};
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#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
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#define SDP3430_LCD_PANEL_ENABLE_GPIO 5
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static unsigned backlight_gpio;
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static unsigned enable_gpio;
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static int lcd_enabled;
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static int dvi_enabled;
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static void __init sdp3430_display_init(void)
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{
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int r;
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enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
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backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
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r = gpio_request(enable_gpio, "LCD reset");
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if (r) {
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printk(KERN_ERR "failed to get LCD reset GPIO\n");
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goto err0;
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}
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r = gpio_request(backlight_gpio, "LCD Backlight");
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if (r) {
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printk(KERN_ERR "failed to get LCD backlight GPIO\n");
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goto err1;
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}
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gpio_direction_output(enable_gpio, 0);
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gpio_direction_output(backlight_gpio, 0);
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return;
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err1:
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gpio_free(enable_gpio);
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err0:
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return;
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}
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static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
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{
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if (dvi_enabled) {
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printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
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return -EINVAL;
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}
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gpio_direction_output(enable_gpio, 1);
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gpio_direction_output(backlight_gpio, 1);
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lcd_enabled = 1;
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return 0;
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}
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static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
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{
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lcd_enabled = 0;
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gpio_direction_output(enable_gpio, 0);
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gpio_direction_output(backlight_gpio, 0);
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}
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static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
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{
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if (lcd_enabled) {
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printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
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return -EINVAL;
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}
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dvi_enabled = 1;
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return 0;
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}
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static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
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{
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dvi_enabled = 0;
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}
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static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
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{
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return 0;
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}
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static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
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{
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}
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static struct omap_dss_device sdp3430_lcd_device = {
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.name = "lcd",
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.driver_name = "sharp_ls_panel",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.phy.dpi.data_lines = 16,
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.platform_enable = sdp3430_panel_enable_lcd,
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.platform_disable = sdp3430_panel_disable_lcd,
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};
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static struct panel_generic_dpi_data dvi_panel = {
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.name = "generic",
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.platform_enable = sdp3430_panel_enable_dvi,
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.platform_disable = sdp3430_panel_disable_dvi,
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};
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static struct omap_dss_device sdp3430_dvi_device = {
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.name = "dvi",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.driver_name = "generic_dpi_panel",
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.data = &dvi_panel,
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.phy.dpi.data_lines = 24,
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};
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static struct omap_dss_device sdp3430_tv_device = {
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.name = "tv",
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.driver_name = "venc",
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.type = OMAP_DISPLAY_TYPE_VENC,
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.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
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.platform_enable = sdp3430_panel_enable_tv,
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.platform_disable = sdp3430_panel_disable_tv,
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};
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static struct omap_dss_device *sdp3430_dss_devices[] = {
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&sdp3430_lcd_device,
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&sdp3430_dvi_device,
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&sdp3430_tv_device,
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};
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static struct omap_dss_board_info sdp3430_dss_data = {
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.num_devices = ARRAY_SIZE(sdp3430_dss_devices),
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.devices = sdp3430_dss_devices,
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.default_device = &sdp3430_lcd_device,
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};
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static struct platform_device sdp3430_dss_device = {
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.name = "omapdss",
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.id = -1,
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.dev = {
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.platform_data = &sdp3430_dss_data,
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},
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};
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static struct regulator_consumer_supply sdp3430_vdda_dac_supply = {
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.supply = "vdda_dac",
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.dev = &sdp3430_dss_device.dev,
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};
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static struct platform_device *sdp3430_devices[] __initdata = {
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&sdp3430_dss_device,
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};
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static struct omap_board_config_kernel sdp3430_config[] __initdata = {
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};
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static void __init omap_3430sdp_init_irq(void)
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{
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omap_board_config = sdp3430_config;
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omap_board_config_size = ARRAY_SIZE(sdp3430_config);
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omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
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omap2_init_common_infrastructure();
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omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
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omap_init_irq();
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}
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static int sdp3430_batt_table[] = {
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/* 0 C*/
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30800, 29500, 28300, 27100,
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26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
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17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
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11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
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8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
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5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
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4040, 3910, 3790, 3670, 3550
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};
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static struct twl4030_bci_platform_data sdp3430_bci_data = {
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.battery_tmp_tbl = sdp3430_batt_table,
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.tblsize = ARRAY_SIZE(sdp3430_batt_table),
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};
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static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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/* 8 bits (default) requires S6.3 == ON,
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* so the SIM card isn't used; else 4 bits.
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*/
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
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.gpio_wp = 4,
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},
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{
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.mmc = 2,
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.caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
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.gpio_wp = 7,
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},
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{} /* Terminator */
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};
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static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
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.supply = "vmmc",
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};
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static struct regulator_consumer_supply sdp3430_vsim_supply = {
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.supply = "vmmc_aux",
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};
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static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
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.supply = "vmmc",
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};
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static int sdp3430_twl_gpio_setup(struct device *dev,
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unsigned gpio, unsigned ngpio)
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{
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/* gpio + 0 is "mmc0_cd" (input/IRQ),
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* gpio + 1 is "mmc1_cd" (input/IRQ)
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*/
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mmc[0].gpio_cd = gpio + 0;
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mmc[1].gpio_cd = gpio + 1;
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omap2_hsmmc_init(mmc);
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/* link regulators to MMC adapters ... we "know" the
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* regulators will be set up only *after* we return.
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*/
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sdp3430_vmmc1_supply.dev = mmc[0].dev;
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sdp3430_vsim_supply.dev = mmc[0].dev;
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sdp3430_vmmc2_supply.dev = mmc[1].dev;
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/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
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gpio_request(gpio + 7, "sub_lcd_en_bkl");
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gpio_direction_output(gpio + 7, 0);
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/* gpio + 15 is "sub_lcd_nRST" (output) */
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gpio_request(gpio + 15, "sub_lcd_nRST");
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gpio_direction_output(gpio + 15, 0);
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return 0;
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}
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static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
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.gpio_base = OMAP_MAX_GPIO_LINES,
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.irq_base = TWL4030_GPIO_IRQ_BASE,
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.irq_end = TWL4030_GPIO_IRQ_END,
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.pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
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| BIT(16) | BIT(17),
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.setup = sdp3430_twl_gpio_setup,
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};
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static struct twl4030_usb_data sdp3430_usb_data = {
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.usb_mode = T2_USB_MODE_ULPI,
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};
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static struct twl4030_madc_platform_data sdp3430_madc_data = {
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.irq_line = 1,
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};
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/*
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* Apply all the fixed voltages since most versions of U-Boot
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* don't bother with that initialization.
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*/
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/* VAUX1 for mainboard (irda and sub-lcd) */
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static struct regulator_init_data sdp3430_vaux1 = {
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.constraints = {
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.min_uV = 2800000,
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.max_uV = 2800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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/* VAUX2 for camera module */
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static struct regulator_init_data sdp3430_vaux2 = {
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.constraints = {
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.min_uV = 2800000,
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.max_uV = 2800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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/* VAUX3 for LCD board */
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static struct regulator_init_data sdp3430_vaux3 = {
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.constraints = {
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.min_uV = 2800000,
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.max_uV = 2800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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/* VAUX4 for OMAP VDD_CSI2 (camera) */
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static struct regulator_init_data sdp3430_vaux4 = {
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 1800000,
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.apply_uV = true,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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};
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|
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/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
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static struct regulator_init_data sdp3430_vmmc1 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 3150000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
|
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
|
| REGULATOR_CHANGE_MODE
|
|
| REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = 1,
|
|
.consumer_supplies = &sdp3430_vmmc1_supply,
|
|
};
|
|
|
|
/* VMMC2 for MMC2 card */
|
|
static struct regulator_init_data sdp3430_vmmc2 = {
|
|
.constraints = {
|
|
.min_uV = 1850000,
|
|
.max_uV = 1850000,
|
|
.apply_uV = true,
|
|
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
|
| REGULATOR_MODE_STANDBY,
|
|
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
|
| REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = 1,
|
|
.consumer_supplies = &sdp3430_vmmc2_supply,
|
|
};
|
|
|
|
/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
|
|
static struct regulator_init_data sdp3430_vsim = {
|
|
.constraints = {
|
|
.min_uV = 1800000,
|
|
.max_uV = 3000000,
|
|
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
|
| REGULATOR_MODE_STANDBY,
|
|
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
|
| REGULATOR_CHANGE_MODE
|
|
| REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = 1,
|
|
.consumer_supplies = &sdp3430_vsim_supply,
|
|
};
|
|
|
|
/* VDAC for DSS driving S-Video */
|
|
static struct regulator_init_data sdp3430_vdac = {
|
|
.constraints = {
|
|
.min_uV = 1800000,
|
|
.max_uV = 1800000,
|
|
.apply_uV = true,
|
|
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
|
| REGULATOR_MODE_STANDBY,
|
|
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
|
| REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = 1,
|
|
.consumer_supplies = &sdp3430_vdda_dac_supply,
|
|
};
|
|
|
|
/* VPLL2 for digital video outputs */
|
|
static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
|
|
{
|
|
.supply = "vdds_dsi",
|
|
.dev = &sdp3430_dss_device.dev,
|
|
}
|
|
};
|
|
|
|
static struct regulator_init_data sdp3430_vpll2 = {
|
|
.constraints = {
|
|
.name = "VDVI",
|
|
.min_uV = 1800000,
|
|
.max_uV = 1800000,
|
|
.apply_uV = true,
|
|
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
|
| REGULATOR_MODE_STANDBY,
|
|
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
|
| REGULATOR_CHANGE_STATUS,
|
|
},
|
|
.num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
|
|
.consumer_supplies = sdp3430_vpll2_supplies,
|
|
};
|
|
|
|
static struct twl4030_codec_audio_data sdp3430_audio = {
|
|
.audio_mclk = 26000000,
|
|
};
|
|
|
|
static struct twl4030_codec_data sdp3430_codec = {
|
|
.audio_mclk = 26000000,
|
|
.audio = &sdp3430_audio,
|
|
};
|
|
|
|
static struct twl4030_platform_data sdp3430_twldata = {
|
|
.irq_base = TWL4030_IRQ_BASE,
|
|
.irq_end = TWL4030_IRQ_END,
|
|
|
|
/* platform_data for children goes here */
|
|
.bci = &sdp3430_bci_data,
|
|
.gpio = &sdp3430_gpio_data,
|
|
.madc = &sdp3430_madc_data,
|
|
.keypad = &sdp3430_kp_data,
|
|
.usb = &sdp3430_usb_data,
|
|
.codec = &sdp3430_codec,
|
|
|
|
.vaux1 = &sdp3430_vaux1,
|
|
.vaux2 = &sdp3430_vaux2,
|
|
.vaux3 = &sdp3430_vaux3,
|
|
.vaux4 = &sdp3430_vaux4,
|
|
.vmmc1 = &sdp3430_vmmc1,
|
|
.vmmc2 = &sdp3430_vmmc2,
|
|
.vsim = &sdp3430_vsim,
|
|
.vdac = &sdp3430_vdac,
|
|
.vpll2 = &sdp3430_vpll2,
|
|
};
|
|
|
|
static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
|
|
{
|
|
I2C_BOARD_INFO("twl4030", 0x48),
|
|
.flags = I2C_CLIENT_WAKE,
|
|
.irq = INT_34XX_SYS_NIRQ,
|
|
.platform_data = &sdp3430_twldata,
|
|
},
|
|
};
|
|
|
|
static int __init omap3430_i2c_init(void)
|
|
{
|
|
/* i2c1 for PMIC only */
|
|
omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
|
|
ARRAY_SIZE(sdp3430_i2c_boardinfo));
|
|
/* i2c2 on camera connector (for sensor control) and optional isp1301 */
|
|
omap_register_i2c_bus(2, 400, NULL, 0);
|
|
/* i2c3 on display connector (for DVI, tfp410) */
|
|
omap_register_i2c_bus(3, 400, NULL, 0);
|
|
return 0;
|
|
}
|
|
|
|
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
|
|
|
|
static struct omap_smc91x_platform_data board_smc91x_data = {
|
|
.cs = 3,
|
|
.flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
|
|
IORESOURCE_IRQ_LOWLEVEL,
|
|
};
|
|
|
|
static void __init board_smc91x_init(void)
|
|
{
|
|
if (omap_rev() > OMAP3430_REV_ES1_0)
|
|
board_smc91x_data.gpio_irq = 6;
|
|
else
|
|
board_smc91x_data.gpio_irq = 29;
|
|
|
|
gpmc_smc91x_init(&board_smc91x_data);
|
|
}
|
|
|
|
#else
|
|
|
|
static inline void board_smc91x_init(void)
|
|
{
|
|
}
|
|
|
|
#endif
|
|
|
|
static void enable_board_wakeup_source(void)
|
|
{
|
|
/* T2 interrupt line (keypad) */
|
|
omap_mux_init_signal("sys_nirq",
|
|
OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
|
|
}
|
|
|
|
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
|
|
|
|
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
|
|
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
|
|
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
|
|
|
|
.phy_reset = true,
|
|
.reset_gpio_port[0] = 57,
|
|
.reset_gpio_port[1] = 61,
|
|
.reset_gpio_port[2] = -EINVAL
|
|
};
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
static struct omap_board_mux board_mux[] __initdata = {
|
|
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
|
};
|
|
#endif
|
|
|
|
/*
|
|
* SDP3430 V2 Board CS organization
|
|
* Different from SDP3430 V1. Now 4 switches used to specify CS
|
|
*
|
|
* See also the Switch S8 settings in the comments.
|
|
*/
|
|
static char chip_sel_3430[][GPMC_CS_NUM] = {
|
|
{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
|
|
{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
|
|
{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
|
|
};
|
|
|
|
static struct mtd_partition sdp_nor_partitions[] = {
|
|
/* bootloader (U-Boot, etc) in first sector */
|
|
{
|
|
.name = "Bootloader-NOR",
|
|
.offset = 0,
|
|
.size = SZ_256K,
|
|
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
|
},
|
|
/* bootloader params in the next sector */
|
|
{
|
|
.name = "Params-NOR",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = SZ_256K,
|
|
.mask_flags = 0,
|
|
},
|
|
/* kernel */
|
|
{
|
|
.name = "Kernel-NOR",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = SZ_2M,
|
|
.mask_flags = 0
|
|
},
|
|
/* file system */
|
|
{
|
|
.name = "Filesystem-NOR",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = MTDPART_SIZ_FULL,
|
|
.mask_flags = 0
|
|
}
|
|
};
|
|
|
|
static struct mtd_partition sdp_onenand_partitions[] = {
|
|
{
|
|
.name = "X-Loader-OneNAND",
|
|
.offset = 0,
|
|
.size = 4 * (64 * 2048),
|
|
.mask_flags = MTD_WRITEABLE /* force read-only */
|
|
},
|
|
{
|
|
.name = "U-Boot-OneNAND",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 2 * (64 * 2048),
|
|
.mask_flags = MTD_WRITEABLE /* force read-only */
|
|
},
|
|
{
|
|
.name = "U-Boot Environment-OneNAND",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 1 * (64 * 2048),
|
|
},
|
|
{
|
|
.name = "Kernel-OneNAND",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = 16 * (64 * 2048),
|
|
},
|
|
{
|
|
.name = "File System-OneNAND",
|
|
.offset = MTDPART_OFS_APPEND,
|
|
.size = MTDPART_SIZ_FULL,
|
|
},
|
|
};
|
|
|
|
static struct mtd_partition sdp_nand_partitions[] = {
|
|
/* All the partition sizes are listed in terms of NAND block size */
|
|
{
|
|
.name = "X-Loader-NAND",
|
|
.offset = 0,
|
|
.size = 4 * (64 * 2048),
|
|
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
|
},
|
|
{
|
|
.name = "U-Boot-NAND",
|
|
.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
|
|
.size = 10 * (64 * 2048),
|
|
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
|
},
|
|
{
|
|
.name = "Boot Env-NAND",
|
|
|
|
.offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
|
|
.size = 6 * (64 * 2048),
|
|
},
|
|
{
|
|
.name = "Kernel-NAND",
|
|
.offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
|
|
.size = 40 * (64 * 2048),
|
|
},
|
|
{
|
|
.name = "File System - NAND",
|
|
.size = MTDPART_SIZ_FULL,
|
|
.offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
|
|
},
|
|
};
|
|
|
|
static struct flash_partitions sdp_flash_partitions[] = {
|
|
{
|
|
.parts = sdp_nor_partitions,
|
|
.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
|
|
},
|
|
{
|
|
.parts = sdp_onenand_partitions,
|
|
.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
|
|
},
|
|
{
|
|
.parts = sdp_nand_partitions,
|
|
.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
|
|
},
|
|
};
|
|
|
|
static struct omap_musb_board_data musb_board_data = {
|
|
.interface_type = MUSB_INTERFACE_ULPI,
|
|
.mode = MUSB_OTG,
|
|
.power = 100,
|
|
};
|
|
|
|
static void __init omap_3430sdp_init(void)
|
|
{
|
|
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
|
|
omap3430_i2c_init();
|
|
platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
|
|
if (omap_rev() > OMAP3430_REV_ES1_0)
|
|
ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
|
|
else
|
|
ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
|
|
sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
|
|
spi_register_board_info(sdp3430_spi_board_info,
|
|
ARRAY_SIZE(sdp3430_spi_board_info));
|
|
ads7846_dev_init();
|
|
omap_serial_init();
|
|
usb_musb_init(&musb_board_data);
|
|
board_smc91x_init();
|
|
board_flash_init(sdp_flash_partitions, chip_sel_3430);
|
|
sdp3430_display_init();
|
|
enable_board_wakeup_source();
|
|
usb_ehci_init(&ehci_pdata);
|
|
}
|
|
|
|
MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
|
|
/* Maintainer: Syed Khasim - Texas Instruments Inc */
|
|
.boot_params = 0x80000100,
|
|
.map_io = omap3_map_io,
|
|
.reserve = omap_reserve,
|
|
.init_irq = omap_3430sdp_init_irq,
|
|
.init_machine = omap_3430sdp_init,
|
|
.timer = &omap_timer,
|
|
MACHINE_END
|