190 lines
6.6 KiB
C
190 lines
6.6 KiB
C
/*
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* SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/of_platform.h>
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#include <linux/of_fdt.h>
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#include <linux/serial_core.h>
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#include <linux/memblock.h>
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#include <linux/io.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/gic.h>
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#include <mach/map.h>
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#include <mach/regs-pmu.h>
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#include <plat/cpu.h>
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#include <plat/regs-serial.h>
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#include <plat/mfc.h>
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#include "common.h"
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/*
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* The following lookup table is used to override device names when devices
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* are registered from device tree. This is temporarily added to enable
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* device tree support addition for the EXYNOS5 architecture.
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*
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* For drivers that require platform data to be provided from the machine
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* file, a platform data pointer can also be supplied along with the
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* devices names. Usually, the platform data elements that cannot be parsed
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* from the device tree by the drivers (example: function pointers) are
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* supplied. But it should be noted that this is a temporary mechanism and
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* at some point, the drivers should be capable of parsing all the platform
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* data from the device tree.
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*/
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static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
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OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
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"exynos4210-uart.0", NULL),
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OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
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"exynos4210-uart.1", NULL),
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OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
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"exynos4210-uart.2", NULL),
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OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
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"exynos4210-uart.3", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),
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"s3c2440-i2c.0", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
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"s3c2440-i2c.1", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
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"s3c2440-i2c.2", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(3),
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"s3c2440-i2c.3", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(4),
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"s3c2440-i2c.4", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(5),
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"s3c2440-i2c.5", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(6),
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"s3c2440-i2c.6", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(7),
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"s3c2440-i2c.7", NULL),
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OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
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"s3c2440-hdmiphy-i2c", NULL),
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OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
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"dw_mmc.0", NULL),
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OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
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"dw_mmc.1", NULL),
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OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2,
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"dw_mmc.2", NULL),
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OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3,
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"dw_mmc.3", NULL),
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OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
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"exynos4210-spi.0", NULL),
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OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
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"exynos4210-spi.1", NULL),
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OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
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"exynos4210-spi.2", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-sata-ahci", 0x122F0000,
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"exynos5-sata", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-sata-phy", 0x12170000,
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"exynos5-sata-phy", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-sata-phy-i2c", 0x121D0000,
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"exynos5-sata-phy-i2c", NULL),
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OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
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OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
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OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC0,
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"exynos-gsc.0", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC1,
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"exynos-gsc.1", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC2,
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"exynos-gsc.2", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
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"exynos-gsc.3", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
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"exynos5-hdmi", NULL),
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OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
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"exynos5-mixer", NULL),
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OF_DEV_AUXDATA("samsung,mfc-v6", 0x11000000, "s5p-mfc-v6", NULL),
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OF_DEV_AUXDATA("samsung,exynos5250-tmu", 0x10060000,
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"exynos-tmu", NULL),
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{},
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};
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static const struct of_dev_auxdata exynos5440_auxdata_lookup[] __initconst = {
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OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5440_PA_UART0,
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"exynos4210-uart.0", NULL),
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{},
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};
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static void __init exynos5_dt_map_io(void)
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{
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unsigned long root = of_get_flat_dt_root();
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exynos_init_io(NULL, 0);
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if (of_flat_dt_is_compatible(root, "samsung,exynos5250"))
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s3c24xx_init_clocks(24000000);
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}
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static void __init exynos5_dt_machine_init(void)
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{
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struct device_node *i2c_np;
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const char *i2c_compat = "samsung,s3c2440-i2c";
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unsigned int tmp;
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/*
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* Exynos5's legacy i2c controller and new high speed i2c
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* controller have muxed interrupt sources. By default the
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* interrupts for 4-channel HS-I2C controller are enabled.
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* If node for first four channels of legacy i2c controller
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* are available then re-configure the interrupts via the
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* system register.
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*/
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for_each_compatible_node(i2c_np, NULL, i2c_compat) {
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if (of_device_is_available(i2c_np)) {
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if (of_alias_get_id(i2c_np, "i2c") < 4) {
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tmp = readl(EXYNOS5_SYS_I2C_CFG);
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writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
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EXYNOS5_SYS_I2C_CFG);
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}
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}
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}
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if (of_machine_is_compatible("samsung,exynos5250"))
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of_platform_populate(NULL, of_default_bus_match_table,
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exynos5250_auxdata_lookup, NULL);
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else if (of_machine_is_compatible("samsung,exynos5440"))
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of_platform_populate(NULL, of_default_bus_match_table,
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exynos5440_auxdata_lookup, NULL);
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}
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static char const *exynos5_dt_compat[] __initdata = {
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"samsung,exynos5250",
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"samsung,exynos5440",
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NULL
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};
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static void __init exynos5_reserve(void)
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{
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#ifdef CONFIG_S5P_DEV_MFC
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struct s5p_mfc_dt_meminfo mfc_mem;
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/* Reserve memory for MFC only if it's available */
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mfc_mem.compatible = "samsung,mfc-v6";
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if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
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s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
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mfc_mem.lsize);
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#endif
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}
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DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
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/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
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.init_irq = exynos5_init_irq,
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.smp = smp_ops(exynos_smp_ops),
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.map_io = exynos5_dt_map_io,
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.handle_irq = gic_handle_irq,
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.init_machine = exynos5_dt_machine_init,
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.init_late = exynos_init_late,
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.timer = &exynos4_timer,
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.dt_compat = exynos5_dt_compat,
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.restart = exynos5_restart,
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.reserve = exynos5_reserve,
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MACHINE_END
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