130 lines
3.0 KiB
C
130 lines
3.0 KiB
C
/* linux/arch/arm/plat-s3c24xx/irq-om.c
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*
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* Copyright (c) 2003-2004 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* S3C24XX - IRQ PM code
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/syscore_ops.h>
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#include <linux/io.h>
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#include <plat/cpu.h>
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#include <plat/pm.h>
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#include <plat/map-base.h>
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#include <plat/map-s3c.h>
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#include <mach/regs-irq.h>
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#include <mach/regs-gpio.h>
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#include <asm/irq.h>
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/* state for IRQs over sleep */
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/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources
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*
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* set bit to 1 in allow bitfield to enable the wakeup settings on it
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*/
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unsigned long s3c_irqwake_intallow = 1L << 30 | 0xfL;
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unsigned long s3c_irqwake_eintallow = 0x0000fff0L;
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int s3c_irq_wake(struct irq_data *data, unsigned int state)
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{
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unsigned long irqbit = 1 << data->hwirq;
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if (!(s3c_irqwake_intallow & irqbit))
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return -ENOENT;
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pr_info("wake %s for hwirq %lu\n",
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state ? "enabled" : "disabled", data->hwirq);
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if (!state)
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s3c_irqwake_intmask |= irqbit;
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else
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s3c_irqwake_intmask &= ~irqbit;
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return 0;
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}
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static struct sleep_save irq_save[] = {
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SAVE_ITEM(S3C2410_INTMSK),
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SAVE_ITEM(S3C2410_INTSUBMSK),
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};
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/* the extint values move between the s3c2410/s3c2440 and the s3c2412
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* so we use an array to hold them, and to calculate the address of
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* the register at run-time
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*/
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static unsigned long save_extint[3];
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static unsigned long save_eintflt[4];
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static unsigned long save_eintmask;
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static int s3c24xx_irq_suspend(void)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(save_extint); i++)
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save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4));
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for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)
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save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4));
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s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
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save_eintmask = __raw_readl(S3C24XX_EINTMASK);
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return 0;
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}
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static void s3c24xx_irq_resume(void)
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{
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unsigned int i;
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for (i = 0; i < ARRAY_SIZE(save_extint); i++)
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__raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4));
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for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)
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__raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4));
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s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
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__raw_writel(save_eintmask, S3C24XX_EINTMASK);
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}
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struct syscore_ops s3c24xx_irq_syscore_ops = {
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.suspend = s3c24xx_irq_suspend,
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.resume = s3c24xx_irq_resume,
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};
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#ifdef CONFIG_CPU_S3C2416
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static struct sleep_save s3c2416_irq_save[] = {
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SAVE_ITEM(S3C2416_INTMSK2),
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};
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static int s3c2416_irq_suspend(void)
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{
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s3c_pm_do_save(s3c2416_irq_save, ARRAY_SIZE(s3c2416_irq_save));
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return 0;
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}
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static void s3c2416_irq_resume(void)
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{
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s3c_pm_do_restore(s3c2416_irq_save, ARRAY_SIZE(s3c2416_irq_save));
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}
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struct syscore_ops s3c2416_irq_syscore_ops = {
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.suspend = s3c2416_irq_suspend,
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.resume = s3c2416_irq_resume,
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};
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#endif
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