59 lines
2.3 KiB
Plaintext
59 lines
2.3 KiB
Plaintext
* Freescale General-Purpose Media Interface (GPMI)
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The GPMI nand controller provides an interface to control the
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NAND flash chips.
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Required properties:
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- compatible : should be "fsl,<chip>-gpmi-nand"
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- reg : should contain registers location and length for gpmi and bch.
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- reg-names: Should contain the reg names "gpmi-nand" and "bch"
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- interrupts : BCH interrupt number.
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- interrupt-names : Should be "bch".
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- dmas: DMA specifier, consisting of a phandle to DMA controller node
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and GPMI DMA channel ID.
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Refer to dma.txt and fsl-mxs-dma.txt for details.
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- dma-names: Must be "rx-tx".
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Optional properties:
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- nand-on-flash-bbt: boolean to enable on flash bbt option if not
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present false
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- fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
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strength required. The required ECC strength is
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automatically discoverable for some flash
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(e.g., according to the ONFI standard).
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However, note that if this strength is not
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discoverable or this property is not enabled,
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the software may chooses an implementation-defined
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ECC scheme.
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- fsl,no-blockmark-swap: Don't swap the bad block marker from the OOB
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area with the byte in the data area but rely on the
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flash based BBT for identifying bad blocks.
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NOTE: this is only valid in conjunction with
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'nand-on-flash-bbt'.
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WARNING: on i.MX28 blockmark swapping cannot be
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disabled for the BootROM in the FCB. Thus,
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partitions written from Linux with this feature
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turned on may not be accessible by the BootROM
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code.
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The device tree may optionally contain sub-nodes describing partitions of the
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address space. See partition.txt for more detail.
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Examples:
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gpmi-nand@8000c000 {
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compatible = "fsl,imx28-gpmi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x8000c000 2000>, <0x8000a000 2000>;
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reg-names = "gpmi-nand", "bch";
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interrupts = <41>;
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interrupt-names = "bch";
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dmas = <&dma_apbh 4>;
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dma-names = "rx-tx";
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partition@0 {
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...
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};
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};
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