390 lines
10 KiB
C
390 lines
10 KiB
C
/*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/mfd/mc13783.h>
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#include <linux/spi/spi.h>
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#include <linux/regulator/machine.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/ulpi.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/memory.h>
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#include <asm/mach/map.h>
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#include <mach/common.h>
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#include <mach/iomux-mx3.h>
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#include <mach/3ds_debugboard.h>
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#include <mach/ulpi.h>
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#include "devices-imx31.h"
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#include "devices.h"
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/* CPLD IRQ line for external uart, external ethernet etc */
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#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
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/*
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* This file contains the board-specific initialization routines.
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*/
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static int mx31_3ds_pins[] = {
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/* UART1 */
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MX31_PIN_CTS1__CTS1,
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MX31_PIN_RTS1__RTS1,
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MX31_PIN_TXD1__TXD1,
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MX31_PIN_RXD1__RXD1,
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IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
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/* SPI 1 */
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MX31_PIN_CSPI2_SCLK__SCLK,
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MX31_PIN_CSPI2_MOSI__MOSI,
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MX31_PIN_CSPI2_MISO__MISO,
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MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
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MX31_PIN_CSPI2_SS0__SS0,
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MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
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/* MC13783 IRQ */
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IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
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/* USB OTG reset */
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IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
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/* USB OTG */
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MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
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MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
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MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
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MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
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MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
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MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
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MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
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MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
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MX31_PIN_USBOTG_CLK__USBOTG_CLK,
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MX31_PIN_USBOTG_DIR__USBOTG_DIR,
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MX31_PIN_USBOTG_NXT__USBOTG_NXT,
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MX31_PIN_USBOTG_STP__USBOTG_STP,
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/*Keyboard*/
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MX31_PIN_KEY_ROW0_KEY_ROW0,
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MX31_PIN_KEY_ROW1_KEY_ROW1,
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MX31_PIN_KEY_ROW2_KEY_ROW2,
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MX31_PIN_KEY_COL0_KEY_COL0,
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MX31_PIN_KEY_COL1_KEY_COL1,
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MX31_PIN_KEY_COL2_KEY_COL2,
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MX31_PIN_KEY_COL3_KEY_COL3,
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/* USB Host 2 */
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IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
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IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
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/* USB Host2 reset */
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IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
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};
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/*
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* Matrix keyboard
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*/
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static const uint32_t mx31_3ds_keymap[] = {
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KEY(0, 0, KEY_UP),
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KEY(0, 1, KEY_DOWN),
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KEY(1, 0, KEY_RIGHT),
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KEY(1, 1, KEY_LEFT),
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KEY(1, 2, KEY_ENTER),
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KEY(2, 0, KEY_F6),
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KEY(2, 1, KEY_F8),
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KEY(2, 2, KEY_F9),
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KEY(2, 3, KEY_F10),
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};
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static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
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.keymap = mx31_3ds_keymap,
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.keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
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};
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/* Regulators */
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static struct regulator_init_data pwgtx_init = {
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.constraints = {
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.boot_on = 1,
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.always_on = 1,
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},
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};
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static struct regulator_init_data gpo_init = {
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.constraints = {
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.boot_on = 1,
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.always_on = 1,
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}
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};
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static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
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{
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.id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
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.init_data = &pwgtx_init,
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}, {
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.id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
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.init_data = &pwgtx_init,
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}, {
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.id = MC13783_REG_GPO1, /* Turn on 1.8V */
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.init_data = &gpo_init,
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}, {
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.id = MC13783_REG_GPO3, /* Turn on 3.3V */
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.init_data = &gpo_init,
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},
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};
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/* MC13783 */
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static struct mc13783_platform_data mc13783_pdata __initdata = {
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.regulators = mx31_3ds_regulators,
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.num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
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.flags = MC13783_USE_REGULATOR | MC13783_USE_TOUCHSCREEN,
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};
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/* SPI */
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static int spi1_internal_chipselect[] = {
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MXC_SPI_CS(0),
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MXC_SPI_CS(2),
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};
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static const struct spi_imx_master spi1_pdata __initconst = {
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.chipselect = spi1_internal_chipselect,
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.num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
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};
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static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
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{
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.modalias = "mc13783",
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.max_speed_hz = 1000000,
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.bus_num = 1,
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.chip_select = 1, /* SS2 */
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.platform_data = &mc13783_pdata,
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.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
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.mode = SPI_CS_HIGH,
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},
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};
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/*
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* NAND Flash
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*/
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static const struct mxc_nand_platform_data
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mx31_3ds_nand_board_info __initconst = {
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.width = 1,
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.hw_ecc = 1,
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#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
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.flash_bbt = 1,
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#endif
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};
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/*
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* USB OTG
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*/
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#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
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PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
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#define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
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#define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
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static int mx31_3ds_usbotg_init(void)
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{
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int err;
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
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err = gpio_request(USBOTG_RST_B, "otgusb-reset");
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if (err) {
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pr_err("Failed to request the USB OTG reset gpio\n");
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return err;
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}
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err = gpio_direction_output(USBOTG_RST_B, 0);
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if (err) {
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pr_err("Failed to drive the USB OTG reset gpio\n");
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goto usbotg_free_reset;
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}
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mdelay(1);
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gpio_set_value(USBOTG_RST_B, 1);
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return 0;
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usbotg_free_reset:
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gpio_free(USBOTG_RST_B);
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return err;
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}
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static int mx31_3ds_host2_init(struct platform_device *pdev)
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{
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int err;
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mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
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err = gpio_request(USBH2_RST_B, "usbh2-reset");
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if (err) {
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pr_err("Failed to request the USB Host 2 reset gpio\n");
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return err;
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}
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err = gpio_direction_output(USBH2_RST_B, 0);
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if (err) {
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pr_err("Failed to drive the USB Host 2 reset gpio\n");
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goto usbotg_free_reset;
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}
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mdelay(1);
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gpio_set_value(USBH2_RST_B, 1);
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return 0;
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usbotg_free_reset:
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gpio_free(USBH2_RST_B);
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return err;
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}
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#if defined(CONFIG_USB_ULPI)
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static struct mxc_usbh_platform_data otg_pdata __initdata = {
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.portsc = MXC_EHCI_MODE_ULPI,
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.flags = MXC_EHCI_POWER_PINS_ENABLED,
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};
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static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
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.init = mx31_3ds_host2_init,
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.portsc = MXC_EHCI_MODE_ULPI,
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.flags = MXC_EHCI_POWER_PINS_ENABLED,
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};
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#endif
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static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
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.operating_mode = FSL_USB2_DR_DEVICE,
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.phy_mode = FSL_USB2_PHY_ULPI,
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};
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static int otg_mode_host;
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static int __init mx31_3ds_otg_mode(char *options)
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{
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if (!strcmp(options, "host"))
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otg_mode_host = 1;
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else if (!strcmp(options, "device"))
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otg_mode_host = 0;
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else
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pr_info("otg_mode neither \"host\" nor \"device\". "
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"Defaulting to device\n");
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return 0;
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}
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__setup("otg_mode=", mx31_3ds_otg_mode);
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static const struct imxuart_platform_data uart_pdata __initconst = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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/*
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* Set up static virtual mappings.
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*/
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static void __init mx31_3ds_map_io(void)
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{
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mx31_map_io();
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}
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/*!
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* Board specific initialization.
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*/
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static void __init mxc_board_init(void)
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{
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mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
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"mx31_3ds");
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imx31_add_imx_uart0(&uart_pdata);
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imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
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imx31_add_spi_imx1(&spi1_pdata);
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spi_register_board_info(mx31_3ds_spi_devs,
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ARRAY_SIZE(mx31_3ds_spi_devs));
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imx31_add_imx_keypad(&mx31_3ds_keymap_data);
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mx31_3ds_usbotg_init();
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#if defined(CONFIG_USB_ULPI)
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if (otg_mode_host) {
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otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
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ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
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imx31_add_mxc_ehci_otg(&otg_pdata);
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}
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usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
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ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
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imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
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#endif
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if (!otg_mode_host)
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imx31_add_fsl_usb2_udc(&usbotg_pdata);
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if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
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printk(KERN_WARNING "Init of the debug board failed, all "
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"devices on the debug board are unusable.\n");
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imx31_add_imx2_wdt(NULL);
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}
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static void __init mx31_3ds_timer_init(void)
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{
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mx31_clocks_init(26000000);
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}
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static struct sys_timer mx31_3ds_timer = {
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.init = mx31_3ds_timer_init,
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};
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/*
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* The following uses standard kernel macros defined in arch.h in order to
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* initialize __mach_desc_MX31_3DS data structure.
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*/
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MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
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/* Maintainer: Freescale Semiconductor, Inc. */
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.boot_params = MX3x_PHYS_OFFSET + 0x100,
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.map_io = mx31_3ds_map_io,
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.init_irq = mx31_init_irq,
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.init_machine = mxc_board_init,
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.timer = &mx31_3ds_timer,
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MACHINE_END
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