322 lines
8.2 KiB
C
322 lines
8.2 KiB
C
/*
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* Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
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*
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* Copyright (C) 2009 VIA Technologies, Inc.
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* Copyright (C) 2010 One Laptop per Child
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* Author: Harald Welte <HaraldWelte@viatech.com>
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <linux/slab.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/pci.h>
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#include <linux/io.h>
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#define MODULE_NAME "vx855_gpio"
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/* The VX855 south bridge has the following GPIO pins:
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* GPI 0...13 General Purpose Input
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* GPO 0...12 General Purpose Output
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* GPIO 0...14 General Purpose I/O (Open-Drain)
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*/
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#define NR_VX855_GPI 14
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#define NR_VX855_GPO 13
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#define NR_VX855_GPIO 15
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#define NR_VX855_GPInO (NR_VX855_GPI + NR_VX855_GPO)
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#define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
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struct vx855_gpio {
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struct gpio_chip gpio;
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spinlock_t lock;
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u32 io_gpi;
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u32 io_gpo;
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bool gpi_reserved;
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bool gpo_reserved;
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};
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/* resolve a GPIx into the corresponding bit position */
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static inline u_int32_t gpi_i_bit(int i)
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{
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if (i < 10)
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return 1 << i;
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else
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return 1 << (i + 14);
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}
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static inline u_int32_t gpo_o_bit(int i)
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{
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if (i < 11)
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return 1 << i;
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else
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return 1 << (i + 14);
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}
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static inline u_int32_t gpio_i_bit(int i)
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{
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if (i < 14)
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return 1 << (i + 10);
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else
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return 1 << (i + 14);
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}
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static inline u_int32_t gpio_o_bit(int i)
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{
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if (i < 14)
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return 1 << (i + 11);
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else
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return 1 << (i + 13);
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}
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/* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
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* 0..13 GPI 0..13
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* 14..26 GPO 0..12
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* 27..41 GPIO 0..14
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*/
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static int vx855gpio_direction_input(struct gpio_chip *gpio,
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unsigned int nr)
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{
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struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
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unsigned long flags;
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u_int32_t reg_out;
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/* Real GPI bits are always in input direction */
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if (nr < NR_VX855_GPI)
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return 0;
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/* Real GPO bits cannot be put in output direction */
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if (nr < NR_VX855_GPInO)
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return -EINVAL;
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/* Open Drain GPIO have to be set to one */
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spin_lock_irqsave(&vg->lock, flags);
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reg_out = inl(vg->io_gpo);
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reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
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outl(reg_out, vg->io_gpo);
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spin_unlock_irqrestore(&vg->lock, flags);
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return 0;
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}
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static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
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{
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struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
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u_int32_t reg_in;
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int ret = 0;
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if (nr < NR_VX855_GPI) {
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reg_in = inl(vg->io_gpi);
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if (reg_in & gpi_i_bit(nr))
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ret = 1;
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} else if (nr < NR_VX855_GPInO) {
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/* GPO don't have an input bit, we need to read it
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* back from the output register */
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reg_in = inl(vg->io_gpo);
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if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
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ret = 1;
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} else {
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reg_in = inl(vg->io_gpi);
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if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
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ret = 1;
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}
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return ret;
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}
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static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
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int val)
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{
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struct vx855_gpio *vg = container_of(gpio, struct vx855_gpio, gpio);
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unsigned long flags;
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u_int32_t reg_out;
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/* True GPI cannot be switched to output mode */
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if (nr < NR_VX855_GPI)
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return;
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spin_lock_irqsave(&vg->lock, flags);
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reg_out = inl(vg->io_gpo);
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if (nr < NR_VX855_GPInO) {
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if (val)
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reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
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else
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reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
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} else {
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if (val)
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reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
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else
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reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
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}
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outl(reg_out, vg->io_gpo);
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spin_unlock_irqrestore(&vg->lock, flags);
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}
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static int vx855gpio_direction_output(struct gpio_chip *gpio,
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unsigned int nr, int val)
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{
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/* True GPI cannot be switched to output mode */
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if (nr < NR_VX855_GPI)
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return -EINVAL;
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/* True GPO don't need to be switched to output mode,
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* and GPIO are open-drain, i.e. also need no switching,
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* so all we do is set the level */
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vx855gpio_set(gpio, nr, val);
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return 0;
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}
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static const char *vx855gpio_names[NR_VX855_GP] = {
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"VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
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"VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
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"VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
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"VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
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"VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
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"VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
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"VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
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"VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
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"VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
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"VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
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};
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static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
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{
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struct gpio_chip *c = &vg->gpio;
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c->label = "VX855 South Bridge";
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c->owner = THIS_MODULE;
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c->direction_input = vx855gpio_direction_input;
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c->direction_output = vx855gpio_direction_output;
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c->get = vx855gpio_get;
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c->set = vx855gpio_set;
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c->dbg_show = NULL;
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c->base = 0;
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c->ngpio = NR_VX855_GP;
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c->can_sleep = 0;
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c->names = vx855gpio_names;
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}
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/* This platform device is ordinarily registered by the vx855 mfd driver */
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static int vx855gpio_probe(struct platform_device *pdev)
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{
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struct resource *res_gpi;
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struct resource *res_gpo;
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struct vx855_gpio *vg;
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int ret;
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res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
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res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
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if (!res_gpi || !res_gpo)
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return -EBUSY;
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vg = kzalloc(sizeof(*vg), GFP_KERNEL);
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if (!vg)
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return -ENOMEM;
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platform_set_drvdata(pdev, vg);
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dev_info(&pdev->dev, "found VX855 GPIO controller\n");
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vg->io_gpi = res_gpi->start;
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vg->io_gpo = res_gpo->start;
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spin_lock_init(&vg->lock);
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/*
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* A single byte is used to control various GPIO ports on the VX855,
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* and in the case of the OLPC XO-1.5, some of those ports are used
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* for switches that are interpreted and exposed through ACPI. ACPI
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* will have reserved the region, so our own reservation will not
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* succeed. Ignore and continue.
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*/
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if (!request_region(res_gpi->start, resource_size(res_gpi),
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MODULE_NAME "_gpi"))
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dev_warn(&pdev->dev,
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"GPI I/O resource busy, probably claimed by ACPI\n");
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else
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vg->gpi_reserved = true;
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if (!request_region(res_gpo->start, resource_size(res_gpo),
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MODULE_NAME "_gpo"))
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dev_warn(&pdev->dev,
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"GPO I/O resource busy, probably claimed by ACPI\n");
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else
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vg->gpo_reserved = true;
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vx855gpio_gpio_setup(vg);
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ret = gpiochip_add(&vg->gpio);
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if (ret) {
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dev_err(&pdev->dev, "failed to register GPIOs\n");
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goto out_release;
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}
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return 0;
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out_release:
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if (vg->gpi_reserved)
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release_region(res_gpi->start, resource_size(res_gpi));
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if (vg->gpo_reserved)
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release_region(res_gpi->start, resource_size(res_gpo));
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kfree(vg);
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return ret;
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}
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static int vx855gpio_remove(struct platform_device *pdev)
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{
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struct vx855_gpio *vg = platform_get_drvdata(pdev);
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struct resource *res;
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if (gpiochip_remove(&vg->gpio))
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dev_err(&pdev->dev, "unable to remove gpio_chip?\n");
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if (vg->gpi_reserved) {
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res = platform_get_resource(pdev, IORESOURCE_IO, 0);
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release_region(res->start, resource_size(res));
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}
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if (vg->gpo_reserved) {
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res = platform_get_resource(pdev, IORESOURCE_IO, 1);
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release_region(res->start, resource_size(res));
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}
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kfree(vg);
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return 0;
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}
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static struct platform_driver vx855gpio_driver = {
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.driver = {
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.name = MODULE_NAME,
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.owner = THIS_MODULE,
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},
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.probe = vx855gpio_probe,
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.remove = vx855gpio_remove,
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};
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module_platform_driver(vx855gpio_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
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MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
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MODULE_ALIAS("platform:vx855_gpio");
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