Paul Burton ae0d7cbc99 MIPS: Malta: mux & enable SERIRQ interrupt ... This patch causes the kernel to mux the SERIRQ interrupt to the SERIRQ pin of the PIIX4 and to enable that interrupt. The kernel depends upon the interrupt when using the SuperIO UARTs (ttyS0 & ttyS1) but previously would not configure it, instead relying upon the bootloader having done so. If that is not the case then the typical result is that the system appears to hang once it reaches userland as no output is displayed on the UART. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Reviewed-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6182/		2014-01-23 13:02:35 +01:00
..
asm	MIPS: Malta: mux & enable SERIRQ interrupt	2014-01-23 13:02:35 +01:00
uapi/asm	MIPS: microMIPS: mfhc1 & mthc1 support for the FPU emulator	2014-01-13 23:40:55 +01:00