145 lines
3.4 KiB
C
145 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Common codes for both the skx_edac driver and Intel 10nm server EDAC driver.
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* Originally split out from the skx_edac driver.
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*
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* Copyright (c) 2018, Intel Corporation.
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*/
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#ifndef _SKX_COMM_EDAC_H
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#define _SKX_COMM_EDAC_H
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#define MSG_SIZE 1024
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/*
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* Debug macros
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*/
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#define skx_printk(level, fmt, arg...) \
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edac_printk(level, "skx", fmt, ##arg)
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#define skx_mc_printk(mci, level, fmt, arg...) \
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edac_mc_chipset_printk(mci, level, "skx", fmt, ##arg)
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/*
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* Get a bit field at register value <v>, from bit <lo> to bit <hi>
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*/
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#define GET_BITFIELD(v, lo, hi) \
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(((v) & GENMASK_ULL((hi), (lo))) >> (lo))
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#define SKX_NUM_IMC 2 /* Memory controllers per socket */
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#define SKX_NUM_CHANNELS 3 /* Channels per memory controller */
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#define SKX_NUM_DIMMS 2 /* Max DIMMS per channel */
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#define I10NM_NUM_IMC 4
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#define I10NM_NUM_CHANNELS 2
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#define I10NM_NUM_DIMMS 2
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#define MAX(a, b) ((a) > (b) ? (a) : (b))
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#define NUM_IMC MAX(SKX_NUM_IMC, I10NM_NUM_IMC)
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#define NUM_CHANNELS MAX(SKX_NUM_CHANNELS, I10NM_NUM_CHANNELS)
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#define NUM_DIMMS MAX(SKX_NUM_DIMMS, I10NM_NUM_DIMMS)
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#define IS_DIMM_PRESENT(r) GET_BITFIELD(r, 15, 15)
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#define IS_NVDIMM_PRESENT(r, i) GET_BITFIELD(r, i, i)
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/*
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* Each cpu socket contains some pci devices that provide global
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* information, and also some that are local to each of the two
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* memory controllers on the die.
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*/
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struct skx_dev {
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struct list_head list;
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u8 bus[4];
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int seg;
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struct pci_dev *sad_all;
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struct pci_dev *util_all;
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struct pci_dev *uracu; /* for i10nm CPU */
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u32 mcroute;
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struct skx_imc {
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struct mem_ctl_info *mci;
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struct pci_dev *mdev; /* for i10nm CPU */
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void __iomem *mbase; /* for i10nm CPU */
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u8 mc; /* system wide mc# */
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u8 lmc; /* socket relative mc# */
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u8 src_id, node_id;
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struct skx_channel {
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struct pci_dev *cdev;
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struct skx_dimm {
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u8 close_pg;
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u8 bank_xor_enable;
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u8 fine_grain_bank;
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u8 rowbits;
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u8 colbits;
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} dimms[NUM_DIMMS];
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} chan[NUM_CHANNELS];
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} imc[NUM_IMC];
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};
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struct skx_pvt {
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struct skx_imc *imc;
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};
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enum type {
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SKX,
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I10NM
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};
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enum {
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INDEX_SOCKET,
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INDEX_MEMCTRL,
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INDEX_CHANNEL,
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INDEX_DIMM,
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INDEX_MAX
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};
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struct decoded_addr {
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struct skx_dev *dev;
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u64 addr;
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int socket;
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int imc;
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int channel;
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u64 chan_addr;
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int sktways;
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int chanways;
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int dimm;
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int rank;
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int channel_rank;
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u64 rank_address;
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int row;
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int column;
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int bank_address;
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int bank_group;
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};
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typedef int (*get_dimm_config_f)(struct mem_ctl_info *mci);
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typedef bool (*skx_decode_f)(struct decoded_addr *res);
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int __init skx_adxl_get(void);
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void __exit skx_adxl_put(void);
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void skx_set_decode(skx_decode_f decode);
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int skx_get_src_id(struct skx_dev *d, int off, u8 *id);
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int skx_get_node_id(struct skx_dev *d, u8 *id);
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int skx_get_all_bus_mappings(unsigned int did, int off, enum type,
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struct list_head **list);
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int skx_get_hi_lo(unsigned int did, int off[], u64 *tolm, u64 *tohm);
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int skx_get_dimm_info(u32 mtr, u32 amap, struct dimm_info *dimm,
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struct skx_imc *imc, int chan, int dimmno);
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int skx_get_nvdimm_info(struct dimm_info *dimm, struct skx_imc *imc,
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int chan, int dimmno, const char *mod_str);
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int skx_register_mci(struct skx_imc *imc, struct pci_dev *pdev,
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const char *ctl_name, const char *mod_str,
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get_dimm_config_f get_dimm_config);
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int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
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void *data);
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void skx_remove(void);
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#endif /* _SKX_COMM_EDAC_H */
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