c6e80ace83
In the bootloader of HiKey/96boards, syspll and media_syspll clk was initialized to 1.19GHz. So, here changes it in kernel accordingly. 1.19GHz was chosen over 1.2GHz because at 1.19GHz we get more precise HDMI pixel clock (1.19G/16 = 74.4MHz) for 1280x720p@60Hz HDMI (74.25MHz required by standards). Closer pixel clock means better compatibility to HDMI monitors. Signed-off-by: Guodong Xu <guodong.xu@linaro.org> Signed-off-by: Xinliang Liu <xinliang.liu@linaro.org> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1467189955-21694-1-git-send-email-guodong.xu@linaro.org |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| clk-hi3519.c | ||
| clk-hi3620.c | ||
| clk-hi6220-stub.c | ||
| clk-hi6220.c | ||
| clk-hip04.c | ||
| clk-hix5hd2.c | ||
| clk.c | ||
| clk.h | ||
| clkdivider-hi6220.c | ||
| clkgate-separated.c | ||
| reset.c | ||
| reset.h | ||